Patents Examined by J. E. Schoenholtz
  • Patent number: 11594693
    Abstract: A display device includes a base layer including first and second portions, and a third portion between the first and second portions and configured to be bent, folded, or rolled, a light emitting element layer on one surface of the base layer at the first portion, and including light emitting elements, a circuit board on the one surface of the base layer at the third portion, and electrically connected to the light emitting elements, protective patterns spaced apart from each other on another surface of the base layer, including a resin, and also including first protective patterns spaced apart from each other on the other surface of the base layer at the first portion, and at least one second protective pattern on the other surface of the base layer at the second portion, and at least one of a heat dissipation layer or a cushion layer below the protective patterns.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: February 28, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seungwook Kwon, Jaesik Kim, Woo Yong Sung, Seoyeon Lee, Ung-Soo Lee, Jamin Lee, Jeongseok Lee, Sehoon Jeong, Seunggun Chae, Seung-Yeon Chae
  • Patent number: 11594702
    Abstract: A window glass includes a first surface and a second surface opposite to the first surface. A second area extending in a second direction, a third area spaced apart from the second area in a first direction perpendicular to the second direction and extending in the second direction, a first area disposed between the second area and the third area, a first buffer area disposed between the first area and the second area, and a second buffer area disposed between the first area and the third area are defined on the second surface. The first area has a first thickness, and each of the second and third areas has a second thickness greater than the first thickness. A plurality of groove patterns is defined in the first buffer area and the second buffer area.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyo-Seop Kim, Myung-Hwan Kim, Seung Yo Yang
  • Patent number: 11588141
    Abstract: In a method of manufacturing a display apparatus, the method includes: preparing a support substrate; forming a metal oxide layer on a surface of the support substrate, the metal oxide layer comprising first charges; forming a debonding layer on a surface of the metal oxide layer, the debonding layer comprising second charges opposite to the first charges; forming a flexible substrate on a surface of the debonding layer; forming a display element and a thin film encapsulation layer on a surface of the flexible substrate, the display element comprising a thin film transistor and an organic light-emitting diode; and isolating the flexible substrate from the support substrate.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: February 21, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dongkyun Seo, Hyoungsik Kim, Heekyun Shin, Junho Sim
  • Patent number: 11581181
    Abstract: An orientation chamber is provided. The orientation chamber includes a substrate holder, an orientation detector, and a purging system. The substrate holder is configured to hold a substrate. The orientation detector is configured to detect an orientation of the substrate. The purging system is configured to inject a cleaning gas into the orientation chamber and remove contaminants from the substrate. The purging system includes a gas regulator adjusting a volume of the cleaning gas supplied into the orientation chamber according to a detection signal output from a gas detector which indicates a content of a specific gas contaminant outgassed from the substrate.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: February 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Wei-Hua Houng
  • Patent number: 11581390
    Abstract: A display device including: a substrate; an active layer, and including channel and conductive regions; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: February 14, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin Sung An, Young Woo Park, Se Wan Son, Moo Soon Ko, Jeong-Soo Lee, Ji Seon Lee, Deuk Myung Ji
  • Patent number: 11581223
    Abstract: Implementations of methods of singulating a plurality of die included in a substrate may include forming a plurality of die on a first side of a substrate, forming a backside metal layer on a second side of a substrate, applying a photoresist layer over the backside metal layer, patterning the photoresist layer along a die street of the substrate, and etching through the backside metal layer located in the die street of the substrate. The substrate may be exposed through the etch. The method may also include singulating the plurality of die included in the substrate through removing a substrate material in the die street.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: February 14, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Michael J. Seddon
  • Patent number: 11575008
    Abstract: A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: February 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yun-Chi Wu, Tsung-Yu Yang, Cheng-Bo Shu, Chien Hung Liu
  • Patent number: 11569331
    Abstract: A display device includes a pixel array disposed in a display area, a connection pad disposed in a pad area, and a transfer wiring electrically connected to the connection pad to transfer a signal to the pixel array. The pixel array includes a light-emitting element including a first electrode including a multi-layered structure including a metal layer and a metal oxide layer, an organic light-emitting layer disposed on the first electrode, and a second electrode disposed on the organic light-emitting layer. The connection pad includes an upper pad conductive layer having a single-layered structure including a metal oxide.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: January 31, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Young Hoon Yoo, Kang-Woo Kim, Kyung Hoon Park, Yong Jae Jang
  • Patent number: 11569463
    Abstract: A stretchable device includes a substrate, the substrate including first regions having a first stiffness and a second region between adjacent first regions and having a second stiffness that is lower than the first stiffness, a unit device array including unit devices on separate, respective first regions of the substrate, and an encapsulant covering the unit device array. The unit device array includes pixel electrodes isolated on separate, respective first regions of the substrate, common electrodes isolated on separate, respective first regions and each facing a separate pixel electrode, the stretchable device configured to apply a same voltage to the plurality of common electrodes, and active layers on separate, respective first regions and each between a separate pixel electrode and a separate common electrode.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: January 31, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo Young Kim, Youngjun Yun, Don-Wook Lee
  • Patent number: 11569363
    Abstract: In some embodiments, an integrated circuit is provided. The integrated circuit may include an inner ring-shaped isolation structure that is disposed in a semiconductor substrate. Further, the inner-ring shaped isolation structure may demarcate a device region. An inner ring-shaped well is disposed in the semiconductor substrate and surrounds the inner ring-shaped isolation structure. A plurality of dummy gates are arranged over the inner ring-shaped well. Moreover, the plurality of dummy gates are arranged within an interlayer dielectric layer.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: January 31, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Fu-Jier Fan, Kong-Beng Thei, Yi-Sheng Chen, Szu-Hsien Liu
  • Patent number: 11563107
    Abstract: An integrated circuit structure comprises one or more backend-of-line (BEOL) interconnects formed over a first ILD layer. An etch stop layer is over the one or more BEOL interconnects, the etch stop layer having a plurality of vias that are in contact with the one or more BEOL interconnects. An array of BEOL thin-film-transistors (TFTs) is over the etch stop layer, wherein adjacent ones of the BEOL TFTs are separated by isolation trench regions. The TFTs are aligned with at least one of the plurality of vias to connect to the one or more BEOL interconnects, wherein each of the BEOL TFTs comprise a bottom gate electrode, a gate dielectric layer over the bottom gate electrode, and an oxide-based semiconductor channel layer over the bottom gate electrode having source and drain regions therein. Contacts are formed over the source and drain regions of each of BEOL TFTs, wherein the contacts have a critical dimension of 35 nm or less, and wherein the BEOL TFTs have an absence of diluted hydro-fluoride (DHF).
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: January 24, 2023
    Assignee: Intel Corporation
    Inventors: Chieh-Jen Ku, Bernhard Sell, Pei-Hua Wang, Nikhil Mehta, Shu Zhou, Jared Stoeger, Allen B. Gardiner, Akash Garg, Shem Ogadhoh, Vinaykumar Hadagali, Travis W. Lajoie
  • Patent number: 11560621
    Abstract: A deposition mask set includes a first mask, a second mask, and a third mask. Each of the first mask, second, and third masks includes a first edge substantially parallel to a first direction, a second edge substantially parallel to a second direction, and a plurality of first openings. Each of the openings includes a first opening side that is substantially parallel to a third direction and a second opening side that is substantially parallel to a fourth direction, and each of the openings corresponds to one of a first, second, or third color area at one of pixel areas. The third and fourth directions are not parallel to the first and second directions, and the first, second, and third color areas are adjacent to each other in the third direction.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: January 24, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jaemin Hong
  • Patent number: 11563203
    Abstract: A display device fabrication method includes providing a substrate including a display panel including a panel mark, placing a processing module on the display panel, the processing module including a processing mark and a first processing line adjacent to the processing mark, the processing mark corresponding to the panel mark of the display panel, calculating an offset between the panel mark and the processing mark, correcting the first processing line to define a second processing line overlapping a periphery of the display panel, the correcting including reflecting the calculated offset, and processing the periphery of the display panel along the second processing line. The calculating of the offset includes obtaining a first offset defined as a displacement between points on the processing and panel marks, and obtaining a second offset defined as an angle of the panel mark with respect to the processing mark.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: January 24, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Geunwoo Yug
  • Patent number: 11557642
    Abstract: The present disclosure relates to a display panel and a repair method thereof. The display panel includes a plurality of pixel circuits in which an emission region, through which light from a light-emitting element is emitted, is defined, a power line configured to apply a pixel driving voltage to the pixel circuits, a reference voltage line to which a reference voltage lower than the pixel driving voltage is applied, and a branch line connected to the reference voltage line to apply the reference voltage to one or more of the pixel circuits. At least a portion of the branch line includes a partially metalized semiconductor layer.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: January 17, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Dong Yoon Lee, Kwang Yong Choi, Seong Hwan Hwang, Byeong Uk Gang, Hye Min Park
  • Patent number: 11557693
    Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first capping layer, a second capping layer, and an electron barrier layer stacked in order. The multi-quantum-well structure includes a plurality of alternately-stacked potential barrier layers and potential well layers. The first capping layer is a semiconductor layer, and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has an aluminum mole fraction larger than that of each of the potential barrier layers, and the aluminum mole fraction of the first capping layer is larger than that of at least a portion of the electron barrier layer. A method for preparing the semiconductor light emitting device is also provided.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: January 17, 2023
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Yung-Ling Lan, Chan-Chan Ling, Chi-Ming Tsai, Chia-Hung Chang
  • Patent number: 11555749
    Abstract: In some implementations, a system performs proactive performance tests for an appliance before a time for an operational change in usage of the appliance. Usage data for an appliance associated with a property may be obtained. The obtained usage data indicates past activity of the appliance and present operational status of the appliance. Weather forecast data associated with a location of the property can be obtained. A time for an operational change in usage of the appliance can be predicted based at least on the obtained usage data for the appliance and the obtained weather forecast data. An operation directed to conducting one or more performance tests on the appliance can be performed before the predicted time for the operational change in usage of the appliance. One or more communications related to the one or more performance tests of the appliance can be provided to a client device.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: January 17, 2023
    Assignee: Alarm.com Incorporated
    Inventor: Stephen Scott Trundle
  • Patent number: 11552263
    Abstract: The display substrate includes: the flexible base substrate and the trace layer, a first adhesion-enhancing layer, and a first insulating layer that are stacked on the flexible base substrate, wherein the first adhesion-enhancing layer is between the first insulating layer and the trace layer, and the first adhesion-enhancing layer is bonded to the first insulating layer and the trace layer respectively. The flexible base substrate is provided with a bending area, and an overlapping area is present between an area which an orthographic projection of the first adhesion-enhancing layer on the flexible base substrate is within and the bending area, and an orthographic projection of the signal trace in the trace layer on the flexible base substrate falls in the bending area.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: January 10, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lu Liu, Yunjin Liu, Weifeng Zhou
  • Patent number: 11552064
    Abstract: The present invention is a display and manufacturing method thereof, including a thin film substrate, a plurality of packaging layers, and a stretch-resistant unit, wherein one side of the thin film substrate has a plurality of pixel areas, each pixel area contains at least one light-emitting element, and each packaging layer respectively covers one of the pixel areas to form an island-shape structure, and there is a spacing between any two adjacent island-shape structures, and each stretch-resistant unit deposed at the spacing and connects the adjacent island-shape structures.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: January 10, 2023
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Po-Lun Chen, Chun-Ta Chen, Po-Ching Lin
  • Patent number: 11545535
    Abstract: The present disclosure provides a stretchable display panel and a display device. The stretchable display panel includes: a flexible substrate which is divided into a plurality of display areas and non-display areas located between the display areas; wherein the display areas include light-emitting devices and driving circuits coupled to the light-emitting devices; and the non-display areas include wiring areas and a plurality of opening areas located between the wiring areas, the wiring areas include wires coupled to the driving circuits, and the opening areas are of a hollow structure. The plurality of opening areas are formed in the non-display areas, and the flexible substrate in the opening areas is of a hollow structure, that is, no film layer is reserved in the opening areas, thus when the display panel is stretched, the display panel can be stretched in any direction, and the stretching effect of the display panel is improved.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: January 3, 2023
    Assignee: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventor: Shengguang Ban
  • Patent number: 11537165
    Abstract: Embodiments of the present disclosure propose a display substrate, a method for manufacturing the same, and a display panel. In an embodiment, the display substrate includes a flexible substrate, the flexible substrate includes a bending region, the bending region has a first groove, wherein at least an inner wall of the first groove has a first flexible layer, at least one rib is provided on the first flexible layer at a bottom of the first groove, a wiring layer covers the rib on the first flexible layer, and the wiring layer has alternating protrusions and recessions, and an orthographic projection of the protrusions on the flexible substrate and an orthographic projection of the rib on the flexible substrate at least partially overlap.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: December 27, 2022
    Assignees: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Haizhou He, Ming Shi, Guoren Hu, Wen Sun, Zhangrui Zhao