Patents Examined by J. E. Schoenholtz
  • Patent number: 11758782
    Abstract: The present invention provides a flexible display panel and a manufacturing method of the flexible display panel. The flexible display panel includes a base substrate, an inorganic layer, an organic filling layer, source/drain metal layer traces, and a planarization layer. The source/drain metal layer traces include a first source/drain metal layer trace in a bending region and a second source/drain metal layer trace in the non-bending region. The first source/drain metal layer trace is a curved trace which can reduce a resistance change of the source/drain metal layer trace caused by bending, and can reduce a risk of breakage.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: September 12, 2023
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Huihui Zhao
  • Patent number: 11751441
    Abstract: A display apparatus in which an area of a peripheral area may be reduced while having a simple structure, the display apparatus includes a substrate, a bottom metal layer on the substrate and including a first extension line extending from the peripheral area outside a display area into the display area, a semiconductor layer on the bottom metal layer, a gate layer on the semiconductor layer, a first metal layer on the gate layer, and a second metal layer on the first metal layer and including a first data line extending from the peripheral area into the display area and electrically coupled to the first extension line in the peripheral area.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: September 5, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Eunhyun Kim, Eunhye Ko, Yeonhong Kim, Kyoungwon Lee, Sunhee Lee, Junhyung Lim
  • Patent number: 11751432
    Abstract: The present disclosure relates to the technical field of display, and provided thereby are a display device, a flexible display panel and a manufacturing method therefor.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: September 5, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoyun Liu, Liangliang Kang, Xiaofen Wang, Qian Jin, Tun Liu, Yan Fan
  • Patent number: 11751461
    Abstract: The present disclosure provides a display motherboard, a method for fabricating the same, and a method for aligning the same. The display motherboard includes an array substrate on which an alignment mark and a color film layer are provided. A portion of a black matrix of the color film layer in an alignment mark area includes a first light-shielding portion and a second light-shielding portion. The first light-shielding portion covers the alignment mark, and the second light-shielding portion covers an area outside the alignment mark, where upper surfaces of the first light-shielding portion and the second light-shielding portion are not in the same plane. When the display motherboard is aligned in the subsequent processes, since the black matrix forms the same pattern as the alignment mark due to a height step, when the exposure machine exposures, the pattern can be directly captured for alignment.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: September 5, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shuo Li, Ling Shi, Yuan He
  • Patent number: 11749749
    Abstract: A semiconductor device includes a semiconductor layer having a first main surface on one side and a second main surface on the other side, a unit cell including a diode region of a first conductivity type formed in a surface layer portion of the first main surface of the semiconductor layer, a well region of a second conductivity type formed in the surface layer portion of the first main surface of the semiconductor layer along a peripheral edge of the diode region, and a first conductivity type region formed in a surface layer portion of the well region, a gate electrode layer facing the well region and the first conductivity type region through a gate insulating layer and a first main surface electrode covering the diode region and the first conductivity type region on the first main surface of the semiconductor layer, and forming a Schottky junction with the diode region and an ohmic junction with the first conductivity type region.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: September 5, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Takui Sakaguchi, Masatoshi Aketa, Yuki Nakano
  • Patent number: 11751467
    Abstract: A flexible display panel, a method for fabricating the same, and a display device are provided. A protruding structure located is formed in a via-hole area on a flexible base substrate so that both the protruding structure, and the portions of an organic light-emitting functional film and a top electrode layer covering the protruding structure can be removed. Thereafter an encapsulation thin film covering the patterns of the organic light-emitting functional film and the top electrode layer is formed. After the encapsulation thin film is formed, the step of removing the pattern of the encapsulation thin film in the via-hole area can be further performed to expose the flexible base substrate in the via-hole area, and after the flexible base substrate in the via-hole area is removed, a via-hole can be formed in the flexible base substrate.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: September 5, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Kuo Sun, Lujiang Huangfu, Meng Zhao, Guoqiang Tang
  • Patent number: 11744140
    Abstract: The present disclosure relates to a method of fabricating a display panel. The method may include: forming a separation layer having first openings on a surface of the substrate; forming a flexible substrate layer covering the separation layer and the first openings; forming a TFT layer having second openings on a surface of the flexible substrate layer opposite from the substrate; removing a part of the flexible substrate layer that is underneath the second openings; forming a PDL layer covering the TFT layer, side walls of the third openings, and a part of the separation layer in the third openings, thereby forming fourth openings having a fourth width larger than the first width; forming an encapsulation layer covering the PDL layer and the fourth openings; and separating the flexible substrate layer from the substrate.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: August 29, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jing Yang, Fangxu Cao, Mingche Hsieh
  • Patent number: 11737318
    Abstract: A display panel and a manufacturing method thereof, and an alignment method are provided. The display panel includes a display substrate and a cover plate connected through an optical adhesive layer. The display substrate includes a plurality of light emitting elements, a pixel defining layer, and an encapsulation layer; the encapsulation layer includes a first inorganic encapsulation layer, a first organic encapsulation layer, and a second inorganic encapsulation layer; the display panel includes a display region and a frame region including a cutting region and a dam glue region where a dam glue is located; at least one of the plurality of cover plate alignment marks is between the dam glue and the display region and is overlapped with the second inorganic encapsulation layer, and at least one of the plurality of cover plate alignment marks is between the dam glue and the cutting region.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: August 22, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bo Cheng, Xiangdan Dong, Jun Yan, Fan He, Qi Liu, Hongwei Ma
  • Patent number: 11730032
    Abstract: A display device includes: a base layer comprising a top surface, a bottom surface opposite the top surface, and a plurality of side surfaces connecting the top surface and the bottom surface, wherein a display area and a non-display area adjacent to the display area are defined; an outer line overlapping the non-display area, on the top surface, and adjacent to any one of the plurality of side surfaces; a light emitting element layer overlapping the display area, on the top surface, and comprising a light emitting element; and a connection line connecting the outer line and the light emitting element, wherein the outer line comprises a center line extending from the connection line in a first direction and a branch line extending from the center line in a second direction crossing the first direction.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: August 15, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Donghyun Lee, Seung-Soo Ryu
  • Patent number: 11728465
    Abstract: A display device including a light emitting diode chip, including: a light emitting structure which includes a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers; a second electrode which is electrically connected to the second conductive semiconductor layer; an insulation unit which is disposed to cover a part of the top surface of the second electrode and side surfaces of the light emitting structure; and a second fixed part which covers the top surface of the insulation unit and is electrically connected to the second electrode, and at least a part of which extends to the side surfaces of the light emitting structure.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: August 15, 2023
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Young Hyun Kim, Motonobu Takeya, Jong Ik Lee, Sung Su Son
  • Patent number: 11721745
    Abstract: In an embodiment, a device includes a substrate, a first semiconductor layer that extends from the substrate, and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer includes silicon and the second semiconductor layer includes silicon germanium, with edge portions of the second semiconductor layer having a first germanium concentration, a center portion of the second semiconductor layer having a second germanium concentration, and the second germanium concentration being less than the first germanium concentration. The device also includes a gate stack on the second semiconductor layer, lightly doped source/drain regions in the second semiconductor layer, and source and drain regions extending into the lightly doped source/drain regions.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Che-Yu Lin, Chien-Hung Chen, Wen-Chu Hsiao
  • Patent number: 11716885
    Abstract: A display panel includes a substrate including a first display area, a first side display area, a second side display area, and a corner display area, the corner display area being arranged between the first side display area and the second side display area and surrounding at least a portion of the first display area, a first wiring extending in a first direction in the first display area, a second wiring extending in a second direction in the first display area, a first corner wiring arranged in the corner display area and connected to the first wiring, a second corner wiring arranged in the corner display area and connected to the second wiring, and a pixel circuit arranged in the corner display area, where the first corner wiring and the second corner wiring extend in a first extension direction in the corner display area.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: August 1, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yujin Lee, Heejean Park, Mukyung Jeon
  • Patent number: 11716915
    Abstract: Various embodiments of the present application are directed towards a resistive random-access memory (RRAM) cell including a top-electrode barrier layer configured to block the movement of nitrogen or some other suitable non-metal element from a top electrode of the RRAM cell to an active metal layer of the RRAM cell. Blocking the movement of non-metal element may be prevent formation of an undesired switching layer between the active metal layer and the top electrode. The undesired switching layer would increase parasitic resistance of the RRAM cell, such that top-electrode barrier layer may reduce parasitic resistance by preventing formation of the undesired switching layer.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: August 1, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsing-Lien Lin, Chii-Ming Wu, Fa-Shen Jiang
  • Patent number: 11711964
    Abstract: A display device and a method of manufacturing a display device are provided. A manufacturing method of a display device includes: forming a display module including a first area defined therein, the display module including a display panel including a lower surface and an upper surface opposite the lower surface, a first film under the lower surface of the display panel, a second film on the upper surface of the display panel, and an adhesive layer between the lower surface of the display panel and the first film; and irradiating a laser beam in an upper direction extending from the lower surface of the display panel to the upper surface of the display panel to cut the first film and the adhesive layer along an edge of the first area, the laser beam provided to the display panel having a laser power equal to or less than about 1 W.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: July 25, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyoungil Min, Taehyun Sung, Hyungu Lee, Junshik Park
  • Patent number: 11711937
    Abstract: A display apparatus includes a display panel including pixels and a cover window disposed on the display panel. The cover window includes a flat portion having a first thickness, and a folding portion having a second thickness that is less than the first thickness of the flat portion, the folding portion being adjacent to the flat portion. A first stress profile of the flat portion of the cover window that is a stress change along a depth direction from a surface of the flat portion of the cover window is different from a second stress profile of the folding portion of the cover window that is a stress change along a depth direction from a surface of the folding portion of the cover window.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: July 25, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hoikwan Lee
  • Patent number: 11700763
    Abstract: A flexible display device that can conform to complex curved surfaces, and methods for manufacturing said display device, are disclosed herein. The display device utilizes a Miura-ori origami structure that, in a folded or at least partially folded configuration, is able to conform to complex curved surfaces. The Miura-ori structure involves folding a two-dimensional substrate in accordance with crease lines comprising a tessellation of parallelograms. Each cell of the tessellation pattern can include one or more luminous elements (LEDs, OLEDs, etc.) bonded to circuit elements embedded within the flexible substrate (e.g., Parylene-C).
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: July 11, 2023
    Assignee: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Hongyu Yu, Yang Deng
  • Patent number: 11699748
    Abstract: A normally-off HEMT transistor includes a heterostructure including a channel layer and a barrier layer on the channel layer; a 2DEG layer in the heterostructure; an insulation layer in contact with a first region of the barrier layer; and a gate electrode through the whole thickness of the insulation layer, terminating in contact with a second region of the barrier layer. The barrier layer and the insulation layer have a mismatch of the lattice constant (“lattice mismatch”), which generates a mechanical stress solely in the first region of the barrier layer, giving rise to a first concentration of electrons in a first portion of the two-dimensional conduction channel which is under the first region of the barrier layer which is greater than a second concentration of electrons in a second portion of the two-dimensional conduction channel which is under the second region of the barrier layer.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: July 11, 2023
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Ferdinando Iucolano, Giuseppe Greco, Fabrizio Roccaforte
  • Patent number: 11696461
    Abstract: Disclosed are a display panel, a manufacturing method and a stretchable display device. The display panel includes a rigid substrate; a flexible substrate and an encapsulation layer. The flexible substrate includes a plurality of through-groove structures and at least one through-groove structure includes a non-fixed region and a fixed region surrounding the non-fixed region. A portion of the encapsulation layer located in the at least one through-groove structure includes a first sub-portion located in the fixed region and attached to the rigid substrate and a second sub-portion located in the non-fixed region and attached to the rigid substrate by an organic separation layer, the second sub-portion is configured to be separated from the rigid substrate in a case of gasification of the organic separation layer, and the first sub-portion is configured to be lifted off from the flexible substrate together with the rigid substrate under an external force.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: July 4, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Fangxu Cao, Jia Zhao
  • Patent number: 11690269
    Abstract: A display substrate includes pixel-defining layer and sub-pixels of three colors. The pixel-defining layer defines a plurality of sub-pixel areas having the sub-pixels arranged in therein; the pixel-defining layer includes a first pixel-defining layer and a second pixel-defining layer; a height of the second pixel-defining layer is smaller than a height of the first pixel-defining layer; and the first pixel-defining layer is configured to separate adjacent sub-pixels of different colors; the second pixel-defining layer is configured to separate adjacent sub-pixels of the same color; and the sub-pixels of three colors include red sub-pixels, blue sub-pixels, and green sub-pixels; the display substrate includes at least one column of sub-pixels, and in the at least one column of sub-pixels, sub-pixels belonging to a same column have a same color; and in a column of sub-pixels of the same color, corresponding light-emitting layers of at least two adjacent sub-pixels are connected.
    Type: Grant
    Filed: June 19, 2021
    Date of Patent: June 27, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chuan Peng, Yan Cui, Yu Zhang
  • Patent number: 11688666
    Abstract: Structures and methods for reducing process charging damages are disclosed. In one example, a silicon-on-insulator (SOI) structure is disclosed. The SOI structure includes: a substrate, a polysilicon region and an etch stop layer. The substrate includes: a handle layer, an insulation layer arranged over the handle layer, and a buried layer arranged over the insulation layer. The polysilicon region extends downward from an upper surface of the buried layer and terminates in the handle layer. The etch stop layer is located on the substrate. The etch stop layer is in contact with both the substrate and the polysilicon region.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuan-Jung Chen, Cheng-Hung Wang, Tsung-Lin Lee, Shiuan-Jeng Lin, Chun-Ming Lin, Wen-Chih Chiang