Abstract: A display device includes a flexible substrate including a folding area, a non-folding area adjacent to the folding area along a first direction, and a first surface in both the folding area and the non-folding area, a light-emitting element layer on the flexible substrate, and a support which faces the light-emitting layer with the flexible substrate therebetween, forms an interface with the first surface of the flexible substrate and is bendable together with the flexible substrate. The support includes a first support corresponding to the folding area, a second support corresponding to the non-folding area, and a through hole extended through the support. The through hole is extended through the first support, and a first portion of the first surface of the flexible substrate is exposed to outside the support by the through hole in the first support.

Abstract: The present technology relates to an imaging element and an electronic apparatus capable of expanding a saturation signal electric charge amount. A first P-type impurity region, a capacitance expanding portion that forms a PN junction surface with a second P-type impurity region and a first N-type impurity region, and the first N-type impurity region are sequentially provided in a depth direction from a surface side where a wiring layer of a semiconductor substrate is laminated. The second P-type impurity region is formed in a stripe on a plane of the capacitance expanding portion that perpendicularly intersects with the depth direction. The stripe is formed, on the plane of the capacitance expanding portion that perpendicularly intersects with the depth direction, in a direction perpendicular to a side where an electrode that reads accumulated electric charge is formed. The present technology can be applied to an imaging element.

Abstract: A display device includes a base layer including first and second portions, and a third portion between the first and second portions and configured to be bent, folded, or rolled, a light emitting element layer on one surface of the base layer at the first portion, and including light emitting elements, a circuit board on the one surface of the base layer at the third portion, and electrically connected to the light emitting elements, protective patterns spaced apart from each other on another surface of the base layer, including a resin, and also including first protective patterns spaced apart from each other on the other surface of the base layer at the first portion, and at least one second protective pattern on the other surface of the base layer at the second portion, and at least one of a heat dissipation layer or a cushion layer below the protective patterns.

Abstract: A method of forming first and second fin field effect transistors (finFETs) on a substrate includes forming first and second fin structures of the first and second finFETs, respectively, on the substrate and forming first and second oxide regions having first and second thicknesses on top surfaces of the first and second fin structures, respectively. The method further includes forming third and fourth oxide regions having third and fourth thicknesses on sidewalls on the first and second fin structures, respectively. The first and second thicknesses are greater than the third and fourth thicknesses, respectively. The method further includes forming a first polysilicon structure on the first and third oxide regions and forming a second polysilicon structure on the second and fourth oxide regions.

Abstract: The present disclosure provides an electronic device including a substrate, an extending element, a conductive element and a first insulating layer. The substrate includes an edge. The extending element is disposed on the substrate and includes a first conductive layer and a semiconductor layer, the first conductive layer and the semiconductor layer are overlapped, and the semiconductor layer extends to the edge of the substrate. The conductive element is overlapped with the first conductive layer. The insulating layer is disposed between the conductive element and the extending element.

Abstract: A semiconductor device including a nanosheet field effect transistor (FET) comprising a thin gate oxide layer and a floating gate memory cell comprising a tunneling oxide, a floating gate, and a blocking oxide layer over a fin FET device. The device fabricated by forming a nanosheet stack and fin structures, forming tunneling oxide and floating gate layers over the nanosheet stack and fin structures, forming dummy gate structures over the nanosheet stack and fin structures, removing the dummy gate structures, forming a blocking oxide layer over the floating gate, and forming replacement metal gates.

Abstract: Provided is a display substrate. The display substrate includes including a base substrate having a first display region and a second display region; in the pixel circuit included in the pixels in the second display region, the conductive line connected to the metal layer is a transparent conductive line, and the transparent conductive line is disposed between the two existing insulating layers.

Abstract: A display module includes a substrate, a ground layer disposed in the substrate, a plurality of self-emissive devices provided on a front surface of the substrate, a first driver integrated circuit (IC) provided on a rear surface of the substrate, and a first heat dissipation structure connected to the ground layer, and including a first ground pad exposed to the rear surface of the substrate. The first heat dissipation structure is configured to dissipate heat to the rear surface of the substrate.

Abstract: A display panel and a display device are provided. The display panel comprises a substrate, a plurality of sub-pixels, a plurality of data lines, a plurality of wiring structures and a plurality of pads. The substrate comprises a display area and a non-display area comprising a bending area. The sub-pixels and data lines are in the display area and electrically connected with each other. The wiring structures are in the bending area and electrically connected with the data lines. At least one wiring structure comprises a plurality of hollow patterns connected successively, each hollow pattern comprises a first conductive part and a second conductive part connected with each other. The plurality of pads are in the non-display area and located on a side of the plurality of wiring structures away from the display area and electrically connected with the plurality of wiring structures.

Abstract: Aspects of the present disclosure provide a method of fabricating a semiconductor device including a plurality of vertically stacked transistors. For example, the method can include providing a vertical stack of alternating horizontal first and second layers, the second layers forming channels of the transistors. The method can further include uncovering the second layers. The method can further include forming a first shell on a first one of the uncovered second layers, the first shell and the first one of the uncovered second layers forming a first channel structure of a first one of the transistors.

Abstract: A foldable display device includes a flexible display substrate having a folding area and non-folding areas on two sides of the folding area, and a plurality of scan lines disposed on the flexible substrate and extending in a specific direction. The scan lines disposed in the folding area include a first part and a second part which are disposed on different layers and which are formed of different materials.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, a third semiconductor structure, a first bonding interface between the first semiconductor structure and the second semiconductor structure, and a second bonding interface between the first semiconductor structure and the third semiconductor structure. The first semiconductor structure includes an array of NAND memory strings and a first semiconductor layer in contact with sources of the array of NAND memory strings. The second semiconductor structure includes a first peripheral circuit of the array of NAND memory strings including a first transistor, and a second semiconductor layer in contact with the first transistor. A third semiconductor structure includes a second peripheral circuit of the array of NAND memory strings including a second transistor, and a third semiconductor layer in contact with the second transistor.

Abstract: The present disclosure provides a display panel, the display panel includes a flexible substrate with a curve region, the curve region has a Gauss curvature K1, the Gauss curvature K1 is not equal to zero, a plurality of thin film transistors disposed on the flexible substrate, and a plurality of light emitting units disposed on the flexible substrate and driven by the thin film transistors, the flexible substrate at least has an opening in the curve region.

Abstract: A light emitting element includes an emission stacked pattern and an insulating film. The emission stack pattern includes a first conductive semiconductor layer, an active layer disposed on the first conductive semiconductor layer, and a second conductive semiconductor layer disposed on the active layer. The insulating film surrounds an outer surface of the emission stacked pattern and has a non-uniform thickness.

Abstract: A light-emitting device includes a lead frame, a light-emitting diode (LED) chip, and an encapsulant. The LED chip is disposed on the lead frame, and includes a substrate, a semiconductor light-emitting unit disposed on a surface of the substrate, and a first electrode and a second electrode, which are disposed on the surface of the substrate, and which are located outwardly of the semiconductor light-emitting unit. The first and second electrodes are electrically connected to a lower surface of the semiconductor light-emitting unit, and are respectively connected to a first wiring bonding region and a second wiring bonding region on the lead frame. The encapsulant encapsulates the LED chip on the lead frame.

Abstract: In an embodiment, a method includes: placing a wafer on an implanter platen, the wafer including alignment marks; measuring a position of the wafer by measuring positions of the alignment marks with one or more cameras; determining an angular displacement between the position of the wafer and a reference position of the wafer; and rotating the implanter platen by the angular displacement.

Abstract: A display device, including a flexible substrate, multiple lighting units, and multiple signal lines, is provided. The lighting units and the signal lines are located on the flexible substrate, and the signal lines are respectively electrically connected to the lighting units. Each signal line includes multiple first conductive patterns, at least one second conductive pattern, and at least one third conductive pattern. The first conductive patterns are located on the flexible substrate. The second conductive pattern is located on the first conductive patterns, and two ends of each second conductive pattern are respectively connected to two first conductive patterns. In a stretched state, the two first conductive patterns twist the commonly connected second conductive pattern. The third conductive pattern is superimposed on the second conductive pattern.

Abstract: The present invention relates to a method of manufacturing an AlN-based transistor. An AlN-based high electron mobility transistor (HEMT) element according to the present invention may use an AlN buffer layer, and include an AlGaN composition change layer inserted into a GaN/AlN interface to remove or suppress a degree of generation of a two-dimensional hole gas (2DHG), thereby decreasing an influence of a coulomb drag on a two-dimensional electron gas (2DEG) layer and improving mobility of a two-dimensional electron gas (2DEG).

Abstract: A method for manufacturing a microelectromechanical structure. The method includes: forming a first and a second functional layer including recesses, a third functional layer, and three insulating layers situated therebetween, a structured lateral area of the third functional layer defining a movable structure, the insulating layers and the first and second functional layers each including a lateral area situated beneath the structured lateral area of the third functional layer and corresponding to a perpendicular projection of the structured lateral area; etching the insulating layers to remove the lateral area of the third insulating layer, and expose the movable structure, all recesses of the first functional layer situated in the lateral area of the first functional layer being formed by narrow trenches, the first functional layer being formed to include an electrically insulated segment in the lateral area which is separated from the remainder of the first functional layer by trenches.

Abstract: The present disclosure provides an array substrate and a method of manufacturing the same and a display panel, which belongs to the field of display technologies. The method of manufacturing the array substrate comprises: providing a base substrate; forming a drive circuit layer on the base substrate, wherein the drive circuit layer includes a switching transistor; forming an insulating material layer on one side of the drive circuit layer distal to the base substrate, wherein the insulating material layer has a connection via-hole exposing at least a part region of a drain electrode of the switching transistor; and forming an electrode layer on one side of the insulating material layer distal to the base substrate, wherein a surface of the electrode layer distal to the base substrate has groove structures extending to the connection via-hole. The manufacturing method may avoid the occurrence of poor coating in forming an orientation layer.