Patents Examined by James B. Mullins
  • Patent number: 6097252
    Abstract: A method and apparatus for efficient power amplification over a wide dynamic range and for a number of modulation formats includes a carrier amplifier (30) and a peaking amplifier (40). The carrier amplifier (30) operates with a bias generated by an envelope amplifier (80) which amplifies the envelope of an input signal as generated by an envelope detector (70). The peaking amplifier (40) operates with a fixed bias. The outputs of the carrier amplifier (30) and the peaking amplifier (40) are combined using an impedance transforming network (50). Envelope amplifier (80) can be turned on for high efficiency low power level operation, or it can be turned off for standard Doherty-type operation.
    Type: Grant
    Filed: June 2, 1997
    Date of Patent: August 1, 2000
    Assignee: Motorola, Inc.
    Inventors: Bernard Eugene Sigmon, Ronald Gene Myers, Robert Michael Jackson
  • Patent number: 5986508
    Abstract: An amplifier for systems affected by changes in operating temperature, in which the amplifier gain is stabilized over temperature. A temperature compensating control element is added to the previously known active bias control amplifiers, forming a second control loop. This control acts to modify the device bias current, in a way which holds the device gain constant as temperature varies. In so doing it implements, in the circuit, the mathematically derived current variation which, based on the physics of the device, maintains constant gain. The additional circuitry is very inexpensive, preserving the cost-effectiveness of the integrated circuit bias scheme for those applications requiring the additional bias control.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: November 16, 1999
    Inventor: Larry J. Nevin
  • Patent number: 5986505
    Abstract: A circular low noise amplifier package having an X-band MMIC low noise amplifier disposed therein, that may be preferably used with an existing stripline receiver board employed in a missile. The package has three input/output ports symmetrically located around the package, including DC bias, RF input, and RF output ports. The package mounts directly into the stripline receiver board as a drop-in replacement for an isolator used in the existing stripline receiver board. The circular low noise amplifier package comprises a top cover, an upper RF gasket, a package lid, a hermetic low noise amplifier module containing a low noise amplifier chip, a lower RF gasket, and a bottom cover. The amplifier module has feedthrough pins that extend through the outer wall thereof and couple to the low noise amplifier chip. The top and bottom covers are used to secure the amplifier package to the stripline receiver board. The upper and lower RF gaskets aid in improving an RF ground.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: November 16, 1999
    Assignee: Raytheon Company
    Inventors: George P. Torgeson, John J. Halliday, Allen H. Gordon
  • Patent number: 5977832
    Abstract: A method of biasing an MOS IC includes the steps of providing the IC with two MOS transistors having substantially similar characteristics and maintaining these two transistors at different temperatures. During operation of the IC, an output voltage is generated from each of the two transistors, and a bias voltage is generated as a function of the difference between the two output voltages. This bias voltage is then fed back to the gate terminals of the two MOS transistors to set the bias voltage to a steady-state level at which the circuit will operate at a zero temperature coefficient point. This bias voltage is also coupled to the gate electrodes of other transistors within the IC, to operate these transistors at the zero temperature coefficient point. An IC operated in accordance with biasing method will exhibit superior stability with variations in ambient temperature.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: November 2, 1999
    Assignee: Philips Electronics North America Corporation
    Inventors: Srinagesh Satyanarayana, Pawan Gogna
  • Patent number: 5955916
    Abstract: The invention concerns feed-forward, linear, radio-frequency amplifiers, which contain components which can be grouped into two categories: active and passive. Under the invention, all active components are constructed as two-port devices, which are easily tested, using standard equipment, in order to locate malfunctions. The active components plug into a network of the passive components, comprising striplines, waveguides, coaxial cables, and the like.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: September 21, 1999
    Assignee: Lucent Technologies Inc.
    Inventor: Matthew James Hunton
  • Patent number: 5949284
    Abstract: A CMOS buffer amplifier can accept input signals and produce output signals that are within one half of the enhancement threshold voltage of the power supply voltages. These characteristics make this buffer amplifier ideal for use with low voltage CMOS circuitry with sub-micron geometries. The buffer amplifier contains two differential amplifiers, the output of both being combined and coupled to an output node. Each differential amplifier has matched input transducing devices on each of its inputs. One of these couples the input of the buffer amplifier to one of the inputs of the differential amplifier, while the other one couples the output of the buffer amplifier as feedback to the other side of the same differential amplifier. The pair of input transducing devices providing input to one differential amplifier are matched and suitable for operation in a higher voltage range than are the matched pair providing input to the other differential amplifier.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: September 7, 1999
    Assignee: Tektronix, Inc.
    Inventor: Arnold M. Frisch
  • Patent number: 5939938
    Abstract: An amplifier circuit with improved turn-on and turn-off transient operation includes a differential amplifier and a selectively variable reference generator for controlling the amplifier output during circuit turn-on. The amplifier has differential inputs which are driven by a reference voltage from the reference generator and a single-ended input signal. During circuit turn-on, the selectively variable reference voltage, generated by charging the bypass capacitor with a constant current source, charges in a linear manner from ground potential toward its final value of, typically, half of the power supply voltage. During circuit turn-off, the bypass capacitor is discharged with a constant current source in a linear manner toward ground potential. This allows improved turn-on and turn-off transient operation to be realized, e.g.
    Type: Grant
    Filed: September 11, 1997
    Date of Patent: August 17, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Arthur Joseph Kalb, Christopher Bernard Heithoff
  • Patent number: 5936463
    Abstract: An stable inverted amplifying circuit includes an odd number of CMOS inverters and a feedback capacitance. Balancing resistances decrease the inverter open gain and limit the gain of the entire circuit. Serial capacitances act to prevent low-frequency oscillation. Oscillation-preventing circuits are also provided to reduce high-frequency oscillation. Sleep, refresh, and sleep-refresh switches are used to cancel residual loads and reduce power consumption.
    Type: Grant
    Filed: May 20, 1997
    Date of Patent: August 10, 1999
    Assignee: YOZAN Inc.
    Inventors: Gouliang Shou, Takashi Tomatsu, Kazunori Motohashi
  • Patent number: 5933054
    Abstract: A bipolar OTA having a wide input voltage range is provided without increasing the circuit scale and current consumption. This OTA includes a first differential pair of emitter-coupled first and second bipolar transistors, a second differential pair of emitter-coupled third and fourth bipolar transistors, a common current source or sink connected to the coupled emitters of the first to fourth transistors. The first to fourth transistors are driven by a common tail current produced by the common current source or sink. A first input voltage as an input signal to be amplified is differentially applied across the bases of the first and second transistors. A second input voltage, which is produced by attenuating the first input voltage, is differentially applied across the bases of the third and fourth transistors. First and second dc offset voltages are applied to the bases of the third and fourth transistors, respectively.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: August 3, 1999
    Assignee: NEC Corporation
    Inventor: Katsuji Kimura
  • Patent number: 5929710
    Abstract: A cascode single-ended to differential converter has particular applications for use in communication, e.g. RF circuits. The converter provides higher gain, reduced noise figure and improved output level and linearity over the prior art differential pair converter. The present converter is a transconductor, converting an input voltage to a differential current output signal, i.e., two output signals of different currents, with the difference being linear to the level of voltage. The cascode amplifier output signal is used to produce a signal equal in the amplitude but 180 degrees out of phase with the signal produced by the cascode amplifier.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: July 27, 1999
    Assignee: National Semiconductor Corporation
    Inventor: David E. Bien
  • Patent number: 5926066
    Abstract: An improved chopper stabilized operational amplifier is disclosed, along with an improved method of timing the switchings of chopper switches in such an amplifier. The disclosure includes an integrated circuit and method for generating a true random voltage signal having a truly random RMS voltage value within a selected range. The true random voltage signal is obtained by amplifying and bandpass filtering random white noise voltages generated by a component of the circuit. The white noise voltages include shot noise voltages generated by bipolar transistors in an input amplifier stage. The random signal generator circuit and method is employed with an oscillator to form a random clock signal generator on the integrated circuit chip. The amount of time between each clocking pulse output by the random clock signal generator truly randomly varies within a selected range of time, and repeats only by random chance.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: July 20, 1999
    Assignee: National Semiconductor Corporation
    Inventor: Don Roy Sauer
  • Patent number: 5923216
    Abstract: An amplifier especially suitable for use as a reading-head amplifier in a disc drive employing a magnetoresistive sensor. The amplifier is capable of injecting a fixed current into the magnetoresistive sensor and of providing an output signal dependent on the voltage developed across the magnetoresistive sensor as the resistance of the sensor varies in accordance with its magnetic environment.
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: July 13, 1999
    Assignee: Seagate Technology, Inc.
    Inventor: John Laurence Pennock
  • Patent number: 5923215
    Abstract: A microprocessor detects input power and output power of a two transistor, Class AB amplifier, and provides an adapted bias level of the transistors which has been adapted from detected input power. The gain of the amplifier is maintained by the microprocessor depending upon the detected input power and frequency as well as detected output power.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: July 13, 1999
    Assignee: The Whitaker Corporation
    Inventor: Ravinder Singh Hans
  • Patent number: 5923219
    Abstract: An automatic threshold control circuit includes a bottom detection circuit, a relative peak detection circuit, and a voltage divider circuit. The bottom detection circuit detects an absolute minimum level of an input signal, and the relative peak detection circuit detects, in accordance with the input signal, a maximum level relative to the minimum level detected by the absolute bottom detection circuit. Further, the voltage divider circuit generates a threshold level by dividing the absolute minimum level and the relative maximum level in a predetermined ratio. Using this configuration, a signal amplifying circuit can be constructed that is capable of accurately reproducing digital signals at all times regardless of variations in the amplitude or the DC level of the input signal.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: July 13, 1999
    Assignee: Fujitsu Limited
    Inventors: Satoshi Ide, Takaya Chiba
  • Patent number: 5917375
    Abstract: A low distortion amplifier circuit employing a main amplifier and a correction amplifier in a feed-forward loop, is particularly adapted for amplifying multi-tone signals. The main amplifier produces fundamental frequency power along with undesirable distortion products. The correction amplifier provides correction signals at the distortion product frequencies to cancel the distortion products of the main amplifier. In addition, the correction amplifier produces fundamental frequency power which is combined with the fundamental frequency power of the main amplifier, thereby increasing the amplifier circuit output power.
    Type: Grant
    Filed: June 2, 1997
    Date of Patent: June 29, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Richard Joseph Lisco, Wen Liu, Jerrold Moravchik
  • Patent number: 5917378
    Abstract: A rail-to-rail type of operational amplifier is provided, which has a low offset voltage and improved bandwidth, slew rate, and phase margin. This operational amplifier includes two level-shifting input circuits for receiving two input voltages. The input voltages are further divided into four subvoltages which are then processed by a pair of differential amplifiers. The output differential currents from the differential amplifiers are further processed respectively by two current-summing circuits. The potential difference between the outputs of these two current-summing circuits is then fed to a bias circuit which, in response to the input potential difference, generates a floating bias. An output circuit takes the floating bias as input to thereby generate an output voltage which is regarded as the output of the operational amplifier.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: June 29, 1999
    Assignee: Industrial Technology Research Institute
    Inventor: Dar-Chang Juang
  • Patent number: 5917370
    Abstract: A switch (380) couples one group of MR channels (340, 342, 344) while decoupling another group of MR channels (340, 342 and 344). Thus, the parasitic capacitance associated with the decoupled group of MR channels does not limit the frequency response of the preamplifier.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: June 29, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Motomu Hashizume
  • Patent number: 5917382
    Abstract: A sensor of instantaneous power which is dissipated through a power transistor of the MOS type connected between the output terminal of a power stage and ground. It comprises a MOS transistor having its gate terminal connected to that of the power transistor, source terminal connected to ground, and drain terminal connected to a circuit node which is coupled to the output terminal by means of a current mirror circuit which includes a resistive element in its input leg. Connected to the circuit node is the base terminal of a bipolar transistor which is respectively connected, through a diode and a constant current generator between the output terminal and ground.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: June 29, 1999
    Assignee: STMicroelectronics, S.r.l.
    Inventor: Giorgio Chiozzi
  • Patent number: 5914640
    Abstract: A low noise RF input amplifier circuit has an input impedance Z.sub.IN for matched-impedance coupling to an antenna having a resistive impedance R.sub.A. The amplifier circuit has an input and output nodes, an inverting amplifier, and a feedback capacitor. The input node receives an antenna signal which the inverting amplifier amplifies by a frequency-dependent gain -A(s) approaching -A.sub.0 at low complex frequencies s. The feedback capacitor C couples the output node to the input node for negative feedback and is selected to match Z.sub.IN to R.sub.A. When the amplifier's gain A(s) has a rolloff approximated by ##EQU1## where p.sub.1 is a negative pole, the capacitance of C which matches Z.sub.IN to R.sub.A is approximately inversely proportional to both (A.sub.0 +1) and R.sub.A.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: June 22, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Gitty N. Nasserbakht
  • Patent number: 5912589
    Abstract: A circuit for stabilizing the gain-bandwidth product of analog circuits containing bipolar devices which determine the gm is disclosed. The stabilization circuit is formed to generate a reference current that is proportional to a reference capacitance C.sub.S and the thermal voltage V.sub.T. The reference current is ultimately mirrored (as the bias current) into the bipolar devices which determine the gm within the analog circuit. Since the transconductance gm of a bipolar device can be expressed as collector current, I.sub.C, divided by V.sub.T, the thermal voltage factor of the bias current itself will "cancel" the thermal voltage factor present in the transconductance. The effects related to the remaining variable, the capacitance, will be eliminated as long as the reference capacitance is formed to "track" the analog circuit capacitance by using similar types of capacitance to implement both capacitors and forming both the stabilization circuit and the analog circuit on the same silicon chip.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: June 15, 1999
    Assignee: Lucent Technologies
    Inventors: John Michael Khoury, Angelo Rocco Mastrocola, Randall Russell Pratt