Abstract: Sag of a power signal delivered to of an amplifier is controlled. The maximum amount of sag is limited to limit crossover distortion. A measuring circuit monitors an observed signal to generate a measured signal. A sag control circuit receives the measured signal and one or more input control signals, and in response generates a sag control signal. A regulator circuit receives the sag control signal and a raw power supply signal and in response generates a regulated DC power supply signal for the amplifier. The regulator circuit decreases the maximum power available to the amplifier as the sag control signal magnitude increases, so as to increase distortion and compression in the output signal (e.g., and achieve a "warm", "airy" or "forgiving" sound quality resembling or improving the sound of a vacuum tube amplifier).

Abstract: An amplitude leveling circuit includes a variable gain, linear amplifier which receives an input signal and generates an output signal corresponding to the input signal. The signals may be in differential format. A signal processor receives the output signal and determines a corresponding mean squared signal. The signal processor includes a multiplier which squares the output signal, and an averager that averages the squared signal to generate the mean squared signal. An analyzer compares the mean squared signal with a reference and generates a feedback control signal that controls the gain of the variable gain amplifier in accordance with the difference between the mean squared signal and the reference value. The gain of the variable gain amplifier is controlled so that the amplitude of the output signal is maintained at a desired amplitude level without distorting the originally input waveform shape.

Abstract: An output circuit 1 has a p-type MOS transistor Q1 connected between a power-voltage node and an output node, and an n-type MOS transistor Q2 connected between a ground-voltage node and the output node. A voltage-current conversion circuit 2 outputs a voltage according to the voltage difference between an input signal and the comparison voltage. According to the output from the voltage-current conversion circuit 2, a signal conversion circuit 3 controls the voltage of the gate electrode of the MOS transistor Q1 with a reference of a second specified voltage, and controls the voltage of the gate electrode of the n-type MOS transistor Q2 with a reference of a first specified voltage.

Abstract: In an output signal level control circuit, a level adjusting section receives an input signal to adjust the input signal in level in response to a level control signal. A branching circuit branches a portion of the input signal adjusted in level by the level adjusting section to produce a branched signal. A detecting section includes the first and second detecting sections and generates a detection resultant signal based on a first detection result of the branched signal by the first detecting section and a second detection result of the branch signal by the second detecting section. The first and second detecting sections are operable at a same time. A control signal generating unit generates the level control signal based on the detection resultant signal to output to the level adjusting section.

Abstract: A voltage Vdd-Vee amplified by a differential amplification circuit is provided to a common mode feedback circuit which controls an average potential of the Vdd and Vee to be constant by controlling a gate potential of an E-FET and to a level shift & common mode feedback circuit which controls an average potential of VDD and VBB to be constant by controlling a current mirror circuit having E-FETs via resistors and a diode. Output voltage VAA-VBB is used as an source & input voltage of a voltage controlled oscillator in a PLL circuit using a high frequency. Instead of the level shift & common mode feedback circuit, a differential offset circuit can be used with a pair of current being approximately equal to each other.

Abstract: An automatic gain controller controls the gain of a variable-gain amplifier based on an error signal which is corrected by a correction controller using discrete characteristic data which are sampled from a gain control characteristic of the variable-gain amplifier in sampling steps each being set depending on a variation of the gain control characteristic. The correction controller corrects the error signal based on continuous characteristic data generated from the discrete characteristic data stored in the memory so that the gain control characteristic of the variable-gain amplifier is substantially linear with respect to the error signal.

Abstract: A radially combined RF/Microwave amplifier includes an input divider for dividing the input power signal into "N" input signals, and a single matching/combiner circuit configuration for matching an combining the amplified "N" input signals into one combined output power signal P.sub.T. The system utilizes a stripline/microstrip configuration of the matching/combiner circuitry and suspends this circuitry above one surface of an aluminum chill plate. The input stage of the amplifier is disposed on the opposite surface of the chill plate with the transistors connecting the input stage with the output network across the peripheral edge of the chill plate.

Abstract: A current boost circuit includes: a first transistor M.sub.10 having a gate coupled to an input node; a second transistor M.sub.11 ; a first capacitance C.sub.C3 coupled between a gate of the second transistor M.sub.11 and a drain of the first transistor M.sub.10 ; a third transistor M.sub.17 having a gate coupled to a drain of the second transistor M.sub.11 ; and a second capacitance C.sub.C1 coupled between the drain of the second transistor M.sub.11 and a drain of the third transistor M.sub.17.

Abstract: A linear power amplifier having a pulse density modulated switching power supply including a power supply providing at least a relatively high DC voltage output; a voltage amplifier connected to an external signal source to amplify a relatively low voltage signal received from the external signal source into a relatively high voltage signal; a current amplifier connected to the voltage amplifier to increase the current flow associated with the relatively high voltage signal, as needed, in order to properly drive a load, wherein the current amplifier is powered by a pulse generator. The pulse generator is connected to a first line carrying the relatively high voltage signal to the load, and to a second line supplying power to the current amplifier.

Abstract: A power interface circuit (64) is provided that uses an n-channel MOSFET (66) to control the switching of a power supply (46) to a TDMA power amplifier (58). When turned on, the n-channel MOSFET (66) connects the power supply (46) to the power amplifier (58), and when turned off, it disconnects the power supply from the power amplifier. The power interface circuit (64) includes a switch control circuit (70) that controls the switching state of the n-channel MOSFET (66) in response to a switch control signal. The switch control signal has a first binary state during which the n-channel MOSFET (66) is turned off and a second binary state during which the n-channel MOSFET is turned on.

Abstract: A limiter for a solid state power amplifier (SSPA) protects the amplifier against large peak, short duration noise signals while controlling drive level related phase shifts. The limiter limits noise signals to a safe input level for the power output section of the SSPA. It also uses a pair of resistor networks at its input and output to dampen reflected energy and thus control drive level related phase shifts.

Abstract: This invention is for an improvement in amplifiers resulting in ultra low distortion.

Abstract: A drain terminal of a first N-channel MOS transistor is connected to an output side of a first current mirror input current via a voltage drop device, a first current mirror input current is supplied to the gate terminals of first, third, and fifth N-channel MOS transistors, and a second current mirror input current is supplied to the gate terminals of second and fourth N-channel MOS transistors.

Abstract: The envelope-dependency of the distortion-introducing behavior of an RF power amplifier is used to derive a predistortion signal, that is derived from a plurality of respectively different work function representative signals. Each work function signal, in turn, is based upon the envelope of the input signal to the RF power amplifier. Prior to being combined into a predistortion control signal, each work function signal is controllably weighted in accordance with an error measurement comparison of the amplifier input signal with the amplifier output signal. The error measurement function yields a measure of the error contained in the-amplifier output signal, and drives a weight adjustment control mechanism, which controllably varies a set of weights for each of in-phase and quadrature components of the respectively different signal functions, in such a manner as to minimize the measured error.

Abstract: A multi-stage differential amplifier includes first and second DC current paths with first and second stage amplification transistors included in each current path so that both stages share the same DC bias current. In one embodiment, an automatic gain control circuits are included in the second stage to control gain and maintain low noise figure.

Abstract: A differential amplifier receiving a first input signal and a second input signal, respectively, and amplifying voltage difference between the first and second input signals to output an output signal includes a first source follower circuit receiving an external data signal as the first input signal, and having an output node; a second source following circuit having a constant current source FET and receiving a reference voltage as the second input signal; and a bias circuit providing a signal having the same phase as the data signal from the output node of the first source follower circuit and inputting that signal to a gate terminal of the constant current source FET of the second source follower circuit.

Abstract: A tuned amplifier that can be produced easily in an integrated circuit and by which the tuning frequency and the maximum damping are arbitrarily adjusted without mutual interference.

Abstract: A continuous cardiac output monitor a general-purpose monitoring console with local display and communication facilities, and a module removably interfacing with the console to configure the latter for performing continuous cardiac output monitoring. The module includes a switch-mode high efficiency power amplifier for providing electrical heating power at a selected voltage, frequency, and wave form to a heating element of a continuous cardiac output monitoring catheter, which catheter at a distal end portion thereof is immersed in the blood flow of a patient. The catheter effects a temperature transient in the patient's blood flow by the controlled application of electrical resistance heating utilizing electrical power from the power amplifier, and this temperature transient is sensed and used to derive a value for the patient's cardiac output.

Abstract: A high efficiency power amplifier 600 consists of a non-linear radio frequency (RF) Doherty power amplifier (67) and a linearization circuit, such as, for example, a Cartesian Feedback circuit (33), an RF feedback circuit (38), an IF feedback circuit (48), or a feedforward circuit (55). The Doherty amplification stage (67) may be implemented with a BJTs, FETs, HBTs, H-FETs, PHEMTs, or any other type power transistor technology or device.

Abstract: Various circuit techniques to implement continuous-time filters with improved performance are disclosed. The present invention uses RMC type integrators that exhibit lower harmonic distortion. In one embodiment, a novel high-gain two-pole operational amplifier is used along with RMC architecture to achieve lower harmonic distortion. In another embodiment, the present invention uses dummy polysilicon resistors to accurately compensate for the distributed parasitics of the polysilicon resistors used in RMC integrator. In yet another embodiment, the present invention provides an on-chip tuner with a differential architecture for better noise immunity.