Patents Examined by James Demakis
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Patent number: 6859350Abstract: A device for controlling the opening/closing operation of an electric switchgear in a power disribution network comprising a control unit, for controlling an electromagnetic actuator operatively connected to the movable contact of said switchgear. Said control unit includes first processing means for generating, based on predefined data, a first control signal which is indicative of the actual law of motion of said movable contact of the switchgear.Type: GrantFiled: October 27, 2000Date of Patent: February 22, 2005Assignee: ABB Technology AGInventors: Giuliano Corbetta, Roberto Borlotti
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Patent number: 6859351Abstract: Electrostatic discharge (ESD) elements facilitate protection of electronic components from ESD events. The ESD element includes a pair of spark gaps between a first side and second side of the ESD element. The first side of the ESD element includes a peaked portion and a substantially planar portion. The second side of the ESD element includes a peaked portion opposite the substantially planar portion of the first side and a substantially planar portion opposite the peaked portion of the first side. This asymmetry facilitates use of peaked emitters regardless of the polarity of the charge applied to the ESD element while further facilitating the use of more optimized receiver surfaces opposite the emitters.Type: GrantFiled: August 9, 2002Date of Patent: February 22, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Daniel J. Byrne, Amol S. Pandit, Mark Nelson Robins
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Patent number: 6856497Abstract: Along with the expansion of the application range of solar power generation systems, connection to a single-phase 100-V system is required. To most easily meet this requirement, a non-insulated inverter with a single-phase two-wire 100-V output is used. It is preferable to use an inverter with a single-phase two-wire 200-V output, i.e., a most popular commercially available inverter. For this purpose, a power supplied from a solar battery is converted into a single-phase three-wire 200-V AC power form by the inverter. The output from the inverter with non-insulated inputs and outputs is supplied to a system through a transformer arranged to connect the line of the single-phase three-wire 200-V AC power to a single-phase two-wire 100-V system with one line grounded. To make a ground fault sensor incorporated in the inverter function, the median potential line of the single-phase three-wire 200-V AC power is connected to the ground line of the system.Type: GrantFiled: September 24, 2001Date of Patent: February 15, 2005Assignee: Canon Kabushiki KaishaInventors: Masaki Suzui, Naoki Manabe, Nobuyoshi Takehara
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Patent number: 6853533Abstract: A semiconductor wafer support assembly and method of fabricating the same are provided. In one embodiment, the method and resulting assembly include attaching a pedestal joining-ring to a bottom surface of a ceramic puck. Low temperature brazing a composite cooling plate structure to the bottom surface of the ceramic puck, where the pedestal joining-ring circumscribes the composite cooling plate structure. Thereafter, a pedestal is electron-beam welded to the pedestal joining-ring.Type: GrantFiled: June 13, 2001Date of Patent: February 8, 2005Assignee: Applied Materials, Inc.Inventor: Vijay D. Parkhe
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Patent number: 6853528Abstract: The present invention combines sensor portions 22,23 of the device for measuring either current flowing through the line from the power inlet to the power outlet or voltage, or both, and bushings 150, 160 installed at either the power inlet or the power outlet, or both, so as to reduce the size of the gas insulating apparatus. Specifically, the above-mentioned sensor portions 22,23 are installed in the space inside the porcelain tube 15 that constitutes the bushings 150, 160. As this space, it is preferable to use the space on the outer-periphery side of the electric field relaxation member 21 provided inside the porcelain tube 15.Type: GrantFiled: January 22, 2003Date of Patent: February 8, 2005Assignee: Hitachi, Ltd.Inventors: Tatsuro Kato, Tomoaki Utsumi, Fumihiro Endo, Kazuo Kobayashi, Kazuhiro Saito
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Patent number: 6853527Abstract: The present invention discloses an over-current protection apparatus for high voltage, which connects the ceramic current-sensing element and polymer current-sensing element in series to form a novel over-current protection apparatus. By the characteristic of the polymer current-sensing element having higher switching off speed, the invention first responds to the over-current by raising its temperature, and then the heat is thermally conducted through the adhesive layer to the ceramic current-sensing element, resulting in a voltage drop produced by the over-current partially or predominantly received by the ceramic current-sensing element. Thus, the over-current protection device of the invention not only can endure high voltage (>600V), but also will not exhibit a negative temperature coefficient phenomenon.Type: GrantFiled: October 31, 2002Date of Patent: February 8, 2005Assignee: Polytronics Technology CorporationInventors: Edward Fu-Hua Chu, David Shau-Chew Wang, Yun-Ching Ma
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Patent number: 6850403Abstract: Apparatus and method for generating and controlling flows of positive and negative air ions includes interposing isolated sets of electrodes in a flowing air stream to separately produce positive and negative ions. The rates of separated production of positive and negative ions are sensed to control ionizing voltages applied to electrodes that produce the ions. Variations from a balance condition of substantially equal amounts of positive and negative ions flowing in the air stream are also sensed to alter bias voltage applied to a grid electrode through which the air stream and ions flow.Type: GrantFiled: September 9, 2002Date of Patent: February 1, 2005Assignee: Ion Systems, Inc.Inventors: Peter Gefter, Alexander Ignatenko, Gopalan Vijaykumar, Aleksey Klochkov
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Patent number: 6850399Abstract: The present invention combines sensor portions 22,23 of the device for measuring either current flowing through the line from the power inlet to the power outlet or voltage, or both, and bushings 150, 160 installed at either the power inlet or the power outlet, or both, so as to reduce the size of the gas insulating apparatus. Specifically, the above-mentioned sensor portions 22,23 are installed in the space inside the porcelain tube 15 that constitutes the bushings 150, 160. As this space, it is preferable to use the space on the outer-periphery side of the electric field relaxation member 21 provided inside the porcelain tube 15.Type: GrantFiled: March 1, 2000Date of Patent: February 1, 2005Assignee: Hitachi, Ltd.Inventors: Tatsuro Kato, Tomoaki Utsumi, Fumihiro Endo, Kazuo Kobayashi, Kazuhiro Saito
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Patent number: 6847516Abstract: An electrostatic chuck includes: a metal plate; a dielectric layer on the metal plate, the dielectric layer and the metal plate having a lift pin hole and an injection hole of a cooling gas; a lift pin moving up-and-down through the lift pin hole; first protection insulator on an inner surface of the lift pin hole; and second protection insulator on an inner surface of the injection hole.Type: GrantFiled: September 4, 2002Date of Patent: January 25, 2005Assignee: Jusung Engineering Co., Ltd.Inventors: Gi-Chung Kwon, Hong-Sik Byun, Sung-Weon Lee, Hong-Seub Kim, Sun-Seok Han, Bu-Jin Ko, Joung-Sik Kim
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Patent number: 6839213Abstract: A semiconductor power module capable of efficiently utilizing the performance of the module and facilitating management of the module in custody. The semiconductor power module having one or more semiconductor power switching elements and a drive unit is provided with a non-volatile memory for storing use history of the module and a drive unit. The use history contains information of one of the number of switching times of the semiconductor power switching element, the number of over-current detections of the semiconductor power switching element and a temperature rise of the semiconductor power module.Type: GrantFiled: August 7, 2002Date of Patent: January 4, 2005Assignee: Hitachi, Ltd.Inventors: Kazuhisa Mori, Takashi Ikimi, Shuji Katoh, Yutaka Sato
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Patent number: 6831818Abstract: A method and apparatus for provision of a power supply that combines the advantages of current regulation with voltage limitation to enable corona chargers that can be run at higher current regulated set points for lower resistance sheets. The voltage limit will protect against arcing when high resistance media is used. This wider operation window can be provided without the need to track sheet types in the process and shift the operating set points, which would result in much more complicated machine control algorithms. The regulation and limit reference controls retain the ability of changing the operating set points of the power supply, such that it can be adapted to alternate physical configurations of the discharging system and the printing system.Type: GrantFiled: May 25, 2001Date of Patent: December 14, 2004Assignee: NexPress Solutions LLCInventors: Andreas Dickhoff, Charles H. Hasenauer
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Patent number: 6826027Abstract: A method for isolating suites includes the steps of isolating the suites when an alarm is initiated, setting a timer during isolation creating a window of time to clear a short circuit, clearing said short circuit, removing isolation from the suites as the timer reaches completion, determining if there is a short circuit in each of the suites, and isolating suites that have a short circuit.Type: GrantFiled: June 11, 2002Date of Patent: November 30, 2004Assignee: Edwards Systems Technology, Incorporated, Inc.Inventor: Peter Galgay
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Patent number: 6826026Abstract: An output circuit for improved ESD protection (FIG. 2) comprising a pMOS pull-up output transistor connected between a signal (I/O) pad 220 and Vdd power supply 240, the pull-up transistor located in a n-well 203 and having at least one gate 210, the gate connected to internal circuitry 230. A dummy pMOS transistor connected in parallel with the pull-up transistor, the dummy transistor also located in the n-well 203, whereby both the pull-up transistor and the dummy transistor participate in protection against an ESD event. The dummy transistor having at least one gate 251, this gate connected through a resistor 260 to the Vdd power supply 240. The n-well 203 connected to the Vdd power supply 240.Type: GrantFiled: August 6, 2002Date of Patent: November 30, 2004Assignee: Texas Instruments IncorporatedInventors: Charvaka Duvvury, Roger A. Cline
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Patent number: 6813128Abstract: A method and apparatus for identifying potential problems within systems having rotating biased components. The system employs diagnostics to the rotating biased components to provide status feedback to the machine's control unit when any type of bias fault has occurred. The system then responds to this fault signal making it possible to stop operation and alert the machine operator. The present invention also discloses a method for detecting open load, over load, shorted load and intermittent contact with the load or arcing conditions, as well as power supply output failure in a bias system. A digital signal that may be may be sensed by interrupt or sampling methods and filtered appropriately with software is provided to a machine control system. The result is that bias failures may be detected automatically by machine control. The system also provides a method to alert the operator service personnel on which area of the machine to service.Type: GrantFiled: May 25, 2001Date of Patent: November 2, 2004Assignee: NexPress Solutions LLCInventors: Charles H. Hasenauer, Joseph J. Furno
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Patent number: 6813123Abstract: A method is for protecting a DC generator against overvoltage in the event of a loss of load. A voltage limit value is defined and, when starting the current generator, one or a few small current pulses are generated during an initial phase. The voltage is measured across the output of the current generator during the initial phase and the voltages measured across the output of the current generator are compared with the voltage limit value. There is a changeover to normal operation only if all the voltages across the output of the current generator measured during the initial phase are below the voltage limit value. The current generation is interrupted and a loss of load is indicated if any one of the voltages across the output of the current generator measured during the initial phase exceeds the voltage limit value.Type: GrantFiled: April 11, 2003Date of Patent: November 2, 2004Assignee: Alston Power N.V.Inventor: Magnus Pihl
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Patent number: 6807039Abstract: A junction field effect transistor (JFET), acting as a switch, is coupled between the source and gate of a metal oxide semiconductor field effect transistor (MOSFET). A capacitor is connected in parallel with the MOSFET's “Miller capacitance” by being coupled between the gate and drain of the MOSFET in series with a current limiting resistor. When the JFET is on, it has a low impedance with zero gate voltage and forces the gate to source voltage of the MOSFET to remain near zero and, thus, the MOSFET in a high impedance state, until the capacitor charges to the supply voltage.Type: GrantFiled: July 8, 2002Date of Patent: October 19, 2004Assignee: ADC DSL Systems, Inc.Inventor: Joel F. Priest
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Patent number: 6807040Abstract: Over-current protection is accomplished in an output transistor (MP) of an electronic circuit wherein an input signal (Vgatedrive) Is Applying to a first conductor (19) coupled to a gate of the output transistor to cause an output current (Iout) to flow through the output transistor and an output terminal (11) of the electronic circuit. A limit voltage (VLIMIT) who is applied to an input (21) of a voltage clamping circuit (18) to cause a clamping current to flow in the first conductor (19) as needed to prevent the magnitude of the input signal (Vgatedrive) from being less than the magnitude of the limit voltage (VLIMIT) so that the output current (Iout) is limited to a maximum current limit determined by the limit voltage (VLIMIT).Type: GrantFiled: April 19, 2001Date of Patent: October 19, 2004Assignee: Texas Instruments IncorporatedInventors: Vadim V. Ivanov, David R. Baum
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Patent number: 6801419Abstract: A voltage regulator is provided in which an abnormal operation of an overcurrent protection circuit is prevented. The voltage regulator makes operating states of a PMOS output driver transistor and a first PMOS sense transistor always the same to set a ratio of currents flowing to the transistors equal to a transistor size ratio thereof, thereby solving the problem that a load current under which an overcurrent protection operates becomes inaccurate by the decrease in an output voltage due to an abnormal operation of an overcurrent protection circuit in the case in which a different of an input voltage VIN and an output voltage VOUT is small and the influence of channel length modulation in the case in which the difference of an input voltage VIN and an output voltage VOUT is large.Type: GrantFiled: June 21, 2002Date of Patent: October 5, 2004Assignee: Seiko Instruments Inc.Inventor: Atsuo Fukui
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Patent number: 6795283Abstract: A combination electricals package (12, 32) particularly for use with fractional horsepower compressor motors for various appliances has a first recess formed in the package for receipt of a motor starter (14) and a second recess formed in the package for receipt of a run capacitor (16) potted therein and having capacitor leads (16a) connected to a capacitor lead connecting portion (20e, 20e′) of a connector (20, 20′) also having a motor pin connecting portion (20d) and a motor starter connecting portion (20b). The capacitor lead connecting portion in a preferred embodiment includes spaced apart parallel extending rails to accommodate capacitor lead misalignment. In a modified embodiment the capacitor lead connecting portion includes quick connect receptacles for conventional capacitor quick connect terminals. The connectors are formed so that the same connector can be used in two opposite orientations for left and right connectors.Type: GrantFiled: April 1, 2002Date of Patent: September 21, 2004Assignee: Texas Instruments IncorporatedInventors: Richard J. Lisauskas, William R. LeBeau, Russell P. Brodeur
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Patent number: 6795292Abstract: An apparatus for reducing by-product formation in a semiconductor wafer-processing chamber. In a first embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange. A collar is disposed over the peripheral flange defining a first gap therebetween, and circumscribes the chuck. A heater element is embedded within the collar and adapted for connection to a power source. In a second embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange, and a collar having a heater element embedded therein. The collar is disposed over the peripheral flange to define a gap therebetween, and circumscribes the chuck. Moreover, a pedestal having a gas delivery system therein is disposed below the chuck and collar. In a third embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange, a collar, and a waste ring having a heater element embedded therein.Type: GrantFiled: May 15, 2001Date of Patent: September 21, 2004Inventors: Dennis Grimard, Arnold Kholodenko, Alex Veytser, Senh Thach, Wing Cheng