Patents Examined by Janice A. Howell
  • Patent number: 5166631
    Abstract: A circuit for regeneration and bandwidth limitation of a quasi-periodic digital input signal. By controlled alternating internal triggering of two monoflops utilizing feedback or external triggering of the two monoflops by means of the input signal, erratic pulses are reliably suppressed, bypass pulses are delivered without time delay and frequencies outside a preset band are not transmitted.
    Type: Grant
    Filed: December 3, 1991
    Date of Patent: November 24, 1992
    Assignee: Asea Brown Boveri Ltd.
    Inventors: Bohumi Kyrian, Sippo L. Saaski, Jukka T. Vermasvuori
  • Patent number: 5166551
    Abstract: An output circuit for semiconductor integrated circuit includes an input terminal, an output terminal, a supply terminal, first and second transistors, and first and second drive circuits. One terminal of the first and second transistors are coupled to the power voltage terminal, and the other terminals thereof are coupled to the output terminal. The first drive circuit turns on the first transistor when voltage of the input terminal is in a different logical level from voltage of the supply terminal. The second drive circuit turns on the second transistor when voltage of the input terminal is in a different logical level from the voltage of the supply terminal, and turns off the second transistor when voltage of the output terminal is in the range between a predetermined threshold voltage and the voltage of the supply terminal.
    Type: Grant
    Filed: December 18, 1990
    Date of Patent: November 24, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Setsufumi Kamuro
  • Patent number: 5166543
    Abstract: A current regulating circuit for an inductive load (12) is proposed, in particular for an electrohydraulic pressure regulator for an automatic transmission of a motor vehicle. A push-pull end stage (16) controls the flow of current through the load (12). Connected in series with the load (12) is a measuring resistor (11), the voltage drop of which, as an actual current value, is applied along with a command current value to a comparison stage (23, 34), by the clocked output signal of which the end stage (16) can be controlled. The measuring resistor (11) is disposed between the load (12) and a first switch transistor (10) of the end stage (16). The potential at one of the pickups (19, 20) of the measuring resistor (11) is provided as a variable reference potential for an auxiliary voltage source (31) supplying the comparison stage (23, 34), which source has switch means (40) for generating an auxiliary voltage (Uh) that is constant relative to the variable reference potential.
    Type: Grant
    Filed: September 12, 1991
    Date of Patent: November 24, 1992
    Assignee: Robert Bosch GmbH
    Inventors: Claus Schneider, Karsten-Erik Thiele
  • Patent number: 5166632
    Abstract: A limiter circuit utilizes an RC circuit to provide negative feedback of the average value of the output signal of an amplifier, which may be an op-amp or a comparator, to the inverting input of the amplifier. The midpoint of the amplifier supply voltage is applied to the non-inverting input so that the amplifier operates in the linear range. This, combined with the elimination of the effects of offset produced by the negative feedback, results in a limiter circuit with increased sensitivity to small input signals and therefore extended dynamic range. Where a following circuit would be adversely affected by noise, hysteresis provided by positive feedback applied to the non-inverting input of the amplifier causes the limiter circuit to oscillate, at a frequency determined by the magnitude of the positive feedback and the time constant of the RC circuit providing the negative feedback, for input signals having an amplitude below a threshold set by the magnitude of the positive feedback.
    Type: Grant
    Filed: October 10, 1991
    Date of Patent: November 24, 1992
    Assignee: Westinghouse Electric Corp.
    Inventor: Raymond W. MacKenzie
  • Patent number: 5166541
    Abstract: A switching apparatus including a plurality of semiconductor switching elements each of which has a pair of main circuit electrodes and a control electrode. Each load-side electrode of the pair of main circuit electrodes of each semiconductor switching element is connected in common and the control electrodes are controlled by a common control power supply so as to control the conductance between the main circuit electrodes. A transformer having a first coil and a second coil of the same polarity as the first coil is connected to each of the semiconductor switching elements. The first coil is inserted between the control signal source and the load-side main circuit electrode, and the second coil is inserted between the control signal source and the control electrode.
    Type: Grant
    Filed: July 24, 1991
    Date of Patent: November 24, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Haruyoshi Mori
  • Patent number: 5166959
    Abstract: A circuit for time stamping event signals, e.g. zero-crossings, using coarse and fine timers. The fine timer is a circuit section which subdivides a period from a phase-locked ring-oscillator into 2N subparts. An event signal is timed by latching a digital representation of a particular subpart. The digital representation of the subpart is an N-bit dual thermometer code which uniquely identifies each subpart with each adjacent subpart differing by only one bit. The subparts are made finer in time quantization than the propagation delay of one active element in the ring oscillator by the use of linear combiner elements. The dual thermometer code, encoded post-latching into a binary code, forms the "fine" timing part of a binary word representation of the event time. The event also latches the count states of a pair of lead-lag counters in a master-slave configuration counting ring oscillator periods. These counters change states respectively before and after the dual thermometer code turn-overs.
    Type: Grant
    Filed: December 19, 1991
    Date of Patent: November 24, 1992
    Assignee: Hewlett-Packard Company
    Inventors: David C. Chu, Thomas A. Knotts
  • Patent number: 5166544
    Abstract: A driver circuit provides a high output current at a fast slew rate to a low impedance load. The driver circuit has an output circuit including a first bipolar transistor having a collector emitter path between a voltage supply line and a node for connection to a load. The output circuit also includes a first FET having its source-drain path connected between the voltage supply line and the base of the bipolar transistor, and its gate connected to an input node. An additional circuit supplies drive current to the base of the first bipolar transistor only to assist the first bipolar transistor turn-on, so that the additional circuit does not add extra voltage drop across the first bipolar transistor during turned on operation. In one embodiment, the first and second bipolar transistors are NPN transistors, and the first and second FETs are p-channel FET devices.
    Type: Grant
    Filed: September 18, 1991
    Date of Patent: November 24, 1992
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Francesco Carobolante
  • Patent number: 5166542
    Abstract: A signal converter includes a frequency-to-voltage converter for converting a frequency of an input signal received via an input terminal into a control voltage. The input signal contains a noise signal having a frequency different from the frequency of the input signal. The control voltage changes in accordance with a change of the frequency of the input signal. A filter has a variable cutoff frequency so that the noise signal is eliminated from the input signal and outputs a filtered signal. The variable cutoff frequency is changed in accordance with a change of the control voltage so that a change of the variable cutoff frequency follows a change of the frequency of the input signal. A comparator compares the filtered signal with a reference voltage and converts the filtered signal into a pulse signal having a pulse width corresponding to the frequency of the input signal.
    Type: Grant
    Filed: August 7, 1990
    Date of Patent: November 24, 1992
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Kunihiro Matsubara, Tetsuo Ide
  • Patent number: 5166961
    Abstract: A CT scanner (10) includes a radiation source (12) mounted for rotation about a scan circle (14). A ring of radiation detectors (30) includes narrow detectors (30.sub.n) and wide detectors (30.sub.w). The narrow and wide detectors are separately sampled (42.sub.n, 42.sub.w) and operated on with different digital filters (50.sub.n, 50.sub.w). The wider detectors have a more limited frequency response (32) which typically includes an out of phase response portion (36); whereas, the output signal from the narrow detetector has a higher frequency response (34), i.e. better resolution. The filters (50.sub.n, 50.sub.w) are selected to yield optimum signal to noise ratio. When the data is merged (60), the resultant data has a modulation transfer function with response (62) which has a higher frequency component or improved resolution relative to response (70) that would be obtained from detectors of uniform width of the average of the narrow and detector widths.
    Type: Grant
    Filed: September 4, 1990
    Date of Patent: November 24, 1992
    Assignee: Picker International, Inc.
    Inventors: Carl J. Brunnett, Chris J. Vrettos
  • Patent number: 5166553
    Abstract: A semiconductor circuit including first and second FET's for delivering an output signal without being affected by a change in threshold voltage of the FET's is disclosed. According to one practical form of the semiconductor circuit, the drain-source current path of an additional FET whose gate and source are shorted to each other, is connected in parallel to the drain-source current path of the first FET whose gate and drain are shorted to each other, to make the voltage-current characteristic of the second FET agree with that of the parallel combination of the first and additional FET's. According to another practical form of the semiconductor circuit, a voltage dividing circuit is connected in parallel to the drain-source current path of the first FET, and a divided output voltage from the voltage dividing circuit is applied between the gate and source of each of the first and second FET's.
    Type: Grant
    Filed: June 12, 1989
    Date of Patent: November 24, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Nobuo Kotera, Kiichi Yamashita, Hirotoshi Tanaka, Satoshi Tanaka, Yasushi Hatta, Minoru Nagata
  • Patent number: 5166546
    Abstract: An integrated circuit for generating a reset signal includes terminals for a first and a second supply potential. A serial RC network is connected between the terminals. The RC network has an ohmic component, a capacitive component and a first circuit node of the integrated circuit connected between the components. An initializing circuit is connected parallel to the RC network. The initializing circuit has an output forming a second circuit node of the integrated circuit carrying a potential with a maximum value specified by dimensioning the initializing circuit, when the first supply potential is applied. An inverter circuit is connected between the first circuit node and the terminal for the second supply potential in terms of supply voltage. The inverter circuit has an input connected to the second circuit node and an output forming a third circuit node of the integrated circuit.
    Type: Grant
    Filed: January 22, 1992
    Date of Patent: November 24, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventors: Dominique Savignac, Dieter Gleis, Brian Murphy
  • Patent number: 5164615
    Abstract: A reference voltage device that consists of a series combination of reverse biased p-n junctions, forward biased p-n junctions, and Schottky hot carrier diodes. The relatively low voltage and low negative temperature coefficient of Schottky diodes permit great flexibility in correcting areas of nonlinearity in the offsetting temperature dependent characteristics of conventional forward biased junctions and zener diodes. Because of the stability of Schottky hot carrier diodes to radiation, the method and apparatus of this invention are particularly suitable for designing radiation hardened reference diodes, as well. Finally, the Schottky forward biased diode is suitable for integration into a single monolithic chip structure in series with conventional reverse and forward biased p-n junctions.
    Type: Grant
    Filed: June 3, 1991
    Date of Patent: November 17, 1992
    Assignee: Microsemi Corp.
    Inventor: Cecil K. Walters
  • Patent number: 5164852
    Abstract: A liquid crystal layer interposed between a pair of glass substrates is re-oriented for the purpose of eliminating zig-zag dislocations and providing a clear threshold voltage. First, the liquid crystal layer is transformed by elevating the temperature into an isotropic phase which affords a low viscosity, and then applied with an alternating electric field in order to urge the liquid crystal layer to be oriented in a direction parallel with the substrates. Next, the liquid crystal layer is gradually cooled to room temperature while the electric field application continues.
    Type: Grant
    Filed: April 13, 1992
    Date of Patent: November 17, 1992
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Toshimitsu Konuma
  • Patent number: 5164970
    Abstract: A cascaded driver circuit has two or more stages connected to a common serial data signal line and a common clock pulse signal line. Each stage has a counter circuit for dividing the frequency of the clock pulse signal and an enable latch circuit for latching an enable signal, received from the preceding stage, in response to the divided clock pulses. A data latching circuit in each stage latches serial data in response to the clock pulse signal, starting when the enable signal is latched and stopping when a first number of bits of serial data have been latched. An enable output circuit in each stage sends an enable signal to the next stage when the data latching circuit has latched a second number of bits, the second number being at least two less than the first number.
    Type: Grant
    Filed: December 14, 1990
    Date of Patent: November 17, 1992
    Assignee: OKI Electric Industry Co., Ltd.
    Inventors: Yasuhiro Shin, Teruyuki Fujii
  • Patent number: 5165075
    Abstract: A novel structure of an active electro-optic device is disclosed. The device is provided with complementary transistors therein which comprise a p-channel TFT and an n-channel TFT. In case of a liquid crystal electro-optic deivce, the device comprises a pair of substrates, a liquid crystal provided therebetween, picture element electrode islands arranged in matrix form and provided on one of the substrates, complementary transistors provided thereon, and signal lines provided thereon. Gate electrodes of p-channel and n-channel transistors of these complementary transistors are connected to some of the signal lines while source (or drain) electrodes thereof are connected to the electrode islands and drain (or source) electrodes thereof are connected to other signal lines.
    Type: Grant
    Filed: September 11, 1991
    Date of Patent: November 17, 1992
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Akira Mase
  • Patent number: 5164850
    Abstract: A metal-insulator-metal substrate for a liquid crystal display device including an insulating substrate; a first conductor layer of tantalum nitride formed on a region of the insulating substrate; an insulator layer formed to cover at least a portion of the first conductor layer; a second conductor layer formed to cover at least a portion of the insulator layer; and a pixel element formed on another region of the insulating substrate and connected to the second conductor layer, one of the conductor layers having a nitriding ratio in the range of 0.05 to 0.14 or being formed of sublayers having different nitriding ratios.
    Type: Grant
    Filed: January 23, 1991
    Date of Patent: November 17, 1992
    Assignees: Sanyo Electric Co., Ltd., Tottori Sanyo Electric Co., Ltd.
    Inventors: Toshihiko Tanaka, Naoto Fukuta, Shouji Nakanishi, Hiroshi Inamura, Takao Yamauchi
  • Patent number: 5165093
    Abstract: An interstitial X-ray needle includes an elongated X-ray tube coupled to an electron emitter at one end of the tube, with a converter element being disposed at a tip of the other end of the tube for converting emitted electrons into X-ray; a solenoid coil wound around the tube for providing a magnetic field that confines the emitted electrons within a narrow beam; an elongated outer casing enclosing the tube and coil; and a pipe coaxially disposed between the casing and the tube for defining an inner annular flow chamber between the tip of the tube and a coolant inlet in the casing and an outer annular flow chamber between the tip of the tube and a coolant outlet in the casing.
    Type: Grant
    Filed: March 23, 1992
    Date of Patent: November 17, 1992
    Assignee: The Titan Corporation
    Inventors: Robert B. Miller, John R. Smith, Carl A. Muehlenweg
  • Patent number: 5164857
    Abstract: A very wide band beam splitter for operation in the range between deep ultraviolet of 190 nanometers and into infrared is comprised of uncoated transparent material only 0.10 to 0.15 mm. in thickness.
    Type: Grant
    Filed: June 24, 1991
    Date of Patent: November 17, 1992
    Assignee: Nanometrics, Incorporated
    Inventor: Warren W. Lin
  • Patent number: 5164611
    Abstract: This invention relates to a waveshaping circuit for producing a bus output voltage signal having a substantially sinusoidal rising transition from a low voltage level to a high voltage level in response to the rising edge of a data input signal, and a substantially sinusoidal falling transition from said high voltage level to said low voltage level, in response to the falling edge of said data input signal. The circuit uses AC coupling to control the waveshaping. This allows the circuit to operate with a large ground offset voltage difference between circuit ground and bus ground. An exponential current source provides a current to a regulator bus driver which charges and discharges a capacitor in response to the the rising edge or falling edge on the data input signal.
    Type: Grant
    Filed: October 18, 1990
    Date of Patent: November 17, 1992
    Assignee: Delco Electronics Corporation
    Inventor: Richard A. Summe
  • Patent number: 5164598
    Abstract: Novel methods and devices are provided involving at least one chamber, at least one capillary, and at least one reagent involved in a system providing for a detectable signal. As appropriate, the devices provide for measuring a sample, mixing the sample with reagents, defining a flow path, and reading the result. Of particular interest is the use of combinations of specific binding pair members which result in agglutination information, where the resulting agglutination particles may provide for changes in flow rate, light patterns of a flowing medium, or light absorption or scattering. A fabrication technique particularly suited for forming internal chambers in plastic devices is also described along with various control devices for use with the basic device.
    Type: Grant
    Filed: February 5, 1991
    Date of Patent: November 17, 1992
    Assignee: Biotrack
    Inventors: Robert S. Hillman, Michael E. Cobb, Jimmy D. Allen, Ian Gibbons, Vladimir E. Ostoich, Laura J. Winfrey