Patents Examined by Jason Proctor
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Patent number: 7369971Abstract: The present invention provides a method and an apparatus for generating post-machining three-dimensional shape data for a workpiece on the basis of an NC program. The three-dimensional shape data generating apparatus comprises: a stock blank lattice point generating section (11) which represents the shape of a stock blank for the workpiece by three-dimensional lattice point data (L) comprising a multiplicity of lattice points on the basis of stock blank shape data; a tool path processing section (12) which generates data indicative of a tool traveling region in which the tool is to move with respect to the workpiece on the basis of the NC program, tool shape data and the stock blank shape data, then removes lattice points located in the tool traveling region; and a shape data generating section (15) which generates the post-machining three-dimensional shape data for the workpiece on the basis of the remaining lattice points.Type: GrantFiled: January 3, 2002Date of Patent: May 6, 2008Assignees: Mori Seiki Co., Ltd., Intelligent Manufacturing Systems InternationalInventor: Mitsuhiko Kadono
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Patent number: 7366645Abstract: A method for recognition of an input human motion as being the most similar to one model human motion out of a collection of stored model human motions. In the preferred method, both the input and the model human motions are represented by vector sequences that are derived from samples of angular poses of body parts. The input and model motions are sampled at substantially different rates. A special optimization algorithm that employs sequencing constraints and dynamic programming, is used for finding the optimal input-model matching scores. When only partial body pose information is available, candidate matching vector pairs for the optimization are found by indexing into a set of hash tables, where each table pertains to a sub-set of body parts. The invention also includes methods for recognition of vector sequences and for speech recognition.Type: GrantFiled: May 1, 2003Date of Patent: April 29, 2008Inventor: Jezekiel Ben-Arie
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Patent number: 7353151Abstract: A method of effecting an analysis of behaviors of substantially all of a plurality of real segments together constituting a whole human body, by conducting a simulation of the behaviors using a computer under a predetermined simulation analysis condition, on the basis of a numerical whole human body model provided by modeling on the computer the whole human body in relation to a skeleton structure thereof including a plurality of bones, and in relation to a joining structure of the whole human body which joins at least two real segments of the whole human body and which is constructed to have at least one real segment of the whole human body, the at least one real segment being selected from at least one ligament, at least one tendon, and at least one muscle, of the whole human body.Type: GrantFiled: October 2, 2001Date of Patent: April 1, 2008Assignee: Kabushiki Kaisha Toyota Chuo KenkyushoInventors: Katsuya Furusu, Isao Watanabe, Kazuo Miki
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Patent number: 7349833Abstract: A coupled level set projection method is incorporated into a finite-difference-based ink-jet simulation method to make the simulation easier and faster to run and to decrease the memory requirements. The coupled level set projection method is based on a central difference discretization on uniform rectangular grids. A constructed numerical projection operator, in the form of either a finite difference projection operator or a finite element projection operator, can be used in the central difference scheme, in which case the resulting linear systems can be solved by a multi-grid method. The finite difference projection operator is used when the fluid velocity is located at grid points and the pressure at cell centers, whereas the finite element projection operator is used when the fluid velocity is located at cell centers and the pressure at grid points.Type: GrantFiled: October 1, 2004Date of Patent: March 25, 2008Assignee: Seiko Epson CorporationInventor: Jiun-Der Yu
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Patent number: 7313504Abstract: Modeling of a three-dimensional object includes storing data representing a computer model of the three-dimensional object. The data includes a number of feature objects each of which defines a feature of the computer model. A feature chain is formed and includes at least one feature object having a design effect limited in scope such that an operation for removing material operates to affect the feature of the computer model defined by another feature object in the same feature chain and does not affect the feature of the computer model defined by the feature object not in said same feature chain. Multiple feature chains can be combined to form an interrelationship among feature objects that represents a hierarchy defining construction of the model from the feature objects.Type: GrantFiled: October 11, 2002Date of Patent: December 25, 2007Assignee: SolidWorks CorporationInventors: Ricardo Chin, Robert P. Zuffante, Ilya Baran
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Patent number: 7308386Abstract: Disclosed herein is a method of horizontally structured CAD/CAM modeling, comprising: establishing a coordinate system; adding a base feature; adding a form feature; where the form feature exhibits an associative relationship with the coordinate system. Also disclosed herein is a horizontally structured CAD/CAM model, comprising: a coordinate system; a base feature; a form feature; where the form feature exhibits an associative relationship with the coordinate system. Further disclosed is a storage medium encoded with a machine-readable computer program code for horizontally structured CAD/CAM modeling. The storage medium including instructions for causing a computer to implement the method of horizontally structured CAD/CAM modeling and manufacturing. Additionally disclosed is a computer data signal for horizontally structured CAD/CAM modeling. The computer data signal comprising code configured to cause a processor to implement a method of horizontally structured CAD/CAM modeling and manufacturing.Type: GrantFiled: October 24, 2001Date of Patent: December 11, 2007Assignee: Delphi Technologies, Inc.Inventors: Diane M. Landers, Pravin Khurana, Bradley T. Muscott
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Patent number: 7295961Abstract: The present invention includes a method for generating a model of a circuit having an input port and an output port. The method determines an amplitude for current leaving the output port at a frequency ?k when a signal that includes a carrier at ?j modulated by a signal Vj(t) is input to the input port, wherein ?k is a harmonic of ?j. The determined amplitude is used to determine values for a set of constants, ak, such that a function fk(V,ak) provides an estimate of the current, Ik(t), leaving the output port at a frequency ?k when a signal having the form V ? ( t ) = Re ? ? k = 1 , H ? V k ? ( t ) ? exp ? ( j? k ? t ) is input to the input port. Here Vk(t) is a component of a set of values V. The fk(V,ak) are used to provide a simulator component adapted for use in a circuit simulator.Type: GrantFiled: November 12, 2003Date of Patent: November 13, 2007Assignee: Agilent Technologies, Inc.Inventors: David E. Root, Nicholas B. Tuffilaro, John Wood, Jan Verspecht
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Patent number: 7286972Abstract: A method for performing a finite element simulation. The method includes switching between an implicit method and an explicit method during the finite element simulation. By switching between the implicit and explicit methods during a simulation, an accurate solution can be obtained quickly and reliably.Type: GrantFiled: April 17, 2001Date of Patent: October 23, 2007Assignee: Livermore Software Technology CorporationInventor: Bradley N. Maker
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Patent number: 7277836Abstract: The invention relates to a computer system and method for simulating transport phenomena in a complex system. The computer system comprises memory means, storage means, and an object-oriented software product. The software product comprises an object-oriented extensible class hierarchy comprising a first set of generic classes that represent a plurality of object types and a second set of generic classes that represent member variables for the object types. The extensible class hierarchy permits the addition of additional object types or additional member variables without any modifications to the class hierarchy itself. The invention is particularly useful in simulating a hydrocarbon system that may include one or more of the following: a subterranean hydrocarbon-bearing formation, injection wells that penetrate the formation, production wells that penetrate the formation, surface flowlines, associated aquifers, and surface fluid processing facilities.Type: GrantFiled: December 6, 2001Date of Patent: October 2, 2007Assignee: ExxonMobil Upstream Research CompanyInventors: Stephen C. Netemeyer, Attila D. Banki
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Patent number: 7269542Abstract: One embodiment of the present invention provides a system and method for determining a cache optimized ordering of cells in an unstructured graph. Cells bounding a region defined along a portion of a stored logically-defined grid are identified and each cell is added into an element of a level set array block in order of traversal through the region along the boundary. The level set array block is reordered for each additional cell in the data object that is contiguous to at least one such cell added previously to the level set array block. Each such additional cell is added into an element of the level set array block. Each cell remaining in the data object independent of any element in the level set array block is iteratively added.Type: GrantFiled: October 16, 2002Date of Patent: September 11, 2007Assignee: Sun Microsystems, Inc.Inventor: Gregory R. Ruetsch
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Patent number: 7236921Abstract: A halt control gatekeeper for an In-Circuit Emulation system. Halt commands are implemented through a gatekeeper forming a portion of a virtual microcontroller that operates in lock-step synchronization with a real microcontroller under test. When a halt command is received, the gatekeeper determines if the microcontroller is in a sleep mode and, if so, appropriately notifies a host computer and queues up a halt command. If the microcontroller is not in a sleep mode, the gatekeeper simply queues a halt command and notifies the host computer when the microcontroller has halted and it is safe to perform debug operations on the virtual microcontroller.Type: GrantFiled: November 14, 2001Date of Patent: June 26, 2007Assignee: Cypress Semiconductor CorporationInventors: Craig Nemecek, Steve Roe
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Patent number: 7209869Abstract: A method for representing the structure of an article of manufacture having a plurality of design variants includes defining a plurality of positions corresponding to different predefined locations on the article of manufacture and assigning at least one variant to each position. Each variant identifies a specific part that may be used in the respective position or a specific type of connection between a pair of parts. In any given position, at most one part or connection variant can be selected. Code rules are defined for each variant which indicate when a particular variant should be used in accordance with specified design options. The position and variant representation can be implemented as part of a bill of materials used for manufacturing resource planning.Type: GrantFiled: August 31, 1999Date of Patent: April 24, 2007Assignee: DaimlerChrysler AGInventors: Udo Kroger, Eckhard Monke
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Patent number: 7206724Abstract: A method for determining the shape of a scroll cage for a forward-curved centrifugal blower wheel in a blower housing having a blower cut-off end including determining the blower wheel dimensions, determining the blower wheel clearance, determining the distance from the center of the blower wheel to the discharge point of the scroll cage at the tangential point of the scroll cage and the blower housing, selecting a diffusing angle, calculating a development angle and plotting the scroll cage profile in polar coordinates. The method can include iteratively adjusting the diffusing angle and re-plotting the scroll cage profile and running simulations to determine the optimum profile.Type: GrantFiled: November 4, 2003Date of Patent: April 17, 2007Assignee: Whirlpool CorporationInventor: Yuqi Chen
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Patent number: 7203636Abstract: A method for emulating a processor of a first endian type on a processor of a second endian type, wherein each memory access address B of string length L is transformed to the address A?B?L+S, wherein A is the total number of bytes allocated to a program, and S is the start address of the program.Type: GrantFiled: April 6, 2001Date of Patent: April 10, 2007Assignee: Transitive LimitedInventor: John H. Sandham
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Patent number: 7171341Abstract: A design assistance method and apparatus is provided for creating swing joint layout objects for interconnection among layout objects for use in a computer assisted design apparatus, the apparatus including an input means, a display device, a storage and a processor connected to the input means, the display including image data representative of layout objects and the storage including layout object data and layout object image data.Type: GrantFiled: September 27, 2001Date of Patent: January 30, 2007Inventor: David Henry Hoeft
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Patent number: 7162410Abstract: A watchdog timer control using a gatekeeper in an In-Circuit Emulation system. The In-Circuit Emulation system has a microcontroller operating in lock-step synchronization with a virtual microcontroller. When a watchdog event occurs, the gatekeeper, forming a part of the virtual microcontroller, crowbars the reset line of the virtual microcontroller as well as the real microcontroller. This freezes the state of the virtual microcontroller so that debug operations can be carried out. The gatekeeper operates with its own gatekeeper clock independent of the microcontroller clock. When a watchdog event occurs, the gatekeeper clock is rerouted to the virtual microcontroller to facilitate debug operations of the virtual microcontroller.Type: GrantFiled: November 14, 2001Date of Patent: January 9, 2007Assignee: Cypress Semiconductor CorporationInventors: Craig Nemecek, Steve Roe
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Patent number: 7146300Abstract: A method is provided for co-simulating a digital circuit using a simulation engine (45) which communicates with one or more first programming languages by means of a foreign language interface and which communicates directly with one or more second programming language. At least one first model (2, 3) or at least one first part of the digital circuit is provided in at least one high-level hardware description language which supports concurrent processes communicating with each other. The at least one first model is converted (50, 51) to at least one software model in the at least one first language.Type: GrantFiled: December 11, 2001Date of Patent: December 5, 2006Assignee: Sharp Kabushiki KaishaInventors: Vincent Zammit, Andrew Kay
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Patent number: 7103529Abstract: A method and apparatus to provide pre-boot security and legacy hardware and environment support for a computing system having an extensible firmware architecture is described. A virtual machine monitor is employed to provide the virtualization of system state for the purposes of running legacy compatibility code or protecting key data and code regions for safety and security. An application may be given access to a subset of the system resources, and access to portions of the memory map not designated for updates would trap (program interrupt) to the VMM. A VMM pre-boot policy agent may then protect state and unload any problematic software.Type: GrantFiled: September 27, 2001Date of Patent: September 5, 2006Assignee: Intel CorporationInventor: Vincent J. Zimmer
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Patent number: 7099809Abstract: Disclosed herein are techniques for generating textual descriptions of a graphic model and vice-versa. The techniques may be used, for example, in conjunction with a scheme that models objects and processes as independent entities. The techniques have a wide variety of applications including automatic code generation, system simulation, and language translation.Type: GrantFiled: March 15, 2001Date of Patent: August 29, 2006Inventor: Dov Dori
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Patent number: 7096168Abstract: In order to simulate the input or output load of an analog circuit, the output of the analog circuit is connected to the input of a driver stage. A measuring element is placed between the input of the driver stage and the reference potential, in order to record the output voltage of the analog circuit. A digital simulator controls a controllable transfer impedance, arranged between the output of the driver stage and the reference potential, in order to simulate various output loads. An alternative is to connect the output of the driver stage to the input of the analog circuit. The input of the driver stage has a shunt connection of a controllable current or voltage source, a first resistance and a first capacitance. The digital simulator controls the controllable current or voltage source, in order to simulate various output loads. The driver stage is switched off when appropriate.Type: GrantFiled: July 15, 2002Date of Patent: August 22, 2006Assignee: Infineon Technologies AGInventor: Wolfgang Scherr