Abstract: A modem system having two modem devices digitally connected to a digital telephone network includes an inband control signal channel. The inband control signal channel is formed by using the most significant bit position of every sixth transmitted codeword for the transmission of control data. The control signal includes a predetermined header section that is monitored by the receiving modem to maintain frame synchronization and to correct for digital frame slippage. The control signal also includes a number of control data packets that contain information related to the initiation of control procedures such as rate renegotiations and retraining requests. The disclosed inband transmission techniques may additionally (or alternatively) be utilized to define a secondary data channel.

Abstract: This invention provides a method and apparatus for processing a received digitally-modulated carrier signal to coherently demodulate or, for some applications, coherently demodulate and decode said signal when the signal's phase has an undesired component and/or to generate successive estimated values of said undesired phase of the received signal. Signal processing operations are performed in accord with a composite trellis diagram formed from one or more component trellis diagrams that are phase-displaced versions of a root trellis diagram and, when applicable, phase migration transitions. Desired variations in signal parameter values that result from modulating the signal effect transitions between states in the root trellis diagram.

Abstract: To optimize the sampling of individual symbols (S0 to S3), a sampling control loop (1) for a circuit (2) for receiving digitally transmitted signals (s) is connected to a timing error detector (3) which determines the respective timing error values (td). To improve the control action of the sampling control loop (1), an evaluating device (11) determines a reliability value (v) from signals (I, Q; Is, Qs; sb, sp; sr) of the receiving circuit (2) and controls the sampling control loop (1) in accordance with the reliability value (v).

Abstract: Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter in a demodulator, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel in a Viterbi decoder. High speed decoding is accomplished by reducing the DFE depth by providing an input signal from a multiple decision feedback equalizer to the Viterbi based on a tail value and a subset of coefficient values received from a unit depth decision-feedback equalizer. Power reduction is accomplished by adaptively truncating active taps in the NEXT, FEXT and echo cancellation filters, or by disabling decoder circuitry portions, as channel response characteristics allow.

Abstract: A phase-based approach to estimating the frequency of complex sinusoids in the presence of noise that simultaneously reduces the threshold level and makes it frequency-independent. The approach relies on a filter bank approach: apply the signal to a highly overlapped, four-channel filter bank, detect which channel the signal is in, and apply a phase-based frequency estimation technique to the selected channel output. The computational complexity of the method is kept low by deriving a closed form for the resulting estimator and showing that it leads to an inherent decimation. Further improvement in performance can be obtained by cascading several stages of the four-channel filter bank; the performance tends toward that of the ML method as the number of stages increases.

Abstract: In a phase-locked loop circuit with a signal estimator such as MLSE or DDFSE for correctly detecting and correcting a phase deviation, the phase deviation is held within a predetermined value by amplitude limiting a phase deviation signal obtained from a received signal and a replica signal. Thus, the phase deviation signal is free from a large error irrespective of generation of an estimation error in the MLSE or DDFSE.

Abstract: A receiver for detecting spread spectrum binary data particularly on a power line in the presence of channel distortion. In one embodiment a standard pattern ideally suited for minimal distortion in the channel is used in conjunction with an alternate pattern which is developed to better detect carrier and data in the presence of certain channel distortion. The receiver switches between the standard and alternate pattern to provide improved detection. In another embodiment an adaptive pattern is used which is developed from the receive signal. For instance, the signal over several bit times is averaged to provide a pattern which is correlated with a receive signal.

Abstract: In a telecommunications system, such as a cellular radio telecommunications system, transmission information, such as modulation scheme selection information, coding information or power level control commands, is efficiently conveyed from the transmitter to the receiver without increasing the bandwidth requirements and without introducing additional transmission delays. This can be accomplished by employing a data symbol phase rotation technique, wherein a sequence of data symbols, for example, a sequence of training symbols used for estimating the propagation characteristics of a given channel, are phase-rotated in accordance with a phase rotation factor that uniquely corresponds to the information being conveyed to the receiver. At the receiver, the symbols are de-rotated until the receiver recovers the training sequence. This allows the receiver to determine the phase rotation factor used to rotate the symbols at the transmitter. This, in turn, identifies the corresponding transmission information.

Abstract: A digital data waveform is precompensated for attenuation through a transmission medium. First, during actual initial power-on or upon reconfiguration of a digital communication system, attenuation characteristics of the transmission medium are actually measured. The attenuation characteristics can be measured by measuring the length of the transmission medium, measuring the error rate of test packets having known frequency, measuring the slope of a test pulse at two separate threshold voltages, and/or measuring the error rate of a random signal packet. Upon determination of the magnitude of the attenuation characteristic, one of a plurality of registers corresponding to the range of values of the attenuation characteristic is selected. These registers have a plurality of pre-emphasis coefficients to be applied in the driver to each bit of a series of digital signal pulses as determined by the transition history of at least three sequential bits.

Abstract: A method and apparatus to search for a traffic channel in a multi-carrier spread spectrum communication network. In this first embodiment, all three pilot signals are transmitted with equal power from the base station. The remote station can noncoherently combine the received energy of all three-pilots on a time hypothesis. This will reduce the value of M (the noncoherent accumulation time) by a factor of three. Thus the mean acquisition time is shortened by a factor of three with the same probability of detection and false alarm as a signal carrier (1×) system, if each pilot is equivalent to a 1× pilot in power. Note that the number of operations (i.e., complexity) is the same as that for a 1× system, but the time elapsed is shortened by a factor of 3.

Abstract: A spectral shaping PCM modem communication system uses a symbol encoder to encode a data bit stream into a PCM symbol stream. A plurality of different frames are formed from the PCM symbol stream. Performance metrics are computed for each possible frame and its inversion so a decision can be made in order to select a most desirable frame and inversion Delays are injected in the data flow to allow a look-ahead and thus provide for better frame selection and inversion decisions. A channel multiplexer combines decision bits and output frames to form encoded output frames that are fed to a digital channel connected to a telephone network wherein they are converted to analog signal. A corresponding decoder converts analog signals from the telephone network to digital signals. A timing recovery and equalization means corrects sample timing and removes inter-symbol interference effects introduced by telephone networks.

Abstract: A data signal attenuator is constructed to include an optocoupler, a biasing source for powering the optocoupler and restoring the amplitude of an originally transmitted signal, and a connector for connecting the attenuator to the exterior of a receiving device. When connected to the receiver, the attenuator electrically connects a single-ended data transmission line to the receiving device. The external connection of the attenuator to the receiving device thus enables existing receivers to have the benefits of an optocoupler based attenuator without the necessity of redesign.

Abstract: The desynchronizer of the present invention includes two FIFOs. The first FIFO has two address counters (write and read), an intermediate count register, circuitry for calculating the difference between the write and intermediate counts and the intermediate and read counts, a logic block for performing pointer leak and other arithmetic functions, and a digitally controlled oscillator (DCO). The second FIFO has read and write counters, a phase-frequency detector, and an internal VCO controlled by length measurements of the second FIFO. The desynchronizer receives data bits, pointer movement indications, and stuff indications from a DS-3/E3 demapper and, using the first FIFO, the address counters, etc., removes the low frequency components, including SONET/SDH systemic gapping in order to provide the second FIFO with a DS-3/E3 signal having a high frequency phase modulation. The second FIFO removes the remaining high frequency gapping jitter.

Abstract: A radio frequency signal is received by using a sigma-delta analog-to-digital converter to sample the radio frequency signal at a sampling rate and to generate therefrom 1-bit digital samples representing a digital intermediate frequency signal. The intermediate frequency signal is demodulated to generate in-phase and quadrature samples. Demodulation may be performed by generating a first mixed signal by combining the 1-bit digital samples representing the intermediate frequency signal with a first sequence representing a cosine mixing signal; generating a second mixed signal by combining the 1-bit digital samples representing the intermediate frequency signal with a second sequence representing a sine mixing signal; and decimating the first and second mixed signals to generate the in-phase and quadrature samples.

Abstract: Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter in a demodulator, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel in a Viterbi decoder. High speed decoding is accomplished by reducing the DFE depth by providing an input signal from a multiple decision feedback equalizer to the Viterbi based on a tail value and a subset of coefficient values received from a unit depth decision-feedback equalizer. Power reduction is accomplished by adaptively truncating active taps in the NEXT, FEXT and echo cancellation filters, or by disabling decoder circuitry portions, as channel response characteristics allow.

Abstract: In a splitterless Digital Subscriber Line (DSL) modem 30, a receiver architecture (100) that permits monitoring of harmonics within the upstream channel of a DSL connection. The receiver (100) can detect the harmonics by monitoring the harmonics in some empty tones or specified tones. A threshold can be set to differ the normal noise power and harmonics power in those empty or specified tones. When a POTS device (10) coupled to same wire line pair (20) as the DSL modem (30) goes off-hook, the DSL modem (30) can switch from the normal state to an off-hook state in which the harmonics are reduced to minimum by transmitting only the upper sub-band tones of the upstream transmission channel at reduced power levels.

Abstract: In a communication system using the time diversity transmission scheme, the communication system provided with the stable automatic frequency control circuit with the wide frequency pull-in range and under low CN ratio transmission is achieved by removing the modulation phase from the received data through the application of the data correlation of the time diversity.

Abstract: Two or more digital signals are encoded using two or more respective line codes. The line codes are chosen in conjunction with the data rates of the digital signals such that the encoded signals are substantially orthogonal to each other in the frequency domain. As such, the two or more encoded signals may be combined and transmitted via a single physical medium with little or no interference. A transmitter for encoding and transmitting the digital signals contains line coders for encoding the digital signals and a combiner for combining the encoded signals for transmission via a single physical medium.

Abstract: In a PCM modem system, a method and apparatus for optimizing the fractional sampling phase offset in the upstream direction to maximize the upstream data rate utilizes a probing signal from the analog modem generated during startup and having at least two distinct phases of a pure tone, with the probing signal being detected at the digital modem where an optimum sampling phase value is calculated. From this calculated value, a signal representing the appropriate amount to delay the input data stream is transmitted back to the analog modem for adjustment of the fractional sampling phase so that the fractional sampling phase offset at the central office quantizer is optimized.

Abstract: A mobile communication system is designed with an input circuit coupled to receive a first plurality of signals (rj(i+&tgr;j), i=0−N−1) during a first time (T0-T1) from an external source and coupled to receive a second plurality of signals (rj(i+&tgr;j), i=N−2N−1) during a second time (T1-T2) from the external source. The input circuit receives each of the first and second plurality of signals along respective first and second paths (j). The input circuit produces a first input signal (Rj1) and a second input signal (Rj2) from the respective first and second plurality of signals. A correction circuit is coupled to receive a first estimate signal (&agr;j1), a second estimate signal (&agr;j2) and the first and second input signals. The correction circuit produces a first symbol estimate ({tilde over (S)}1) in response to the first and second estimate signals and the first and second input signals.