Patents Examined by Jean Corrielus
  • Patent number: 6445744
    Abstract: A highspeed bus architecture featuring low signal levels, differential sensing, and zero net current over a four wire transmission line cluster. The bus system comprises a system for transmitting n bits of data and includes an encoding system for receiving the n bits of data and outputting m signals wherein the m signals have a zero net current, m transmission lines for carrying the m signals, and a decoding system for receiving the m signals and converting the m signals back into n bits of data, using differential amplifiers.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Timothy Jay Dell, Wilbur David Pricer
  • Patent number: 6445726
    Abstract: A receiver (54) comprising an input for receiving an RF signal (FIG. 7) centered at a first frequency and having a bandwidth. The receiver also comprises a first mixer (62) for producing a first output signal. The first output signal results from mixing the RF signal with a signal having an energy spreading portion (p(t)) and a down-converting portion (c(t)). Moreover, this first output signal comprises a self-mixing DC signal (c(t)p(t) self-mixing DC component) and a down-converted and energy spread RF signal (FIG. 11). The receiver further comprises a second mixer (70) for producing a second output signal by mixing a signal responsive to the first output signal with the energy spreading portion of the signal. The second output signal comprises two signals, namely: (1) a baseband signal (down-converted RFA1) responsive to the down-converted and energy spread RF signal; and (2) a portion of the spread DC signal (spread DC).
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: September 3, 2002
    Assignee: Texas Instruments Incorporated
    Inventor: Ranjit Gharpurey
  • Patent number: 6445732
    Abstract: A method and apparatus which reduces the computational complexity of a receiver subject to power swings in excess of the power swings inherent in wireless communication from normal fading. To accomplish this, attenuation or some other form of signal modification occurs prior to the digital circuitry to reduce the required resolution of the analog to digital converter and other receiver components. A power signal estimator in conjunction with an attenuation control module may control the level of attenuation.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: September 3, 2002
    Assignee: Conexant Systems, Inc.
    Inventors: Norman J. Beamish, Robert K. Perez
  • Patent number: 6445752
    Abstract: A phase tracker receives a signal component xn and forms a phase- and gain-corrected signal zn. In particular, the phase tracker performs a Hilbert transform of xn to produce a quadrature phase component yn to form the constellation defined by (xn, yn). Consequently, phase rotation and gain adjustment are combined into a linear transform of the constellation defined by (xn, yn). The linear transform zn=&agr;xn+&bgr;yn employs two coefficients &agr; and &bgr;. The coefficients &agr; and &bgr; of the linear transform are derived so as to provide an optimal solution according to minimum mean square error. Approximations to the coefficients &agr; and &bgr; of the linear transform may be iteratively determined with a stochastic gradient method. Advantages of employing the phase- and gain-corrected signal zn as an I-phase detection result of a demodulator include 1) the phase rotation and gain adjustment are combined into one operation, and 2) the a sine/cosine lookup table is not employed.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: September 3, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: Hong Jiang, Paul L. Palmieri, Agesino Primatic, Jr., Lesley J. Wu, Liangkai Yu
  • Patent number: 6445754
    Abstract: The PR(1, 1) equalizer 1 receives signals which are provided from a playback head which detects data in which the number of continuous non-inverse bits is at least “2”. The PR(1, 1) equalizer 1 then converts the signals into seven levels of data and ten levels of data, provides them to the four states of Viterbi decoder 2. In Viterbi decoding, an weight is applied to a metric which is obtained from the seven levels of data or the ten levels of data.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: September 3, 2002
    Assignee: NEC Corporation
    Inventor: Satoshi Itoi
  • Patent number: 6442209
    Abstract: The station includes a coded speech signal source having a given digital rate, a modulator for producing a radio signal from the coded speech signal provided by the source, and a redundancy encoder having a coding rate of the form K/N, where K and N are integers such that 0<K<N. An operating mode of the station is selected from at least a first operating mode where the modulator directly receives the coded speech signal and converts it into a radio signal occupying a determined fraction of time on a carrier frequency, and a second operating mode where the redundancy encoder receives the coded speech signal, and the modulator receives the output signal from the redundancy encoder and converts it into a radio signal occupying N/K times the determined fraction of time on a carrier frequency.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: August 27, 2002
    Assignee: Matra Nortel Communications
    Inventor: GĂ©rard Marque-Pucheu
  • Patent number: 6442221
    Abstract: A receiver receives a signal containing data distributed in both time and frequency. The receiver includes a vector transform arranged to perform a transform on the received signal using a plurality of receiver transform vectors. The receiver transform vectors are based upon a corresponding plurality of transmitter vectors modified in accordance with channel effects so that the data can be recovered by the vector transform even in the presence of strong ghosts.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: August 27, 2002
    Assignee: Zenith Electronics Corporation
    Inventors: Richard W. Citta, Jingsong Xia
  • Patent number: 6442188
    Abstract: A method includes locking onto a spread spectrum clock signal to minimize a phase error between an output clock signal and the spread spectrum clock signal. The spread spectrum clock signal has a time-varying frequency that cycles at a modulation frequency. The method includes minimizing a phase angle between spectral components of the output and spread spectrum clock signals near the modulation frequency. In some embodiments, the method may be performed by a phase locked loop.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: August 27, 2002
    Assignee: Intel Corporation
    Inventors: Michael T. Zhang, Don Weiss
  • Patent number: 6438157
    Abstract: In a spread spectrum receiver, a despread section 102 despreads received signals ELI and ELQ through correlation of spread signals PnI and PnQ. An integration section 103 integrates I-phase correlation data PELI and Q-phase correlation data PELQ. A lead/lag addition section 104 adds, to I-phase integration data PELICc, lead/lag information representing whether the signal output from the integration section is in a lead phase or a lag phase. A delay circuit 108 delays, by one symbol, Q-phase integration data PELQCc and I-phase lead/lag information added integration data PELIa. A lead/lag level difference output section 109 outputs a level difference TAC between lead phase and lag phase. Further, a timing control section 112 controls the phase of the entire loop so as to eliminate the level difference, thus tracking synchronization of the spread signals.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: August 20, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Yoshiki Mamori
  • Patent number: 6438155
    Abstract: A method and apparatus are described for decoding a stream of data which has been encoded into a chip stream so that a chip rate and phase of the chip stream can be derived from the encoded data. The method comprises the steps of: generating a clock signal (clk) having a clock rate which is approximately equal to the chip rate or an integer multiple thereof; passing the chip stream along a multi-stage delay line (14); for each clock cycle, sampling data of the chip stream at a plurality of the stages of the delay line to produce a set of oversamples (oversamples); for each clock cycle, producing an estimate (edgepos) of a position in a respective set of the oversamples of a chip edge in the chip stream; for at least some of the clock cycles, selecting at least one of the oversamples (dec13 chip(0), dec_chip(1)) having a position within a confined range with respect to the estimated chip edge position; and outputting the selected oversamples.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: August 20, 2002
    Assignee: Hewlett-Packard Company
    Inventor: Martin Warwick Beale
  • Patent number: 6434185
    Abstract: A correlation system for use in wireless direct sequence spread spectrum systems includes a RF down converter which receives an encoded RF signal and generates therefrom analog in-phase (I) and quadrature (Q) signal components. These components are digitized and the digitized signals are then passed to each of the high precision correlator circuit and a low precision correlator circuit. The low precision correlator circuit consist of a bank of a plurality of low precision correlators which receive the I and Q signal components as inputs and correlates the same with progressively phase shifted or delay pseudo noise (PN) codes. A low precision correlation circuit locks on to the appropriate PN code phase shift or delay and applies the same as a reference PN code to the high precision correlation circuit for data acquisition and demodulation.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: August 13, 2002
    Assignee: Cisco Technology, Inc.
    Inventors: Paul F. Struhsaker, Jane L. Smith
  • Patent number: 6434189
    Abstract: A communications system, a digital modem and method are provided for reducing non-linear distortion generated by a transmitter which adversely affects a receiver attempting to demodulate received data. More specifically, the digital modem includes a controller that controls a receiver and a transmitter. The receiver is operable to receive a plurality of receiver tones, and the transmitter is operable to generate a plurality of transmitter tones whose intermodulation products (transmitter non-linear distortion) conflict with the plurality of receiver tones. The transmitter is also operable to shift the plurality of transmitter tones by a predetermined distance to move the conflicting intermodulation products off the plurality of receiver tones.
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: August 13, 2002
    Assignee: STMicroelectronics, Inc.
    Inventor: Joseph A. Murphy
  • Patent number: 6430226
    Abstract: An encoding apparatus is provided for encoding a wideband digital signal, including an input for receiving the wideband digital signal, a splitter unit for splitting the wideband digital signal into a number of M sub signals, a data reduction unit for data reducing the sub signals and a formatting unit for assembling digital information including the data reduced sub signals into a digital output signal having a format suitable for transmission or storage. During a repeated encoding and decoding of a wideband digital signal in a subband encoding/decoding system or a transform encoding/decoding system, signal degradation may occur. In order to avoid this, the apparatus further including a variable delay unit coupled between the input and the splitter for realizing a delay, the length of which is controlled by a control signal, and a control signal generator unit for generating the control signal.
    Type: Grant
    Filed: October 24, 1996
    Date of Patent: August 6, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Warner R. T. Ten Kate
  • Patent number: 6430238
    Abstract: A servo channel digitally processes the data read from a magnetic media. The channel uses both edges of a system clock to detect peaks and generates position error systems by an area-based automatic gain control loop. By altering the sample delay, the channel digitally, up-samples at higher rates without requiring a higher system clock.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: August 6, 2002
    Assignee: Marvel International, Ltd.
    Inventor: Pantas Sutardja
  • Patent number: 6430246
    Abstract: A code division multiple access (CDMA) is a type of spread-spectrum communication system having a plurality of subscriber units and at least one base station. In order for a first subscriber unit to communicate with a second subscriber unit, a transmitter unit of the first subscriber unit imprints a unique code upon transmission and the second subscriber unit includes a receiver, which uses the code to decode the transmission. In addition, each transmitter with a CDMA communication system includes a stream cipher generator for enciphering the voice and data communications. Each receiver within a CDMA communication system contains an identical or similar stream cipher generator, which is used to decipher the received enciphered communication. The present invention relates to a stream cipher generator having a plurality of linear feedback shift registers to produce a stream cipher for increasing security using ciphered messages.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: August 6, 2002
    Assignee: InterDigital Technology Corporation
    Inventor: Fatih M. Ozluturk
  • Patent number: 6424679
    Abstract: A mobile communication system is designed with an input circuit coupled to receive a first plurality of signals (rj(i+&tgr;j), i=0−N−1) during a first time (T0-T1) from an external source and coupled to receive a second plurality of signals (rj(i+&tgr;j), i=N−2N−1) during a second time (T1-T2) from the external source. The input circuit receives each of the first and second plurality of signals along respective first and second paths (j). The input circuit produces a first input signal (Rj1) and a second input signal (Rj2) from the respective first and second plurality of signals. A correction circuit is coupled to receive a first estimate signal (&agr;j1), a second estimate signal (&agr;j2) and the first and second input signals. The correction circuit produces a first symbol estimate (S1) in response to the first and second estimate signals and the first and second input signals.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: July 23, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Anand G. Dabak, Rohit Negi
  • Patent number: 6424682
    Abstract: A BPSK encoder is provided with a first circuit which processes a carrier signal and a binary signal to be encoded, and produces an output binary signal having synchronous phase shifts representing a change in the value of the signal to be encoded. Also, the first circuit is provided with a sampling signal from a second circuit. The second circuit includes a delay circuit to deliver a shifted carrier signal that is smaller than the half-period of the carrier signal, and a logic gate for the logic combination of the carrier signal and the shifted carrier signal. The logic gate also delivers a binary sampling signal having at least two leading or trailing edges at each period of the carrier signal.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: July 23, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Jean-Pierre Enguent, Thierry Legou
  • Patent number: 6421381
    Abstract: A 100Base-TX detection system is presented which takes advantage of the form of the frequency response of the channel to provide a simplified filter for producing an output signal with reduced distortion. Utilizing the nature of the frequency response function of category-5 twisted pair cabling, a finite impulse response linear equalizer or an infinite impulse response decision feedback equalizer having as few as two multipliers is implemented.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: July 16, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Sreen A. Raghavan
  • Patent number: 6421392
    Abstract: A digital communications system can be configured with a single transmitter and passive remote stations that encode data by attenuating signals. In one optical arrangement, a single transducer serves as a receiver and modulator. In another arrangement, multiple channels permit full duplex communication.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: July 16, 2002
    Assignee: Siemens Information and Co-munication Networks, Inc.
    Inventor: George King
  • Patent number: 6421375
    Abstract: A modem system having two modem devices digitally connected to a digital telephone network includes an inband control signal channel. The inband control signal channel is formed by using the most significant bit position of every sixth transmitted codeword for the transmission of control data. The control signal includes a predetermined header section that is monitored by the receiving modem to maintain frame synchronization and to correct for digital frame slippage. The control signal also includes a number of control data packets that contain information related to the initiation of control procedures such as rate renegotiations and retraining requests. The disclosed inband transmission techniques may additionally (or alternatively) be utilized to define a secondary data channel.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: July 16, 2002
    Assignee: Conexant Systems, INC
    Inventors: Keith Chu, Sverrir Olafsson