Abstract: Circuits/methods for controlling the startup of multiple parallel power converters that avoid inrush current or switch overstress in an added power converter or a power converter having fault conditions. Embodiments include node status detectors coupled to nodes within parallel-connected power converters to monitor voltage/current and configured in some embodiments to work in parallel with an output status detector measuring the startup output voltage of a power converter. With charge pump-based power converters, the node status detectors ensure that the power converter pump capacitors are charged while the output capacitor is charged as well. For such embodiments, a softstart period of startup may be considered finished if both the shared output capacitors and the power converter pump capacitors are charged to target values. Embodiments may also be used for fault detection during steady-state operation.

Abstract: Provided is a transversal radio frequency filter circuit having a low noise amplifier connected along an input signal path, a first power divider connected between the low noise amplifier and four single taps, and an output path connected to the outputs of each of the four single taps. Each of the four single taps having a coefficient control mechanism, a polarity selection mechanism, and a time delay element. The coefficient control mechanism can include a wideband digital step attenuator configured to support high control range of the coefficient. Additionally, the circuit can include a second power divider connected between the outputs of each of the four single taps and the output path. The circuit can further include a field-programmable gate array configured to control coefficient control mechanisms, the polarity selection mechanisms, and the time delay elements.

Abstract: A power on reset circuit comprises terminals for reference and supply potentials and a voltage divider coupled therebetween. First and second transistors of a bandgap circuit are resistively coupled to the reference potential terminal and have bases connected to the voltage divider. Current mirrors couple the collectors of the first and second transistors to an output terminal providing an output signal indicating a power on reset condition. A first compensation transistor is coupled between the collector of one of the transistors and the reference potential terminal, and a second compensation transistor is coupled between the output terminal and the reference potential terminal to compensate the effect of parasitic substrate currents in response to an external interference.

Abstract: A power supply circuit and a field emission electron source are provided. The power supply circuit includes: field effect transistors Si coupled in series via drains and sources in sequence, 1?i?n, i and n are natural numbers, n?2, and a source of S1 is coupled to a negative electrode of a voltage source, and a drain of Sn is used as an output terminal of the power supply circuit to couple to a load; a first group of diodes D1i coupled in series; a first group of resistors R1j, 2?j?n, and i and j are natural numbers; and a voltage control module configured to adjust an output voltage of the voltage source to cause a current passing through the load to be constant; the field effect transistors Si, 1?i?n, operate in a resistive region.

Abstract: A direct current (DC)-DC converter for converting an input voltage to a plurality of output voltages. The DC-DC converter includes an inductor, a plurality of output capacitors, a plurality of output switches, and a bootstrap capacitor. The inductor is configured to be charged by applying the input voltage to the inductor. Each of the plurality of output switches is connected between the inductor and a respective output capacitor of the plurality of output capacitors. The bootstrap capacitor is connected between the inductor and each of the plurality of output switches. The bootstrap capacitor is configured to convert the input voltage to an nth output voltage of the plurality of output voltages. The input voltage is converted to the nth output voltage by coupling the inductor to an nth output capacitor of the plurality of output capacitors through an nth output switch of the plurality of output switches.

Abstract: A bipolar high voltage bipolar pulsing power supply is disclosed that can produce high voltage bipolar pulses with a positive high voltage pulse greater than about 2 kV followed by a negative high voltage pulse less than about ?2 kV with a positive to negative dwell period between the positive high voltage pulse and the negative high voltage pulse. A high voltage bipolar pulsing power supply, for example, can reproduce high voltage pulses with a pulse repetition rate greater than about 10 kHz.

Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.

Abstract: A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

Abstract: A switched capacitor converter includes plural switch units. The switch units are configured to switch a coupling relationship of a capacitor between a first power and a second power, wherein at least one of the switch units includes a switch circuit. The switch circuit includes a first switch, a second switch, and a switch driving circuit, wherein the conduction resistance of the first switch is greater than the conduction resistance of the second switch, and the parasitic capacitance of the first switch is less than the parasitic capacitance of the second switch. The switch driving circuit turns on the first switch before the second switch is turned on and/or turns off the first switch after the second switch is turned off, such that the switching loss of the switch circuit is less than a predetermined target value.

Abstract: A semiconductor device includes a first functional block configured to provide a first predetermined function, a second functional block configured to provide a second predetermined function, a first capacitive device, a second capacitive device, a first coupling path, a first switch device and a second switch device. The first capacitive device is disposed physically proximate the first functional block. The second capacitive device is disposed physically proximate the second functional block. The first coupling path includes at least a first connection node connecting to the first functional block. The first switch device is controlled to selectively connect the first capacitive device to the first connection node. The second switch device is controlled to selectively connect the second capacitive device to the second functional block or a second connection node. The second connection node is disposed on the first coupling path and connecting to the first connection node.

Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

Abstract: Various embodiments may provide non-isolated single-input dual-output (SIDO) bi-directional buck-boost direct current (DC) to DC (DC-DC) converters. Various embodiments may provide a method for controlling a buck duty cycle of the non-isolated SIDO bi-directional buck-boost DC-DC converter such that a first voltage measured across a first portion of the non-isolated SIDO bi-directional buck-boost DC-DC converter is maintained at less than a voltage of a first load and a second voltage measured across a second portion of the non-isolated SIDO bi-directional buck-boost DC-DC converter is maintained at less than a voltage of a second load.

Abstract: A multilevel conversion circuit having a flying capacitor is provided, including: a first bridge arm; a second bridge arm including a flying capacitor, the midpoints of the second and first bridge arms connected to a series branch defined by a first current limiting circuit, a power supply and an inductor; a DC bus capacitor connected in parallel to the first and second bridge arms; a rectifier circuit having an input end coupled to the power supply and an output end connected to a first auxiliary power supply; and a controller coupled to the first auxiliary power supply and the plurality of switches of the second bridge arm to control corresponding switches of the second bridge arm, the power supply charges the flying capacitor through the corresponding switches of the first and second bridge arms and the first current limiting circuit.

Abstract: A power supply system and a control method thereof are provided. The power supply system supplies power to a load and includes a power supply device and a backup power device. The power supply device supplies power to the load through a power bus. The backup power device includes a backup battery pack, a charging converter, a discharging converter, and a processor. The charging converter and the discharging converter are coupled to the backup battery pack. The processor determines whether a status of the power battery device is a load mode or a power supply mode according to a current conversion efficiency of the power supply device. In response to the power supply mode, the processor controls the backup battery pack, so that the backup battery pack and the power supply device simultaneously supply power to the load through the power bus.

Abstract: A linear power supply circuit according to the present invention is provided with: an output transistor provided between an input end to which an input voltage is applied and an output end to which an output voltage is applied; and a driver for driving the output transistor on the basis of the difference between a voltage based on the output voltage and a reference voltage. The driver is provided with: a differential amplifier for outputting a voltage according to the difference between the voltage based on the output voltage and the reference voltage; a capacitor one end of which has an output of the differential amplifier applied thereto and the other end of which has the voltage based on the output voltage applied thereto; a converter for converting a voltage based on the output of the differential amplifier into an electrical current and outputting the electrical current; and an electrical current amplifier for amplifying the electrical current of the output of the converter.

Abstract: A control method improves the efficiency profile of a power supply across a wide range of output loading. The method includes obtaining a measure of output power for a power supply, which includes one or more output modules and an auxiliary power supply. The method determines whether a maximum power rating of the auxiliary power supply is sufficient to provide the measure of output power. Responsive to a determination that the maximum power rating of the auxiliary power supply is sufficient to provide the measure of output power, the controller of the power supply directs the auxiliary power supply to provide the output power.

Abstract: Systems, methods, and devices are described herein for generating a pulse width modulation (PWM) signal having a specific duty cycle. In one embodiment, the system includes a square wave generator and a logic device. The square wave generator is configured to delay a input square wave signal to generate a plurality of square wave signals. The logic device is configured to perform a logic operation to two of square wave signals of the plurality of square wave signals, which in turn generates the PWM signal having a duty cycle corresponding to the two square wave signals.

Abstract: An on-board power supply device includes: a voltage conversion unit; a first voltage detection unit that detects a value of a first voltage that is applied to a second conduction path; and a second voltage detection unit that detects a value of a second voltage that is applied to a load-side conduction path. Furthermore, the on-board power supply device includes: a target voltage setting unit that sets a target voltage value based on the value of the second voltage detected by the second voltage detection unit; and a control unit. The control unit repeatedly performs feedback calculation for updating a duty ratio of a control signal based on the value of the first voltage detected by the first voltage detection unit so as to bring the value of the first voltage applied to the second conduction path closer to the target voltage value.

Abstract: The present invention provides for a high voltage direct current power supply including a primary high voltage direct current supply offering a primary output; a floating secondary output floating with respect to the primary output and fed by the primary output: an output terminal at the floating secondary output for providing an output voltage; a controller operative to detect a change in the output voltage at the output terminal and to generate a control signal responsive to the change in output voltage; and a controllable current source, which can comprise a programmable current source, arranged to provide current at the floating secondary output responsive to the said control signal and whereby the said current is provided to reduce charging of a secondary output capacitance as the output voltage changes.

Abstract: Systems and methods are provided for generating a temperature compensated reference voltage. A temperature compensation circuit may include a proportional-to-absolute temperature (PTAT) circuit, and a complementary-to-absolute temperature (CTAT) circuit, with the PTAT circuit and the CTAT circuit including at least one common metal-oxide-semiconductor field-effect transistor (MOSFET) and being configured to collectively generate a reference voltage in response to a regulated current input. The PTAT circuit may be configured to produce an increase in magnitude of the reference voltage with an increase of temperature, and the CTAT circuit may be configured to generated a decrease in magnitude of the reference voltage with the increase of temperature, wherein the increase in magnitude of the reference voltage produced by the PTAT circuit is at least partially offset by the decrease in magnitude of the reference voltage produced by the CTAT circuit.