Patents Examined by Jeffrey T Carley
  • Patent number: 12142594
    Abstract: Tools and systems for processing semiconductor devices, and methods of processing semiconductor devices are disclosed. In some embodiments, a method of using a tool for processing semiconductor devices includes a tool with a second material disposed over a first material, and a plurality of apertures disposed within the first material and the second material. The second material comprises a higher reflectivity than the first material. Each of the apertures is adapted to retain a package component over a support during an exposure to energy.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: November 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
    Inventors: Kuei-Wei Huang, Hsiu-Jen Lin, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 12142429
    Abstract: Cold-sprayed aluminum capacitors on lead frame metal foils are provided for applications in 3D power package integration. This additive manufacturing process allows pre-patterned low-temperature processing of aluminum electrodes on metal lead frames, insulated metal substrates or even heat-spreaders and cold-plates. Cold-sprayed capacitors can eliminate several process integration and reliability issues that are associated with traditional discrete surface-assembled capacitors.
    Type: Grant
    Filed: March 26, 2024
    Date of Patent: November 12, 2024
    Assignee: The Florida International University Board of Trustees
    Inventors: Markondeyaraj Pulugurtha, Arvind Agarwal, Cheng Zhang, Reshmi Banerjee, Denny John
  • Patent number: 12133733
    Abstract: The invention relates to a method for producing a medical electrode, comprising the following steps: (i) providing a substrate; (ii) applying a composition onto the substrate, wherein the composition comprises (a) a non-aqueous solvent and (b) an organic iridium complex compound dissolved in the solvent; (iii) heating the composition, and thereby forming a noble metal layer on the substrate.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: November 5, 2024
    Assignee: Heraeus Deutschland GmbH & Co. KG
    Inventors: Andreas Liess, Oliver Keitel, Robert Sievi
  • Patent number: 12123867
    Abstract: Systems and methods for inserting a single pore into a membrane are described herein. A stepped or ramped voltage waveform can be applied across the membranes of the cells of an array, where the voltage waveform starts at first voltage and increases in magnitude over a period of time to a second voltage. The first voltage is selected to be low enough to reduce the risk of damaging the membrane, while the rate of voltage increase is selected to provide sufficient time for the pores to insert into the membranes. Once a pore is inserted into the membrane, the voltage across the membrane rapidly drops, thereby reducing the risk of damaging the membrane even if the applied voltage between the electrodes is further increased.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: October 22, 2024
    Assignee: Roche Sequencing Solutions, Inc.
    Inventors: Geoffrey Barrall, George John Carman, Takeshi Harada, Jason Komadina, J. William Maney, Jr., Charlotte Yang
  • Patent number: 12127348
    Abstract: In a component adsorption nozzle, the nozzle can be attached to both of the in-line shaft and the rotary shaft by utilizing the outside (outer wall) of the nozzle body for attaching to the in-line shaft and utilizing the inside (inner wall) of the nozzle body for attaching to the rotary shaft. Therefore, for a user who owns each of the in-line type and rotary type component mounters, it is not necessary to prepare a nozzle dedicated to each type component mounter and it is possible to reduce the burden required for preparing the nozzle.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: October 22, 2024
    Assignee: YAMAHA HATSUDOKI KABUSHIKI KAISHA
    Inventor: Kenji Tsuri
  • Patent number: 12125719
    Abstract: A chip-transferring system and a chip-transferring method are provided. The chip-transferring system includes a substrate-carrying module for carrying a chip-carrying structure, a chip-transferring module, and a system control module. The chip-carrying structure includes a circuit substrate for carrying a plurality of conductive materials, a plurality of micro heaters, and a micro heater control chip. The chip-transferring module is configured for transferring a chip onto two corresponding ones of the conductive materials, and the chip-transferring module includes a motion sensing chip. When chip movement information of the chip that is provided by the motion sensing chip is transmitted to the system control module, the micro heater control chip is configured to control a corresponding one of the micro heaters to start or stop heating the two corresponding conductive materials by control of the system control module according to the chip movement information of the chip.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: October 22, 2024
    Assignee: Skilleux Electricity Inc.
    Inventors: Chien-Shou Liao, Te-Fu Chang, Sheng-Che Huang, Yu-Min Huang
  • Patent number: 12119141
    Abstract: Methods and systems for a dielectric material coated busbar are provided. In one example, a conductive material may be formed into a shape of a busbar and portions of the busbar may be selectively coated with a dielectric material which may be both electrically insulating and thermally conductive. The dielectric coated portions of the busbar may dissipate heat to a heat sink via a thermal interface material compressed on the busbar.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: October 15, 2024
    Assignee: DANA TM4 INC.
    Inventors: Marc-Antoine Beaupre, Francois Dube, Luke Miller, Cristian Campean
  • Patent number: 12120824
    Abstract: A placement head for automatically placing electronic components on a component carrier. The placement head has a chassis; a first rotor assembly that is mounted so that it is rotatable relative to the chassis about a first axis of rotation and that has a first quantity of first handling devices; and a second rotor assembly that is mounted so that it is rotatable relative to the chassis about a second axis of rotation and that has a second quantity of second handling devices. Each handling device includes a sleeve to which a component holding device for temporarily picking up a component can be attached, and a drive device with a linear drive for moving the sleeve along its longitudinal axis, and a rotary drive for rotating the sleeve about its longitudinal axis. Furthermore, a placement machine with such a placement head and a method for automatic assembly of a component carrier using such a placement head.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: October 15, 2024
    Assignee: ASMPT GMBH & CO. KG
    Inventors: Karl-Heinz Besch, Thomas Bliem, Thomas Rossmann, Klaus Sattler, Michele Trigiani, Markus Huber
  • Patent number: 12119466
    Abstract: A battery pack manufacturing method includes (a) stacking battery cells to form a cell stack, (b) coupling the cell stack and a U-frame to each other, (c) measuring the volume of the space between a flat plate coupled to the U-frame and the cell stack, and (d) applying a polymer resin corresponding in amount to the volume measured in step (c).
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: October 15, 2024
    Assignee: LG Energy Solution, Ltd.
    Inventor: Gwan Woo Kim
  • Patent number: 12113504
    Abstract: Provided is a method of manufacturing a bulk acoustic wave resonator, which includes: providing a piezoelectric substrate for forming a piezoelectric layer; forming a first electrode structure on the portion of the piezoelectric substrate for forming the piezoelectric layer; forming a dielectric layer on the first electrode structure, and performing a patterning process on the dielectric layer to form a patterned dielectric layer comprising a sacrificial dielectric part and a periphery dielectric part; forming a boundary layer on the patterned dielectric layer, the boundary layer covering a surface of the patterned dielectric layer and surrounding the sacrificial dielectric part; thinning the piezoelectric substrate to form the piezoelectric layer, the first electrode structure being located at a first side of the piezoelectric layer; forming a second electrode structure on a second side of the piezoelectric layer; and removing the sacrificial dielectric part to form a resonant cavity.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: October 8, 2024
    Assignee: Newsonic Technologies
    Inventor: Jian Wang
  • Patent number: 12114430
    Abstract: A mechanism comprising a base having a top surface and including a groove extending along the top surface and a frame flexibly coupled to the base. The frame includes a right side attached to a left side. The right side has a substantially “L-shaped” cross-section and includes a knife portion and a creasing portion. The left side includes a substantially “L-shaped” cross-section and is rigidly coupled to the right side such that the frame has a substantially “U-shaped” cross-section that is sized to receive at least a portion of the base. A first spring is positioned proximate the knife portion and is arranged to control a compressive force between the knife portion and the base and a second spring is positioned proximate the creasing portion and is arranged to control a compressive force between the creasing portion and the base.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: October 8, 2024
    Assignee: Automation Technical Service Inc.
    Inventor: Kelvin Wiley
  • Patent number: 12109641
    Abstract: The present disclosure generally relates to a method and apparatus for forming a substrate having a graduated refractive index. A method of forming a waveguide structure includes expelling plasma from an applicator having a head toward a plurality of grating structures formed on a substrate. The plasma is formed in the head at atmospheric pressure. The method further includes changing a depth of the plurality of grating structures with the plasma by removing grating material from the plurality of grating structures.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: October 8, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kang Luo, Ludovic Godet, Daihua Zhang, Nai-Wen Pi, Jinrui Guo, Rami Hourani
  • Patent number: 12113410
    Abstract: A method of manufacturing a motor assembly comprising a motor and an impeller coupled to a rotation shaft of the motor, the method includes disposing a plurality of balls in a ring-shaped groove formed in a surface of the impeller; rotating the impeller at a speed greater than a resonant rotation speed to move the balls to a compensation position for compensating for an eccentricity in the motor assembly; and fixing the balls at the compensation position in the groove.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: October 8, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Minsung Kim, Kwanwoo Hong, Jeonghoon Kang, Sung Han
  • Patent number: 12108544
    Abstract: A circuit board including an adhesive part, a ceramic board part with the adhesive part, and a printed circuit board part with the adhesive part. The ceramic board and printed circuit board parts are made of different materials. The adhesive part includes: an adhesive layer including an adhesive material, an adhesive part opening, and a conductive paste filled in an inside of the adhesive part opening. A method including providing a ceramic board part, providing a printed circuit board part, and producing an adhesive part. Batch-bonding the printed circuit board part, the adhesive part, and the ceramic board part with one another. Producing the adhesive part includes: bonding a protection layer on two surfaces of an adhesive layer, forming an adhesive part opening penetrating the adhesive layer and the protection layer, filling the adhesive part opening with a conductive paste, and removing the protection layer.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: October 1, 2024
    Assignee: TSE CO., LTD.
    Inventors: Eun Ha Park, Sang Wook Youn, Young Jun Kim, Yu Jin Choi, Kum Sun Park, Chung Hyeon Kim
  • Patent number: 12107466
    Abstract: First receiving recesses for receiving distal end portions of slot insertion portions of normal coil segments, and second receiving recesses for receiving distal end portions of long slot insertion portions of variant coil segments are formed at circumferential intervals on outer peripheral surface of an inner twisting jig corresponding to the innermost layer. In a state where the distal end portions of the long slot insertion portions before being twisted are inserted into the second receiving recesses, the first receiving recesses are at positions displaced in the circumferential direction with respect to the distal end portions to be housed therein. Primary twisting is performed by rotating the inner twisting jig in this state, and then the distal end portions of the normal coil segments are inserted into the first receiving recesses and the secondary twisting is performed with a rotational amount larger than that of the primary twisting.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: October 1, 2024
    Assignee: ODAWARA ENGINEERING CO., LTD.
    Inventors: Noboru Wakebe, Yuji Miyazaki
  • Patent number: 12108525
    Abstract: An objective of the present invention is to prevent a copper foil used as a recognition mark from being stripped from a base film in a flexible printed board while preventing the recognition accuracy for the recognition mark from being reduced. A flexible printed board includes a base film; a copper foil pattern on the base film, wherein the copper foil pattern has a hollow shape with an outer circumferential section and an inner circumferential section and is configured to function as a recognition mark; a coverlay having an opening formed therein, wherein the coverlay is bonded to the base film and covers the outer circumferential section of the copper foil pattern such that an edge of the opening is positioned between the outer circumferential section and the inner circumferential section of the copper foil pattern.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: October 1, 2024
    Assignee: YAZAKI CORPORATION
    Inventors: Hidehiko Shimizu, Tomohiro Sugiura
  • Patent number: 12108524
    Abstract: A printed board includes a laminate in which insulating base members formed of the same material are laminated with conductor patterns. The printed board includes a bent part that is thinner than first and second substrate portions. A first main surface is located on an inner peripheral side and a second main surface is located on an outer peripheral side of the printed board. The first and second substrate portions each include an outermost insulating base member connected to an outermost insulating base member of the bent portion. The bent part includes a first conductor pattern closer to the first main surface and a second conductor pattern closer to the second main surface. A distance from the first conductor pattern to the first main surface is greater than a distance from the second conductor pattern to the second main surface. No interlayer connection conductors are located in the bent part.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: October 1, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Toshikazu Harada
  • Patent number: 12096549
    Abstract: Electronic modules having complex contact structures may be formed by encapsulating panels containing pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within the panel along the cut lines. Holes defining contact regions along the electronic module sidewall may be cut into the panel along the cut lines to expose the buried interconnects. The panel may be metallized, e.g. by a series or processes including plating, on selected surfaces including in the holes to form the contacts and other metal structures followed by cutting the panel along the cut lines to singulate the individual electronic models. The contacts may be located in a conductive grove providing a castellated module.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: September 17, 2024
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Patrick R. Lavery, Rudolph F. Mutter, Jeffery J. Kirk, Andrew T. D'Amico
  • Patent number: 12095437
    Abstract: Acoustic resonator devices and filters are disclosed. An acoustic resonator chip includes a piezoelectric plate attached to a substrate, a portion of the piezoelectric plate forming a diaphragm spanning a cavity in the substrate. A first conductor pattern formed on a surface of the piezoelectric plate includes an interdigital transducer with interleaved fingers on the diaphragm, and a first plurality of contact pads. A second conductor pattern is formed on a surface of an interposer, the second conductor pattern including a second plurality of contact pads. Each pad of the first plurality of contact pads is directly bonded to a respective pad of the second plurality of contact pads. A seal is formed between a perimeter of the acoustic resonator chip and a perimeter of the interposer.
    Type: Grant
    Filed: October 9, 2021
    Date of Patent: September 17, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Patrick Turner, Mike Eddy, Andrew Kay, Ventsislav Yantchev, Charles Chung
  • Patent number: 12095444
    Abstract: Methods of fabricating acoustic devices are disclosed. A lateral etch stop is formed in a substrate. A back surface of a piezoelectric plate is attached to a front surface of the substrate. A conductor pattern is formed on the front surface of the piezoelectric plate, the conductor pattern including interleaved fingers of an interdigital transducer (IDT). A cavity is etched in the substrate using an etchant introduced through one or more openings in the piezoelectric plate. A lateral extent of the cavity is defined by the lateral etch stop. After etching the cavity, a portion of the piezoelectric plate forms a diaphragm spanning the cavity with the interleaved fingers of the IDT disposed on the diaphragm.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: September 17, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Patrick Turner, Carolyn Bianco, Charles Chung