Patents Examined by Jigar Patel
  • Patent number: 9355011
    Abstract: A method, system and computer program product for identifying potential class loader problems prior to or during the deployment of the classes to the production environment. A set of class loaders is loaded into memory. The set of class loaders is arranged hierarchically into parent-child relationships. The class search path sequence for each class loader in the hierarchy is generated to detect and identify potential class loader problems. Those class loaders with a duplicate class in its class search path sequence are identified as those class loaders that may pose a potential problem. A message may then be displayed to the user identifying these class loaders as posing a potential problem. By identifying these class loaders prior to or during the deployment of the classes to the production environment, class loader problems may be prevented from occurring.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: May 31, 2016
    Assignee: International Business Machines Corporation
    Inventor: Jinwoo Hwang
  • Patent number: 9348726
    Abstract: A method, system and computer program product for identifying potential class loader problems prior to or during the deployment of the classes to the production environment. A set of class loaders is loaded into memory. The set of class loaders is arranged hierarchically into parent-child relationships. The class search path sequence for each class loader in the hierarchy is generated to detect and identify potential class loader problems. Those class loaders with a duplicate class in its class search path sequence are identified as those class loaders that may pose a potential problem. A message may then be displayed to the user identifying these class loaders as posing a potential problem. By identifying these class loaders prior to or during the deployment of the classes to the production environment, class loader problems may be prevented from occurring.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: May 24, 2016
    Assignee: International Business Machines Corporation
    Inventor: Jinwoo Hwang
  • Patent number: 9311217
    Abstract: A method of analyzing a computer program under test (CPUT) using a system comprising a processor and a memory can include performing, by the processor, static analysis upon the CPUT and runtime analysis upon at least a portion of the CPUT. A static analysis result and a runtime analysis result can be stored within the memory. Portions of the CPUT analyzed by static analysis and not by runtime analysis can be determined as candidate portions of the CPUT. The candidate portions of the CPUT can be output.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: April 12, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventor: Kirk J. Krauss
  • Patent number: 9304892
    Abstract: Methods, systems, and computer-readable storage media determining a behavior model of a computing system under test. In some implementations, actions include executing, using a user interface of a computing SUT, an initial test script on the SUT; recording, after executing the initial test script, a state of the SUT in the behavior model by observing one or more events that can be triggered using the user interface of the SUT; and iteratively refining the behavior model until an end condition is reached by generating one or more new test scripts, executing the new test scripts on the SUT to test unobserved behavior, and recording one or more new states reached by executing the new test scripts on the SUT in the behavior model.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: April 5, 2016
    Assignee: SAP SE
    Inventors: Matthias Schur, Andreas Roth
  • Patent number: 9304562
    Abstract: A server rack system including a plurality of power supply units, a monitoring circuit, a rack management controller (RMC), and a plurality of server nodes is provided. The monitoring circuit is for monitoring the power supply units. The RMC is for monitoring the power supply units. When the monitoring circuit and/or the RMC finds that at least one of the power supply units failed to output a normal voltage, an operation status of the server nodes is lowered or at least one of the server nodes is forcibly shut down.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: April 5, 2016
    Assignee: Quanta Computer Inc.
    Inventors: Maw-Zan Jau, Wei-Yi Chu, Ting-Chen Ko, Li-Ching Chi, Wei-Kai Chao
  • Patent number: 9306833
    Abstract: In one embodiment, a particular node in a computer network, that is, one receiving electrical power from a grid source, may determine routing metrics to a plurality of neighbor nodes of the particular node in the computer network. In addition, the node also determines power grid connectivity of the plurality of neighbor nodes. Traffic may be routed from the particular node to one or more select neighbor nodes having preferred routing metrics, until a power outage condition at the particular node is detected, at which time the traffic (e.g., last gasp messages) may be routed from the particular node to one or more select neighbor nodes having diverse power grid connectivity from the particular node. In this manner, traffic may be routed via a device that is not also experiencing the power outage condition.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: April 5, 2016
    Assignee: Cisco Technology, Inc.
    Inventors: Shmuel Shaffer, Sandeep J. Shetty, Jean-Philippe Vasseur
  • Patent number: 9292374
    Abstract: The invention enhances automatic incident control, problem control, and problem prevention using information provided by the analysis or analysis data. The burden on the part of both users and providers to resolve problems is reduced by using a method of automatic analysis data upload and intelligent problem analysis and resolution. Problems are better identified, investigated, diagnosed, recorded, classified, and tracked until affected services return to normal operation and errors trends are used to proactively prevent future problems.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: March 22, 2016
    Assignee: RHAPSODY INTERNATIONAL INC.
    Inventor: Frank Fabbrocino
  • Patent number: 9286149
    Abstract: Methods, systems, and computer-readable media for detecting errors within a system by using behavior profiles are presented. At a first time, user requests may be received and serviced. The serviced user requests may be logged. Based on the logged user requests, profiles may be determined. At a second time, user requests may be received and serviced. The serviced user requests may be logged. The logged serviced user requests may be compared to the profiles determined at a first time. For example, the determined profiles may include an error rate for serviced user requests. At the second time, an error rate for the logged serviced user requests may be compared to an error rate included the determined profiles. Serviced users requests may be flagged based on the comparison.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: March 15, 2016
    Assignee: Bank of America Corporation
    Inventors: John R. Sampson, David L. Yommer
  • Patent number: 9274870
    Abstract: In one example monitoring connection quality, data transceiving at a socket may be monitored by frequent pinging. Any error codes identified by the socket may be assigned a corresponding error description, which may then be transmitted to a proper entity for correction.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: March 1, 2016
    Assignee: EMPIRE TECHNOLOGY DEVELOPMENT LLC
    Inventors: Pallavi Patil, Tralvex Yeap
  • Patent number: 9256506
    Abstract: A system, computer-readable storage medium storing at least one program, and a computer-implemented method for performing operations on target servers is presented. A request including an operation is received. A set of target servers associated with the operation is identified. The following request processing operations are performed until a predetermined termination condition has been satisfied: a target server in the set of target servers to which the request has not been issued and whose health metrics satisfy health criteria is identified, the request to perform the operation is issued to the target server, and when the request to perform the operation fails at the target server, health metrics for the target server are updated to indicate that the request to perform the operation failed at the target server and health check operation is scheduled to be performed with respect to the target server.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: February 9, 2016
    Assignee: GOOGLE INC.
    Inventors: Chris Jorgen Taylor, Sanjay Ghemawat, Alexander Lloyd, Andrew Fikes, Yaz Saito, Wilson Cheng-Yi Hsieh, Christopher Cunningham Frost
  • Patent number: 9251042
    Abstract: A method, apparatus, and/or computer program product protects a managed runtime from stack corruption due to native code condition handling. A native condition handler, which is associated with a managed runtime, percolates a condition. A condition handler of the managed runtime receives notification of the condition in a native code portion, and the condition handler of the managed runtime marks a thread associated with the condition. Responsive to a determination by the native code handler to resume execution of the marked thread by either call back into or a return to the managed runtime, the managed runtime determines whether a request is associated with the marked thread. Responsive to a determination that the request is associated with the marked thread, the managed runtime performs diagnostics and the managed runtime is terminated.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Francis J. D. Bogsanyi, Graham A. Chapman, Gavin Rolleston
  • Patent number: 9251043
    Abstract: A method, apparatus, and/or computer program product protects a managed runtime from stack corruption due to native code condition handling. A native condition handler, which is associated with a managed runtime, percolates a condition. A condition handler of the managed runtime receives notification of the condition in a native code portion, and the condition handler of the managed runtime marks a thread associated with the condition. Responsive to a determination by the native code handler to resume execution of the marked thread by either call back into or a return to the managed runtime, the managed runtime determines whether a request is associated with the marked thread. Responsive to a determination that the request is associated with the marked thread, the managed runtime performs diagnostics and the managed runtime is terminated.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Francis J. D. Bogsanyi, Graham A. Chapman, Gavin Rolleston
  • Patent number: 9235484
    Abstract: A cluster system according to the present invention includes an active server and a standby server which have a failover function, and a shared disk. The active server includes a control device configured to operate free of influence from an OS, and a disk input/output device configured to input and output data into and from the shared disk. The control device of the active server includes a communication module configured to communicate with the standby server, and an initialization module configured to, when a failure occurs in the active server, initialize the disk input/output device and notify to the standby server via the communication module.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: January 12, 2016
    Assignee: NEC CORPORATION
    Inventor: Yoshinori Nyuunoya
  • Patent number: 9235489
    Abstract: A testing scheduling system for optimizing and scheduling a testing path among a plurality of available work station calculates a distance between work stations according to the coordinates of the of the available work stations, assigns a value to a quantity, and applies this to the failure rate of each work station, the backlog quantities of each work station, the test-awaited quantities, and the distances between each available work station to acquire a failure rate value, a backlog quantities value, a test-awaited quantities value, and a distances value. The testing scheduling system further calculates a first weighted value of each available work station by summing the failure rate value, the backlog quantities value, the test-awaited quantities value, and the distances value of each available work station, and analyzes the first weighted values to determine a preferred work station.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: January 12, 2016
    Assignees: Fu Tai Hua Industry (Shenzhen) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Kai Xiong, Xin Lu, Yu-Yong Zhang, Huan-Huan Zhang
  • Patent number: 9229843
    Abstract: A method, system, and computer usable program product for predictively managing failover in a high availability system are provided in the illustrative embodiments. A disruptive activity occurring on the HA data processing system is detected. The disruptive activity has a potential to cause an operation of the HA data processing system to perform outside a specified parameter. A determination is made of a desired response in the HA data processing system should the disruptive activity disrupting the operation. A precautionary action is initiated with respect to the HA data processing system.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 5, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen N. Abbot, James Allen Goodwin, Manjunath Basappa Muttur, Thomas Howard Smith
  • Patent number: 9223677
    Abstract: A data processing apparatus is provided having a plurality of processing circuits each having access to a memory. Tracing circuitry is provided for generating a stream of trace data for generating a stream of trace data corresponding to at least one of the plurality of processing circuits. Selection circuitry is provided to enable selective switching of the tracing circuitry from generating a first trace data stream corresponding to a first one of the plurality of processing circuits generating a second different trace data stream corresponding to a different one of the plurality of processing circuits. The selective switching is performed in dependence upon processing state information associating with one or more of the plurality of processing circuits. A corresponding method and computer program product are also provided.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: December 29, 2015
    Assignee: ARM Limited
    Inventors: Andrew Brookfield Swaine, Michael John Williams, David Kevin Hart, Andrew Christopher Rose
  • Patent number: 9218230
    Abstract: A method for transmitting messages in a redundantly operable communication network includes a first subnetwork with a tree topology and a second subnetwork, wherein messages are transmitted in the first subnetwork in accordance with a spanning tree protocol, communication devices associated with network nodes of the first subnetwork interchange messages containing topology information with one another in order to form a tree topology, messages are transmitted in the second subnetwork in accordance with a parallel or ring redundancy protocol, and a virtual network node which is connected to all network nodes of the second subnetwork via a respective virtual connection which is uninterruptable by an error is configured as the root network node of the first subnetwork.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: December 22, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventors: Marcel Kiessling, Joachim Lohmeyer
  • Patent number: 9209894
    Abstract: A method for clearing a fault condition at a target device is disclosed herein. In selected embodiments, such a method includes detecting a fault condition at a target device and receiving N instructions before the fault condition is cleared, where the N instructions are unexecutable due to the fault condition. N fault condition indicators are transmitted in response to the N instructions. Clearing of the fault condition is detected when the fault condition no longer exists. Acknowledgments corresponding to the fault condition indicators are received, where each acknowledgment indicates that one of the fault condition indicators has been received. A fault clear indicator is transmitted only after both all N fault condition indicators have been received and clearing of the fault condition has been detected. A corresponding system and computer program product are also disclosed herein.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: December 8, 2015
    Assignee: International Business Machines Corporation
    Inventors: Matthew R. Craig, Clint A. Hardy, Roger G. Hathorn, Bret W. Holley
  • Patent number: 9183115
    Abstract: A method for testing a function of an electronic apparatus is provided. The method includes steps of: searching for a location corresponding to the function to be tested, sending a command according to the location to perform the function to be tested, and determining whether an error occurs in the function according to a response from the function in response to the command.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: November 10, 2015
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Yi-Cheng Lin, Shen-Pin Lin, Chi-Chang Hsieh, Wei-Chun Kao
  • Patent number: 9172459
    Abstract: A method for clearing a fault condition at a target device is disclosed herein. In selected embodiments, such a method includes detecting a fault condition at a target device and receiving N instructions before the fault condition is cleared, where the N instructions are unexecutable due to the fault condition. N fault condition indicators are transmitted in response to the N instructions. Clearing of the fault condition is detected when the fault condition no longer exists. Acknowledgments corresponding to the fault condition indicators are received, where each acknowledgment indicates that one of the fault condition indicators has been received. A fault clear indicator is transmitted only after both all N fault condition indicators have been received and clearing of the fault condition has been detected. A corresponding system and computer program product are also disclosed herein.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 27, 2015
    Assignee: International Business Machines Corporation
    Inventors: Matthew R. Craig, Clint A. Hardy, Roger G. Hathorn, Bret W. Holley