Abstract: In one embodiment, a signal-processing receiver has an upstream processor and a low-density parity-check (LDPC) decoder for decoding LDPC-encoded codewords. The upstream processor generates a soft-output value for each bit of the received codewords. The LDPC decoder is implemented to process the soft-output values without having to wait until all of the soft-output values are generated for the current codeword. Further, the LDPC code used to encode the codewords is arranged to support such processing. By processing the soft-output values without having to wait until all of the soft-output values are generated for the current codeword, receivers of the present invention may have a lower latency and higher throughput than prior-art receivers that wait until all of the soft-output values are generated prior to performing LDPC decoding. In another embodiment, the LDPC decoder processes the soft-output values as soon as, and in the order that, they are generated.

Abstract: A comparison unit compares polarities of a plurality of redundant input signals. A comparison-result storing unit stores a comparison result of the comparison unit for each predetermined sampling cycle. A judgment unit judges whether the redundant input signals are normal using a plurality of comparison results for a predetermined number of samplings in a time-series order from a latest comparison result among a plurality of comparison results stored in the comparison-result storing unit.

Abstract: A system and method of orchestrating failover operations of servers providing services to an internal computer network includes a DR server configured to execute a control script that performs a failover operation. Information needed to perform the failover operation is stored on the DR server thereby eliminating the need to store agents on each of the application's primary and backup servers. The DR server may provide a centralized location for the maintenance and update of the failover procedures for the internal network's redundant services. A failover operation may be initiated by an authorized user in communication with the internal computer network.

Abstract: Methods and systems for debugging a software program, such as BIOS is provided. The methods and systems make use of a debugger application executing on a host computer and configured to communicate with a debugger module executing on a target computer via serial/parallel/USB port of host computer, an adapter and the SMBus of the target computer.

Abstract: A method, system and computer-readable medium for providing rapid failback of a computer system is described. The method, which operates during failback of a secondary computer to a primary computer, accesses a map to determine a location of a latest version of data corresponding to a read request, where the location may be within either a primary data storage or a secondary data storage. The system comprises a primary computer coupled to a primary data storage and a secondary computer coupled to a secondary data storage. The primary computer maintains a write log and the secondary computer maintains a map. The computer-readable medium contains instructions, which, when executed by a processor, performs the steps embodied by the method.

Abstract: In one embodiment, a method and apparatus for notifying a client computer that a service accessed by the client computer is unavailable as a result of the service being relocated. In a further embodiment, a method and apparatus providing a notification to a client computer that a service has been relocated so that the service is no longer accessible via a network address stored in the local store of the client computer. In one embodiment, further flushing a local store of a client computer in response to a notification that a service has been relocated so that the service is no longer accessible via a network address stored in the local store of the client computer.

Abstract: A method and system for maintaining backup copies of firmware. More particularly, embodiments of the present invention provide a method that includes monitoring an execution of at least one firmware component, and causing a backup copy of the at least one firmware component to be generated if the at least one firmware component executes at a predefined standard of reliability for a predefined time period. According to the system and method disclosed herein, trustworthy backup copies are available if a given server of a multiserver system fails.

Abstract: Disclosed herein is transmission/reception of data according to a hybrid automatic repeat request (HARQ) process. A method for transmitting data includes, at a transmission side, mapping at least one HARQ process to at least one logical channel, and transmitting a control signal including information associated with the mapping result to a reception side. Accordingly, it is possible to efficiently use a radio resource and reduce unnecessary overhead.

Abstract: According to an aspect of an embodiment, a method of storing user data (UD) with parity data (PD) for correcting the UD in a storage apparatus comprising disk units, each of the disk units storing data in data blocks(DBs), each of the DBs storing the UD or associated PD and position information(PI) indicative of the location of the DBs, comprising: obtaining the UD, dividing the UD into UD blocks (UDBs) which are adapted to be stored in the DBs, and determining which UDBs are to be stored into which DBs, respectively; determining PI of the DBs for storing the UDBs; generating PD for a group of UDBs and associated PI by parity operation using a weighting function to the UDBs and the PI; determining PI for the PD for said group by modifying a part of the PD; and storing the group of the UDBs, associated PI, and the PD.

Abstract: A power over Ethernet (PoE) powered device with power fallback states. A powered device can be powered using a primary local power source and a secondary PoE power source. To enable consistent behavior by the powered device, a controlled power fallback state can be defined that would ensure limited functionality in the powered device upon a failure of the primary local power source. For example, the limited functionality could include a communication channel to the switch, diagnostic circuitry, etc.

Abstract: Methods and apparatus for performing, using smaller, more efficient shared logic circuitry, the parity checking function and the compare function in a mutually exclusive manner in different cycles of a ternary content addressable memory are disclosed.

Abstract: The invention relates to an iterative decoding method of the message-passing type for decoding an error correcting code susceptible of representation by a bipartite graph including a plurality of variable nodes and a plurality of control nodes, said messages being expressed in terms of a log likelihood ratio. At each iteration of a plurality of decoding iterations, for each pair consisting of a variable node and a control node, a change is detected in the sign of the extrinsic information intended to be transmitted (?mntemp) as a message by said variable node to said control node relative to that transmitted (?mn) at the previous iteration, and in the event of a sign change, said extrinsic information is subjected to an amplitude reduction operation (Fred) before it is transmitted to the control node.

Abstract: A method for data transmission in a multiple input multiple output (MIMO) system, the method including, receiving multiple input data streams; performing low density parity check (LDPC) encoding of the input data streams utilizing a parity check matrix, the parity check matrix including a plurality of sub-parity check matrices for encoding respective ones of the input data streams; and performing space time encoding for transmitting the LDPC encoded input data streams over a plurality of antennas.

Abstract: A method implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable medium. The computer executable code is operable to dynamically adjust quorum requirements for a voting set V of a server cluster, including a plurality of servers, to ensure that a response of the server cluster to a client request remains Byzantine fault tolerant when at least one of: a failed server of the server cluster is replaced with at least one new server, such that a total set S of servers that have ever been members of the server cluster is increased, and an existing server is removed from the voting set V.

Abstract: A memory card apparatus includes a non-volatile memory and a controller configured to control the non-volatile memory and communicating with the host device, wherein the controller updates available memory capacity information according to occurrence of bad memory in the non-volatile memory and transmits the updated memory capacity information to a host device.

Abstract: A system and method for communicating information relating to powered device (PD) power interruption and associated power sourcing equipment (PSE) fallback power. A PD can be powered using a primary local power source and a secondary power over Ethernet (PoE) power source. The PD communication can provide information that relates to PSE power delivery to the PD that is contingent upon detection of a failure occurring at the powered device.

Abstract: A management system, which manages an information processing system by identifying a cause location based on previously defined analysis rule information, displays a status that is a condition of the analysis rule information but is not receivable, based on acquirable status information of the apparatuses making up the information processing system or information about statuses received in the past.

Abstract: Systems and methodologies are described that facilitate transmitting low-density parity-check encoded communications in a wireless communications network and incrementing such codes in response to requests from receiving devices. The LDPC codes can have associated constraints allowing the codes to be error corrected upon receipt. The requests for incremented codes can be in cases of low transmission power or high interference, for example, where the original code can be too error-ridden to properly decode. In this case, additional nodes can be added to current and/or subsequent communications to facilitate adding a more complex constraint to the LDPC code. In this regard, the large codes can require less validly transmitted nodes to predict error-ridden values as the additional constraint renders less ambiguity in possible node value choices.

Abstract: A processor includes a microarchitecture for working around a processing flaw, the microarchitecture including: at least one detector adapted for detecting a predetermined state associated with the processing flaw; and at least one mechanism to modify default processor processing behavior; and upon modification of processing behavior, the processing of an instruction involving the processing flaw can be completed by avoiding the processing flaw.

Abstract: This invention relates to methods and devices for verifying the identity of a person based on a sequence of feature components extracted from a biometric sample. Thereafter, the feature components are quantized and assigned a data bit sequence in such a way that adjacent quantization intervals have a Hamming distance of 1. The data bit sequences are concatenated into a bit string, and said bit string is combined with a helper data set by using an exclusive disjunction (XOR) operation into a codeword. Finally, the codeword is decoded into a secret V and a secret S is matched with the secret V.