Patents Examined by John D. Smith
  • Patent number: 4488507
    Abstract: Susceptor formed with a base and with a pedestal made of materials respectively having low and high radio-frequency (r-f) absorptivities. Mercury is carried in a cavity in the base and a semiconductor substrate is carried in a cavity in the pedestal. When an r-f field is applied to the susceptor, the substrate is heated to a higher temperature than the mercury.
    Type: Grant
    Filed: September 30, 1982
    Date of Patent: December 18, 1984
    Inventor: David A. Jackson, Jr.
  • Patent number: 4488506
    Abstract: An apparatus for depositing metal or alloy films by a thermal decomposition process on a substrate includes a furnace having a number of selectively heated zones. The temperature of each zone is controllable so as to provide compensation for changes in the concentration of reactant materials in the different regions of the furnace. Means are provided for the safe handling of highly pyrophoric organometallic reactants. The apparatus may be used for the deposition of aluminium/silicon alloy films on semiconductor wafers in the manufacture of integrated circuits.
    Type: Grant
    Filed: June 15, 1982
    Date of Patent: December 18, 1984
    Assignee: ITT Industries, Inc.
    Inventors: Rudolf A. H. Heinecke, Ronald C. Stern, Michael J. Cooke
  • Patent number: 4489101
    Abstract: A pattern forming method for semiconductor devices in which a film layer of a compound containing silicon and nitrogen is formed between a substrate and a resist layer with a desired pattern readily formed utilizing a lift-off technique. A first film layer of a compound such as Si.sub.3 N.sub.4 is formed on a semiconductor substrate with a resist film layer formed in a desired pattern upon the first film layer. The first film layer is etched using the resist film layer as a mask. A second film layer is then formed on the substrate after which the first film layer is removed with an etchant which does not attack the second film layer.
    Type: Grant
    Filed: September 24, 1982
    Date of Patent: December 18, 1984
    Assignee: ULSI Technology Research Association
    Inventor: Hiroshi Shibata
  • Patent number: 4487161
    Abstract: A semiconductor device manufacturing unit in which plasma gas is maintained sealed in a quartz tube by a magnet disposed outside the quartz tube to make the density of plasma gas high and uniform thereby improving the quality of CVD films deposited with the gas and reducing the processing time for semiconductor wafers. A wafer holder is movably mounted in the quartz tube. A support bar is provided for moving the wafer holder with the support bar serving additionally as a ground electrode. An RF electrode and magnet are disposed outside the quartz tube. A heater may be disposed outside the RF electrode and magnet.
    Type: Grant
    Filed: October 28, 1980
    Date of Patent: December 11, 1984
    Assignee: VLSI Technology Research Association
    Inventors: Yoshihiro Hirata, Kuniaki Miyake, Hisao Yakushiji
  • Patent number: 4487787
    Abstract: Impurity concentration doped in PSG deposited on semiconductor substrates employing chemical vapor deposition process depends on the flow rate of reactive gases in the neighborhood of the first one of the plural semiconductor substrates processed with the same equipment in one batch at the same time. Regulation of the flow rate of the reactive gases in the neighborhood of the first one of the plural semiconductor substrates processed with the same equipment in one batch at the same time is effective to make the impurity concentration doped in PSG uniform for all the semiconductor substrates processed in one batch employing the presently available sealed tube type equipment for vacuum vapor deposition process. The flow rate regulation is possible by monitoring readings of a manometer which is arranged around the inlets thereof and which was calibrated by the flow rate of a nonreactive gas such as nitrogen gas.
    Type: Grant
    Filed: October 25, 1982
    Date of Patent: December 11, 1984
    Assignee: Fujitsu Limited
    Inventors: Yoshimi Shioya, Mikio Takagi
  • Patent number: 4487162
    Abstract: A plasma arc discharge method for deposition of metallic and semiconductor layers on a substrate for the purpose of producing semiconductor grade materials such as silicon at a reduced cost. Magnetic fields are used so that silicon ions and electrons can be directed toward a target area where they are deposited. The ions and electrons are preferably injected as a compound in gaseous of liquid form but may also be injected in liquid elemental form or vaporized from a thermionic cathode. The magnetic fields include an accelerating magnetic field and a focusing magnetic field. The accelerating magnetic field is adjusted to support a desired high ion flux rate and the focusing magnet can control the plasma beam direction and divergence.The silicon provided in a compound form or in the form of metallurigical silicon is purified during the deposition process by a carrier substance which may be a part of the compound or separately injected.
    Type: Grant
    Filed: February 24, 1983
    Date of Patent: December 11, 1984
    Inventor: Gordon L. Cann
  • Patent number: 4486463
    Abstract: A method for selectively plating metal, such as copper, onto poly(phenylene sulfide) substrates is disclosed. In this method, a crystalline region and an amorphous region are created in a substrate. One method for creating these regions is to selectively crystallize a region in an amorphous poly(phenylene sulfide) substrate by heating it above its glass transition temperature. The surface of the substrate is then activated with an electroless plating catalyst such as palladium metal. After activation, a nitrosyl salt is introduced into the amorphous region of the substrate. The substrate is then immersed in an electroless plating solution containing the metal ions whereby metal selectively plates onto the crystalline region of the substrate.
    Type: Grant
    Filed: December 21, 1983
    Date of Patent: December 4, 1984
    Assignee: GTE Laboratories, Incorporated
    Inventors: Michael F. Rubner, Peter Cukor
  • Patent number: 4486466
    Abstract: A resinous protective coating useful in the manufacture of printed circuit boards with circuit patterns having a resolution of at least 0.25 mm lines and spaces thereon. The protective coating comprises resins dissolved in solvents, wherein the coating upon being subjected to heat goes from a high viscosity solution to a gel and then to a solid or from a soft "gel-like" state into a solid. The protective coating is resistant to copper electroplating baths, adheres to insulating substrates, adhesive coated base materials as well as metallic substrates and is capable of withstanding the thermal shock of dip soldering.
    Type: Grant
    Filed: July 29, 1982
    Date of Patent: December 4, 1984
    Assignee: Kollmorgen Technologies Corporation
    Inventors: Edward J. Leech, Frank D. Russo
  • Patent number: 4486465
    Abstract: A nitride-coated boat is used in a method for depositing phosphosilicate glass (PSG) on semiconductor wafers. Because stainless steel is the material typically used for the boat for PSG deposition, the linear coefficient of thermal expansion of the boat is significantly greater than that of PSG. Consequently, cooling the boat after PSG deposition tends to cause flaking of PSG from the boat. The nitride-coating on the boat buffers the contraction differential between the PSG and stainless steel to significantly reduce flaking of PSG.
    Type: Grant
    Filed: September 30, 1983
    Date of Patent: December 4, 1984
    Assignee: Motorola, Inc.
    Inventor: Bich-Yen Nguygen
  • Patent number: 4485128
    Abstract: Method of producing amorphous semiconductor hydrides (hydrogenated amorphous semiconductors) with specified bandgaps. The desired bandgap is achieved by controlling the temperature and partial pressure of higher order semiconductanes which are created pyrolytically, for example, on a substrate using a hot-wall epitaxial reactor.
    Type: Grant
    Filed: January 7, 1982
    Date of Patent: November 27, 1984
    Assignee: Chronar Corporation
    Inventors: Vikram L. Dalal, M. Akhtar, Shek-Chung Gau
  • Patent number: 4485125
    Abstract: A method and a multiple chamber apparatus for the continuous production of tandem, amorphous, photovoltaic cells on substrate material, whereby, at least six amorphous semiconductor layers are continuously and sequentially deposited on the substrate material under steady state conditions. The substrate material is driven from a supply core, through at least two triads of deposition chambers, to a take-up core. Each amorphous layer of each p-i-n-type cell is produced in one chamber of the triad of deposition chambers. In the first chamber of each triad of chambers, a dopant gas mixture is introduced to deposit a first conductive semiconductor layer atop the substrate. In the second chamber of each triad of chambers, a gas mixture is introduced to deposit an intrinsic layer atop the first layer. And in the third chamber of each triad of chambers, a dopant gas mixture is introduced to deposit a second conductive layer, opposite in conductivity from the first conductive layer, atop the intrinsic layer.
    Type: Grant
    Filed: January 24, 1983
    Date of Patent: November 27, 1984
    Assignee: Energy Conversion Devices, Inc.
    Inventors: Masatsugu Izu, Herbert C. Ovshinsky
  • Patent number: 4480585
    Abstract: An external isolation module adapted to operatively interconnect at least one pair of a plurality of adjacent vacuum chambers through which a substrate travels and into which reaction materials are introduced. The external isolation module provides a passageway for the substrate between adjacent chambers while substantially preventing the diffusion of reaction materials from one of the chambers into the adjacent chamber. An accessible, environmentally-sealed, reaction material-isolating passageway is thereby formed.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: November 6, 1984
    Assignee: Energy Conversion Devices, Inc.
    Inventor: David A. Gattuso
  • Patent number: 4481236
    Abstract: A method and apparatus for extending the useful life of an aqueous acid chloride solution that serves as a protective bath for an activator dip bath such as used in electroless copper plating. Means are provided for recirculating the acidic chloride solution over metallic tin to precipitate copper ions from the solution. The precipitated copper is filtered from the solution to extend its useful life.
    Type: Grant
    Filed: May 2, 1983
    Date of Patent: November 6, 1984
    Assignee: General Motors Corporation
    Inventor: Robert B. Forsterling
  • Patent number: 4479455
    Abstract: A process gas introduction and channeling system for use with apparatus adapted to produce photovoltaic devices by depositing semiconductor layers onto continuously moving substrate material. The deposition apparatus preferably includes at least one deposition chamber having (1) a region in which process gases are decomposed and (2) a manifold from which process gases are introduced to flow through the downstream decomposition region. In the preferred embodiment, as the process gases flow through the decomposition region, they are disassociated and recombined under the influence of an electromagnetic field. The species and combinations of process gases thus formed are deposited onto the substrate material.
    Type: Grant
    Filed: March 14, 1983
    Date of Patent: October 30, 1984
    Assignee: Energy Conversion Devices, Inc.
    Inventors: Joachim Doehler, Kevin R. Hoffman, Timothy D. Laarman, Gary M. DiDio, Therese McDonough
  • Patent number: 4478174
    Abstract: A vacuum coating vessel is provided comprising a casing having a vacuum coating compartment separated from a vapor source compartment by a partition having vapor ports. A slidable shutter plate is provided on the vapor source compartment side of the partition. The shutter plate, in an open position, aligns vapor ports therein with the ones in the partition, and, in a closed, closes the vapor ports with `O`-ring seals. A mechanism is provided for moving the shutter plate away from and then towards the partition at the beginning and end respectively of each stroke to avoid scraping the `O`-rings and to ensure that the `O`-rings are kept as clean as possible. The vapor ports of the shutter plate and the partition are chamfered away from the vapor source compartment so that the `O`-ring sealing surfaces around the vapor ports in the partition are masked when the shutter plate is in the open position.
    Type: Grant
    Filed: February 15, 1984
    Date of Patent: October 23, 1984
    Assignee: Canadian Patents & Development Limited
    Inventor: Martial Ranger
  • Patent number: 4478883
    Abstract: A dielectric surface is conditioned for electroless plating of a conductive metal thereon by contacting the surface with a multifunctional ionic copolymer. The conditioning can be in the holes and/or on the surfaces of the substrate.
    Type: Grant
    Filed: July 14, 1982
    Date of Patent: October 23, 1984
    Assignee: International Business Machines Corporation
    Inventors: James R. Bupp, Voya Markovich, Tracy E. Napp, Carlos J. Sambucetti
  • Patent number: 4478881
    Abstract: A semiconductor contact has a thin barrier layer less than 500 angstroms in thickness of a metal such as tungsten applied between an aluminum contact layer and a metal-semiconductor compound. The metal semiconductor compound forms a junction with an underlying semiconductor substrate. The thin barrier prevents a chemical reaction between the aluminum of the contact layer and the metal of the metal-semiconductor compound.
    Type: Grant
    Filed: December 28, 1981
    Date of Patent: October 23, 1984
    Assignee: Solid State Devices, Inc.
    Inventors: Meir Bartur, Marc Nicolet
  • Patent number: 4478882
    Abstract: A layer of dielectric material, carrying printed or thick-film circuit components on opposite surfaces, is provided with one or more bores extending between aligned circuit points to be conductively interconnected. The layer is sandwiched between two masks having a perforation of larger diameter in line with each bore, such perforation communicating with a respective chamber in an adjoining member forming part of a pair of clamp jaws pressing the masks against the layer. A conductive liquid or paste in one chamber is pumped through each bore from one chamber into the other, via the adjoining perforations, by the respective application of pressure and suction to these chambers with the aid of membranes or pistons moving codirectionally in one or more strokes.
    Type: Grant
    Filed: June 3, 1982
    Date of Patent: October 23, 1984
    Assignee: Italtel Societa Italiana Telecomunicazioni S.P.A.
    Inventor: Scorta Roberto
  • Patent number: 4476157
    Abstract: Disclosed is a method for manufacturing a Schottky barrier diode. An insulating film is formed on a silicon substrate of one conductivity type. The insulating film has a hole therein partially exposing the surface of the silicon substrate. Then, a polycrystalline silicon layer is formed to cover that portion of the insulating film which surrounds the contact hole, the inner wall of the contact hole, and the exposed surface portion of the silicon substrate. Thereafter, a metal layer is deposited to cover at least the polycrystalline silicon layer. The polycrystalline silicon is then alloyed with the metal to form a metal silicide layer.
    Type: Grant
    Filed: July 28, 1982
    Date of Patent: October 9, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Satoshi Shinozaki
  • Patent number: 4475120
    Abstract: The invention relates to a method suitable for raising the breakdown voltage of a capacitor of the integrated circuit type formed on a semiconductor substrate and characterized in that the lower plate of the capacitor is under etched so that an air wedge is obtained. As a result of the air wedge, the electric current passed through the semiconductor material is lengthened and the breakdown phenomena at the edges of the capacitor are reduced. The invention also relates to capacitors obtained in this manner.
    Type: Grant
    Filed: June 24, 1982
    Date of Patent: October 2, 1984
    Assignee: U.S. Philips Corporation
    Inventor: Michel J. M. Binet