Patents Examined by John D. Smith
  • Patent number: 4503134
    Abstract: A method of modifying a surface of a colored micro-filter element for a color imaging device,which comprises;hardening the surface of the colored micro-filter element formed on an image sensing surface of an imaging device or on a transparent support to be superposed on the image sensing surface;andtreating the so hardened surface of the colored micro-filter element successively with an aqueous acidic solution containing tannic acid and an aqueous solution containing an alkali metal salt of antimonyl tartrate.The stage for hardening said surface can be carried out by treating said surface with a hardening solution or/and by heating the surface.
    Type: Grant
    Filed: May 25, 1983
    Date of Patent: March 5, 1985
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Kenji Matsumoto, Kazuharu Kawashima, Jun Hayashi
  • Patent number: 4502411
    Abstract: An arrangement of articulated grippers for holding a substrate such as a shoe upper to be treated with a reinforcing substance onto a rotatable cube for pressing against a carrier belt of a reinforcing machine. The gripper comprise arms arranged on two sides of a biased plate, each arm being pivotable about a pintle, the arms each having an end which has a wheel in rolling contact with an extension of the biased plate, the other end of each arm having a pivotable flange which is contactable with the outer surface of a substrate loaded onto the biased plate, so as to hold that substrate thereon as the cube rotates during subsequent machine operation.
    Type: Grant
    Filed: November 30, 1983
    Date of Patent: March 5, 1985
    Assignee: USM Corporation
    Inventors: Andrew J. Gilbride, Albert I. Morse, Douglas H. Crowell, Larry L. Holland
  • Patent number: 4503131
    Abstract: Electrical contact materials are provided which belong to the general category of copper that is overplated with a noble metal, usually gold. The improvement resides in the provision of an electroless nickel deposit laid down over the copper layer and under the gold layer, which electroless nickel deposit is laid down from a particular class of nickel-boron or nickel-phosphorus baths.
    Type: Grant
    Filed: January 18, 1982
    Date of Patent: March 5, 1985
    Assignee: Richardson Chemical Company
    Inventor: Donald W. Baudrand
  • Patent number: 4502201
    Abstract: The invention discloses a semiconductor integrated circuit device characterized in that an inverse transistor element portion and a normal transistor element portion are formed in a common semiconductor layer and are separated from each other by an oxide layer penetrating said semiconductor layer in the direction of its thickness. In particular, in order to attain improved characteristics for the respective devices, the semiconductor layer of the inverse transistor element portion is thinner than the semiconductor layer of the normal transistor element portion.
    Type: Grant
    Filed: December 1, 1981
    Date of Patent: March 5, 1985
    Assignee: Hitachi, Ltd.
    Inventor: Akira Muramatsu
  • Patent number: 4500368
    Abstract: Pure silver and palladium powders are thoroughly mixed and dispersed by ball milling in a solution of a surfactant in a liquid vehicle. After drying and granulating, the resulting powder was heated to 500.degree. C., first to form an Ag/Pd alloy powder and then to cause palladium to precipitate from the interior of the alloy particles, to form a protective barrier of PdO on the alloy particle surfaces and to alter the alloy to 90Ag/10Pd. This powder, when used to make a buried electrode in a ceramic capacitor changes dimensions very little up to 500.degree. C. in the early stage of sintering the ceramic below which temperature the ceramic is weakest and most subject to cleaving.
    Type: Grant
    Filed: May 12, 1983
    Date of Patent: February 19, 1985
    Assignee: Sprague Electric Company
    Inventor: Galeb H. Maher
  • Patent number: 4500563
    Abstract: Semiconductive wafers are processed, i.e., etched or layers deposited thereon, by means of a plasma enhanced chemical vapor processing system wherein the plasma is generated by a train of R.F. power pulses. The pulse repetition rate, pulse length and peak power level of the individual pulses are independently variably controlled to variably control the uniformity of the processing of the semiconductive wafers within the processing gaps.
    Type: Grant
    Filed: December 15, 1982
    Date of Patent: February 19, 1985
    Assignee: Pacific Western Systems, Inc.
    Inventors: Charles E. Ellenberger, George L. Bower, William R. Snow
  • Patent number: 4499853
    Abstract: An apparatus for chemically vapor-depositing silicon material on surfaces of a plurality of substrates arranged in a stack that is continuously rotating. A gas distributor formed of a pair of coaxially tubes, in fixed relation with the rotating substrates, provides a pair of gas streams from a pair of parallel slots extending lengthwise of the tube facing the substrates. Gas input through the inner tube is passed through holes conducting gas from the inner tube to the outer tube and into the chamber as two gas streams. Substantially uniform deposition is achieved within .+-.5% with gas high deposition rates effected by high flow gas streams that are not turbulent.
    Type: Grant
    Filed: December 9, 1983
    Date of Patent: February 19, 1985
    Assignee: RCA Corporation
    Inventor: Edward A. Miller
  • Patent number: 4499850
    Abstract: Methods of and apparatus for coating the glass envelope and predetermined portions of the end caps of a fluorescent lamp with a coating of polymeric material including securing the end caps against displacement, subsequently, preheating the glass envelope and the predetermined portion of the end caps to a first predetermined temperature above the melting point of the polymeric material for a predetermined amount of time; subsequently, masking the electrical connecting pins and all of the end caps except the predetermined portion thereof; subsequently, exposing the glass envelope and the predetermined portion of the end caps to a fluidized bed of powder of the polymeric material for a predetermined amount of time to apply a coating of the powder to the glass envelope and to the predetermined portion of the end caps; subsequently, reheating the glass envelope and the predetermined portion of the end caps to a predetermined temperature above the melting point of the polymeric material and for a predetermined amo
    Type: Grant
    Filed: July 25, 1983
    Date of Patent: February 19, 1985
    Inventor: James D. Nolan
  • Patent number: 4498416
    Abstract: Installation for treatment of materials for semi-conductors, starting from slices (30) gathered onto carriers (5) and treated in a series of vacuum chambers. The installation is in modular form, each module (A, B, C, D) including a straight tubular portion (1, 2, 3, 4) which forms with the adjacent modules a continuous tunnel for straight flow of the carriers (5). The carriers are driven and the slices are individually manipulated between the carriers and the treatment apparatus. The invention is applicable to treatment by epitaxis by molecular jets.
    Type: Grant
    Filed: November 2, 1983
    Date of Patent: February 12, 1985
    Assignee: Instrument S.A.
    Inventor: Pierre Bouchaib
  • Patent number: 4497277
    Abstract: A bell made of opaque fused silica and intended for use in the deposition of polycrystalline silicon is assembled from at least three individual sections. The sections are joined to one another at end flanges with gaskets between the flanges. The lengths of the individual sections are determined by the temperature distribution along the bell in use.
    Type: Grant
    Filed: February 18, 1983
    Date of Patent: February 5, 1985
    Assignee: Heraeus-Quarzschmelze
    Inventor: Karl A. Schulke
  • Patent number: 4497890
    Abstract: A process is disclosed for improving the adhesion of a polymeric resist to a gold metallization surface. The process includes the use of a chelating silane as an adhesion promoter between the resist and the gold metallization surface. The improved resist adhesion to the gold metallization surface is attributed to a complexation or chemisorption mechanism. The adhesion promoters of interest contain moieties capable of acting as chelating or chemisorption sites on the molecular silane, thus creating layer-to-layer bonding with greater strength than that observed where just Van der Waals interactions occur to the gold surface atoms.
    Type: Grant
    Filed: April 8, 1983
    Date of Patent: February 5, 1985
    Assignee: Motorola, Inc.
    Inventor: John N. Helbert
  • Patent number: 4495222
    Abstract: Semiconductor devices with resistor regions, capable of operating at higher temperatures, and having improved bond pull strength are obtained by using a single layer (e.g. Ni--Cr) to act as a combined resistive layer and barrier layer. When placed in the contact windows between the semiconductor (e.g. Si) and the interconnect metallization, (e.g. Al) and Ni--Cr layer acts as a diffusion barrier to prevent interdiffusion of silicon and aluminum and contact alloying punch-through. When placed elsewhere on the device the Ni--Cr layer also serves as thin film resistor material. Wire bond pull strength is improved by placing an adhesion layer (e.g. polysilicon) beneath the portion of the resistive barrier layer underlying the bonding pads. The polysilicon layer rests on the insulator (e.g. SiO.sub.2) covering the semiconductor substrate.
    Type: Grant
    Filed: November 7, 1983
    Date of Patent: January 22, 1985
    Assignee: Motorola, Inc.
    Inventors: George F. Anderson, Dan L. Burt
  • Patent number: 4495220
    Abstract: A technique for employing polyimide as an inter-metal dielectric layer, while avoiding the difficulties usually associated with this material. An upper layer of silicon dioxide is employed as a hard mask over the polyimide, and is highly doped with phosphorous to prevent thermal cracking. Via holes are formed in a multi-stage etching process that includes a first dry-etching step that effects isotropic etching to form holes with desirably sloped sidewalls, and a second dry-etching step that effects anisotropic etching to extend the via holes through to a lower metal surface without significantly enlarging the holes in width. Finally, a dry-etching step is used to remove any residue of polyimide and to strip the silicon dioxide layer from over the polyimide. The bottom of the hole is then sputter-etched prior to metallization.
    Type: Grant
    Filed: October 7, 1983
    Date of Patent: January 22, 1985
    Assignee: TRW Inc.
    Inventors: Stanley Wolf, Warren C. Atwood
  • Patent number: 4495215
    Abstract: A fluidized bed furnace for coating fuel particles for nuclear reactors, ticularly high temperature reactors, can be emptied without cooling down the reaction tube by substituting an inert gas for the coating gas and then lowering the inner tube through which this gas is fed so as to clear a passage in the surrounding outer gas feed tube through which the kernels may fall down to a diverting device in the intermediate space between the inner and outer tubes that guides the kernels to a discharge tube. The reaction tube is emptied by lowering the feed gas pressure by cutting off the carrier gas flow and regulating the escape of the inert gas through an overflow pipe. After the reactor is emptied, the flow of carrier gas can be restored and the overflow pipe shut, so that the reactor can be refilled, after which the flow of coating gas is restored and another coating operation can begin without delay.
    Type: Grant
    Filed: January 10, 1983
    Date of Patent: January 22, 1985
    Assignee: Kernforschungsanlage Julich Gesellschaft mit beschrankter Haftung
    Inventors: Eike Barnert, Heinz Schmitz
  • Patent number: 4493886
    Abstract: Amorphous chalcogenide films substantially free from particulate and microstructure are formed on a substrate from solution. The solution contains a glass-forming chalcogenide compound dissolved in a non-aqueous vaporizable solvent, such as a low molecular weight amine, and is substantially free from particulate or crystallizable material. Film formation is effected by coating the solution onto the substrate in a non-vacuumized environment, and thereafter evaporating the solvent from the coating. The procedure is particularly useful in forming amorphous chalcogenide resists for photolithographic applications.
    Type: Grant
    Filed: March 27, 1984
    Date of Patent: January 15, 1985
    Assignee: University Patents, Inc.
    Inventor: Imants R. Lauks
  • Patent number: 4493287
    Abstract: To secure accurate control over rapid diffusion such as the diffusion of zinc into gallium arsenide, the source and slices to be processed are isolated from one another during an initial warm-up period. This is done using one vessel for the crystal slice and a second vessel for the source. The source vessel initially blocks an opening in the slice vessel while the source and slice are brought to the desired diffusion temperature. The source vessel is then slid through the opening to a diffusing position in which a trailing part of the source vessel again plugs the opening in the slice vessel and in which an open part of the source vessel is now in the interior of the slice vessel. Use of this arrangement avoids the uncontrolled diffusion which occurs in current diffusion capsules during initial heating of the capsule.
    Type: Grant
    Filed: December 3, 1982
    Date of Patent: January 15, 1985
    Assignee: Northern Telecom Limited
    Inventor: Anthony J. Springthorpe
  • Patent number: 4492717
    Abstract: A method is given for forming a planarized integrated circuit structure just prior to the formation of metallurgy interconnection lines on the integrated circuit. The method begins with the integrated circuit intermediate product having devices formed therein but before interconnection metallurgy has been formed on the principal surface of the product. A glass layer is deposited in a non-conformal way onto the principal surface of the integrated circuit. The glass is chosen to have a thermal coefficient of expansion that approximates that silicon and has a softening temperature of less than about 1200.degree. C. The thermal coefficient of expansion approximates that of silicon to reduce stress problems in the integrated circuit structure. The relatively low softening temperature is required for the next step of heating the structure to cause the flow of glass on the surface of the integrated circuit product to fill in the irregularities therein and to thereby planarize the integrated circuit surface.
    Type: Grant
    Filed: July 27, 1981
    Date of Patent: January 8, 1985
    Assignee: International Business Machines Corporation
    Inventors: William A. Pliskin, Jacob Riseman
  • Patent number: 4492180
    Abstract: Apparatus for indexing and accurately registering a selected one of a plurality of deposition masks in operative relationship to a substrate comprising carriage means for supporting a plurality of deposition masks in an aligned spaced relationship relative to each other wherein each of the deposition masks has a selected number of prealigned registration members located thereon in a predetermined pattern and which are adapted to co-act with reference registration members loaded thereagainst, gantry means for supporting a substrate at a deposition station above the surface of the deposition masks having the prealigned registration members located thereon, reference registration members which are located on the substrate or around the periphery of the gantry means and which are directed towards and adapted to be loaded against the prealigned registration members to position the gantry means and the substrate relative to the selected one of said plurality of deposition masks, indexing means for transporting the
    Type: Grant
    Filed: March 16, 1981
    Date of Patent: January 8, 1985
    Assignee: Applied Magnetics Corporation
    Inventor: Richard T. Martin
  • Patent number: 4492181
    Abstract: A method and a multiple chamber apparatus for the continuous production of tandem, amorphous, photovoltaic solar cells on substrate material, whereby, at least six amorphous layers are continuously and sequentially deposited on the substrate material under steady conditions. The substrate material is driven from a supply core, through at least two triads of deposition chambers, to a take-up core. Each amorphous layer of each p-i-n-type cell is produced in one chamber of the triad of deposition chambers. In the first chamber of each triad of chambers, dopant gases are introduced to deposit a first conductive layer. In the second chamber of each triad of chambers, reaction gases are introduced to deposit an intrinsic layer atop the first layer. And in the third chamber of each triad of chambers, dopant gases are introduced to deposit a second conductive layer, opposite in conductivity from the first conductive layer, atop the intrinsic layer.
    Type: Grant
    Filed: March 19, 1982
    Date of Patent: January 8, 1985
    Assignee: Sovonics Solar Systems
    Inventors: Herbert C. Ovshinsky, Masatsugu Izu
  • Patent number: 4491607
    Abstract: Mold release agents and means for their application are provided. The release agents are used in coating molds for forming expandible plastics. They are especially applicable to polyurethane-based reaction injection molding (RIM) systems. The release agents, which have a controlled saponified fatty acid content (unsaturated as oleate and/or linoleate and saturated as C.sub.8 to C.sub.12 alkanoate) make for significant advantage with respect to ease of release, prevention of residual build-up, mold and part cleanability, health and safety, cost, etc.
    Type: Grant
    Filed: November 23, 1981
    Date of Patent: January 1, 1985
    Assignee: Park Chemical Company
    Inventor: Robert J. Wesala