Abstract: A detection device is provided. The detection device includes a substrate having a first surface and a second surface, and the first surface is disposed opposite to the second surface. The detection device also includes a switch element disposed on the first surface, and a light sensing element disposed on the first surface and electrically connected to the switch element. The detection device also includes a first circuit disposed on the second surface. The substrate has a first through-via, and the switch element is electrically connected to the first circuit through the first through-via.

Abstract: A multi-terminal inductor and method for forming the multi-terminal inductor are provided. In some embodiments, an interconnect structure is arranged over a semiconductor substrate. A passivation layer is arranged over the interconnect structure. A first magnetic layer is arranged over the passivation layer, and a conductive wire laterally extends from a first input/output (I/O) bond structure at a first location to a second I/O bond structure at a second location. A third I/O bond structure branches off of the conductive wire at a third location between the first location and the second location. A connection between the third I/O bond structure and the first I/O bond structure has a first inductance. Alternatively, a connection between the first I/O bond structure and the second I/O bond structure has a second inductance different than the first inductance.

Abstract: Provided is a semiconductor structure including a substrate, an interconnect structure, a pad, a protective layer, and a bonding structure. The interconnect structure is disposed over the substrate. The pad is disposed over and electrically connected to the interconnect structure. A top surface of the pad has a probe mark and the probe mark has a concave surface. The protective layer conformally covers the top surface of the pad and the probe mark. The bonding structure is disposed over the protective layer. The bonding structure includes a bonding dielectric layer and a first bonding metal layer penetrating the bonding dielectric layer and the protective layer to electrically connect to the pad. A method of manufacturing the semiconductor structure is also provided.

Abstract: The present disclosure relates to a chip size package that enables realization of a compact chip size package in which a solid-state imaging element and a light emitting element are integrated, a method of manufacturing the same, an electronic device, and an endoscope. The chip size package which is an aspect of the present disclosure is provided with a solid-state imaging element which generates a pixel signal according to incident light and a light emitting element which outputs irradiation light according to voltage applied in which the solid-state imaging element and the light emitting element are integrated. The present disclosure is applicable to, for example, a compact electronic device, a medical endoscope, and the like.

Abstract: There is provided a film forming method including: an etching step of etching a portion of a base film to reduce a film thickness of the base film by intermittently supplying a tungsten chloride gas into a processing container while performing a purging step in the course of the intermittent supply of the tungsten chloride gas, wherein the processing container accommodates a substrate, and the base film is formed on a surface of the substrate; and a film forming step of forming a tungsten film on the base film by alternately supplying the tungsten chloride gas and a reducing gas for reducing the tungsten chloride gas into the processing container while performing the purging step in the course of the alternate supply of the tungsten chloride gas and the reducing gas, wherein the film forming step occurs after the etching step.

Abstract: Disclosed is a film forming method including forming a metal oxide film on a base film by alternately supplying a metal-containing gas and a plasmatized oxidizing gas. The metal-containing gas is changed from a first metal-containing gas having no halogen to a second metal-containing gas different from the first metal-containing gas during the film forming of the metal oxide film.

Abstract: To achieve the miniaturization of and the enhancement of the strength of a semiconductor element.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: A light-emitting module includes a housing, a flexible film, and a protection portion. The housing includes a plurality of light-emitting units arranged in a matrix configuration and at least a switch electrically connected to at least one of the plurality of light-emitting units. The flexible film is detachably coupled to the housing. The protection portion covers the plurality of light-emitting units.

Abstract: Generally, examples described herein relate to integrated solutions for forming cladding layers on trimmed layers that were formed as part of a superlattice. In an example, a first material is selectively etched in a first processing chamber of a processing system. The first material is disposed within alternating layers of the first material and a second material in a channel region on a substrate. A portion of the second material is trimmed in the first processing chamber of the processing system. The substrate is transferred from the first processing chamber of the processing system to a second processing chamber of the processing system without exposing the substrate to an ambient environment exterior to the processing system. A cladding layer is epitaxially grown on respective layers of the trimmed second material in the second processing chamber of the processing system.

Abstract: The present invention provides an OLED display panel. The display panel includes a plurality of sub-pixels arranged in an array. Each of the sub-pixels comprises a base substrate, a TFT layer, a flat layer, a first electrode, a pixel defining layer, a light emitting layer, a transparent second electrode, and an encapsulation layer. A portion of at least one of the flat layer and the pixel defining layer is formed by a black shielding material. The OLED display panel can be prevented from reflecting ambient light without improving the light extraction efficiency, thereby improving the viewing experience of the OLED display panel by the arrangement of a portion of at least one of the flat layer and the pixel defining layer is formed by a black shielding material.

Abstract: A method for fabricating a semiconductor device includes forming a line structure including a first contact plug on a semiconductor substrate and a conductive line on the first contact plug, forming a low-k layer having a first low-k, which covers a top surface and side walls of the line structure, performing a converting process on the low-k layer to form a non-converting portion adjacent to side walls of the first contact plug and maintains the first low-k and a converting portion adjacent to side walls of the conductive line and having a second low-k that is lower than the first low-k, and forming a second contact plug which is adjacent to the first contact plug with the non-converting portion therebetween while being adjacent to the conductive line with the converting portion therebetween.

Abstract: An image pickup device includes: a first electrode film; an organic photoelectric conversion film; a second electrode film; and a metal wiring film electrically connected to the second electrode film, the first electrode film, the organic photoelectric conversion film, and the second electrode film all provided on a substrate in this order, and the metal wiring film coating an entire side of the organic photoelectric conversion film.

Abstract: A method for making a semiconductor device may include forming spaced apart source and drain regions in a semiconductor layer with a channel region extending therebetween, and forming a gate on the channel region. The method may further include forming a body contact in the semiconductor layer and including a body contact dopant diffusion blocking superlattice extending through the body contact to divide the body contact into a first body contact region and an second body contact region with the second body contact region having a same conductivity and higher dopant concentration than the first body contact region. The body contact dopant diffusion blocking superlattice may include a respective plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

Abstract: A wafer dividing method includes a first step of cutting a back side of the wafer by using a cutting blade thereby forming a cut groove on the back side of the wafer along each division line, such that each cut groove has a depth not reaching the front side of the wafer from the back side thereof. A second step includes supplying a water-soluble liquid resin to the back side of the wafer thereby forming a water-soluble protective film on the back side of the wafer. A third step includes positioning a focal point of a laser beam on the bottom surface of each cut groove and next applying the laser beam to the bottom surface of each cut groove thereby fully cutting the wafer along each cut groove.

Abstract: A method of forming a transistor device where an extended drain region is formed by performing angled ion implantation of conductivity dopants of a first conductivity type into the sidewalls and bottom portion of a trench. The bottom portion of the trench is then implanted with dopants of a second conductivity type. Source and drain regions are formed on opposing sides of the trench including in upper portions of the trench sidewalls. A channel region is formed in a trench sidewall below the source region. The trench includes a control terminal structure. After formation of the transistor device, the net conductivity type of the bottom portion of the trench is of the first conductivity type.

Abstract: The present disclosure relates to a semiconductor device and a method of manufacturing a semiconductor device. The semiconductor device including first and second semiconductor dies arranged on respective and first and second carriers, the first and second semiconductor dies each comprising a first contact and a second contact arranged on a top major surface of the respective semiconductor dies and a third contact arranged on a bottom major surface the respective semiconductor dies; first and second die connection portions, arranged on the respective first and second carriers, connected to the third contacts of the respective first and second semiconductor dies; and a first contact connection member, extending from the first contact of the first semiconductor die to the die connection portion of second carrier, electrical connection of the first contact of the first semiconductor die to the third contact of the second semiconductor die.

Abstract: The present invention teaches a direct-lit backlight module and a related manufacturing method. The direct-lit backlight module includes a driver substrate, a reflection layer on the driver substrate, multiple mini-LEDs arranged in an array on the reflection layer, multiple reflection bumps on the reflection layer among the mini-LEDs, and an optical film set on the reflection layer, the mini-LEDs, and the reflection bumps. The mini-LEDs are electrically connected to the driver substrate. The reflection bumps jointly form a mesh dot structure. When light passes through the mesh dot structure, the light is scattered by the mesh dot structure to various directions, thereby enhancing the lighting efficiency of the direct-lit backlight module.

Abstract: A sensor package includes a semiconductor die including at least one current sensor. The semiconductor die includes a first pass through hole extending from one side of the semiconductor die to an opposite side of the semiconductor die. The semiconductor package further includes a second pass through hole extending from one side of the sensor package to an opposite side of the sensor package. The second pass through hole is aligned with the first pass through hole and is configured to receive a current-carrying conductor. The at least one current sensor senses current flow in the current-carrying conductor received in the second pass through hole. An end of the current-carrying conductor is coupled to a terminal on a circuit board in the sensor package.

Abstract: Semiconductor device structures comprising a spacer feature having multiple spacer layers are provided. In one example, a semiconductor device includes an active area on a substrate, the active area comprising a source/drain region, a gate structure over the active area, the source/drain region being proximate the gate structure, a spacer feature having a first portion along a sidewall of the gate structure and having a second portion along the source/drain region, wherein the first portion of the spacer feature comprises a bulk spacer layer along the sidewall of the gate structure, wherein the second portion of the spacer feature comprises the bulk spacer layer and a treated seal spacer layer, the treated seal spacer layer being disposed along the source/drain region and between the bulk spacer layer and the source/drain region, and a contact etching stop layer on the spacer feature.