Patents Examined by John Ruggles
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Patent number: 7697382Abstract: A near-field light generating method for irradiating light from a light source to a metal film having a fine opening that has a size of not more than a wavelength of the light emitted from the light source, and forming a fine light spot adjacent to the fine opening on a light outgoing side of the fine opening. The method includes providing the metal film with a rectangular fine opening whose length to width ratio is between 1.1 times and 2 times that of a standard square opening, obtained by increasing the length of the standard square opening, and irradiating the metal film with light from the light source to form the fine light spot, which has a length and a width that are substantially equal to those of the standard square opening, and where the fine light spot has a light intensity, which is not less than two times that of the standard square opening.Type: GrantFiled: September 24, 2004Date of Patent: April 13, 2010Assignee: Canon Kabushiki KaishaInventors: Natsuhiko Mizutani, Tomohiro Yamada
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Patent number: 7691543Abstract: A method of creating data of a mask for manufacturing a semiconductor device. The mask includes at least one auxiliary pattern arranged adjacent to a line pattern. The at least one auxiliary pattern is allocated in accordance with a rule-based method on the basis of an interval between a first line pattern and a second line pattern adjacent to the first line pattern. Size of the at least one auxiliary pattern is then optimized in accordance with a model-based OPC (Optical Proximity Correction), by shifting edges of the at least one auxiliary pattern and edges for one of the line patterns on the basis of a first light intensity threshold on the at least one auxiliary pattern and a second light intensity threshold on the line patterns.Type: GrantFiled: May 1, 2006Date of Patent: April 6, 2010Assignee: Elpida Memory, Inc.Inventor: Tadao Yasuzato
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Patent number: 7691541Abstract: Photomask repair and fabrication with use of direct-write nanolithography, including use of scanning probe microscopic tips (e.g., atomic force microscope tips, etc.) for deposition of ink materials including sol-gel inks. Additive methods can be combined with subtractive methods. Holes can be filled with nanostructures. Heights of the nanostructures filling the holes can be controlled without losing control of the lateral dimensions of the nanostructures. Phase shifters on phase shifting masks (PSMs) are additively repaired with selectively deposited sol-gel material that is converted to solid oxide, which has optical transparency and index of refraction adapted for the phase shifters repaired.Type: GrantFiled: October 21, 2003Date of Patent: April 6, 2010Assignee: NanoInk, Inc.Inventors: Percy Van Crocker, Sylvain Cruchon-Dupeyrat, Linette Demers, Robert Elghanian, Sandeep Disawal, Nabil Amro, Hua Zhang
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Patent number: 7682778Abstract: Provided are contact photomasks and methods using such photomasks for fabricating semiconductor devices and forming contact plugs on portions of active regions exposed between gate lines. The elongated active regions are arrayed in a series of parallel groups with each group being, in turn, aligned along their longitudinal axes to form an acute angle with the gate lines. The contact photomask includes a plurality of openings arranged in parallel lines that are aligned at an angle offset from previously formed gate lines and which may be parallel to the active regions or may be aligned at an angle offset from the axes of both the groups of active regions and the gate lines. Processes for forming contact plugs using such photomasks may provide increased processing margin and extend the utility of conventional exposure equipment for semiconductor devices exhibiting increased integration density and/or built to more demanding design rules.Type: GrantFiled: January 31, 2006Date of Patent: March 23, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Woo Seo, Tae-Hyuk Ahn, Jong-Seo Hong
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Patent number: 7678509Abstract: A light-shielding film pattern 2a having a main opening 5 and auxiliary openings 6 is formed in a first process and, then, recess etching of a transparent substrate (formation of a substrate etched portion 8) is performed in a second process. Thus, the main opening and auxiliary openings can be simultaneously exposed in the first process and the positioning accuracy of them becomes excellent. Patterning of a light-shielding film 2 is performed by the use of an etching mask layer 3a and therefore the processing accuracy of the light-shielding film becomes excellent. The etching mask layer 3a is removed in a third process as the final process and thus the light-shielding film pattern 2a can be protected by the etching mask layer 3a upon recess-etching the transparent substrate in the second process. Thus, it is possible to prevent damage to the light-shielding film pattern 2a in the recess etching of the transparent substrate.Type: GrantFiled: August 9, 2004Date of Patent: March 16, 2010Assignee: Hoya CorporationInventor: Hideki Suda
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Patent number: 7674563Abstract: A phase shift mask manufacturing method comprises the steps of processing a light-shielding layer over a transparent substrate into a predetermined light-shielding pattern, forming a resist film on the predetermined light-shielding pattern, performing writing on the resist film based on writing data and developing the resist film, thereby forming a resist pattern, and etching an underlying layer using the predetermined light-shielding pattern and the resist pattern as a mask, thereby forming recesses, that serve as phase shift portions, in the underlying layer. The writing data includes a portion where pattern data corresponding to at least the two recesses adjacent to each other through a light-shielding portion in the predetermined light-shielding pattern are combined into one pattern data.Type: GrantFiled: February 16, 2007Date of Patent: March 9, 2010Assignee: Hoya CorporationInventor: Hideki Suda
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Patent number: 7674562Abstract: A method for forming a phase shift mask is presented. The method includes providing a substrate including a transparent material having first, second and third regions, the third region being disposed between the first and second regions. The method also includes forming a light reducing layer on a first major surface of the substrate. The light reducing layer is patterned to form a patterned light reducing layer having sidewalls defining openings to expose the first and second regions. The patterned light reducing layer is processed to transform the sidewalls of the patterned light reducing layer to angled sidewalls having an angle of less than 90° from a plane of the first major surface of the substrate. The angled sidewalls improve intensity balance of an image-formed by light-transmitted through the mask.Type: GrantFiled: December 7, 2005Date of Patent: March 9, 2010Assignee: Chartered Semiconductor Manufacturing, Ltd.Inventors: Gek Soon Chua, Sia Kim Tan, Qunying Lin, Cho Jui Tay, Chenggen Quan
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Patent number: 7666553Abstract: A fabrication method for a photomask is disclosed. Two or more metal containing layers are formed over a substrate, and a main pattern and a monitor pattern are formed over one or more of the two or more metal containing layers other than the lowermost metal containing layer. Then, the monitor pattern is measured, and the monitor pattern after being measured is removed. Then, the main pattern is formed over the lowermost metal containing layer to fabricate a photomask formed from the two or more metal containing layers.Type: GrantFiled: March 21, 2006Date of Patent: February 23, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Koji Hosono, Yukihiro Sato
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Patent number: 7642019Abstract: Systems and methods are provided for detecting focus variation in a lithographic process using photomasks having test patterns adapted to print test features with critical dimensions that can be measured and analyzed to determine magnitude and direction of defocus from a best focus position of an exposure tool during the lithographic process.Type: GrantFiled: January 3, 2006Date of Patent: January 5, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Ho-Chul Kim
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Patent number: 7638245Abstract: A method of fabricating integrated circuits according to a first design. One first pattern is common with a second design, and one second pattern is unique to the first design. The first pattern is imaged using a first mask having first patterns formed in a block thereon. No other patterns of the first and second designs are formed on the first mask. The second patterns are imaged on the substrate using a second mask having second patterns formed in a block thereon. At least one third layer pattern is formed on the second mask.Type: GrantFiled: July 3, 2008Date of Patent: December 29, 2009Assignee: LSI CorporationInventors: David J. Sturtevant, Duane B. Barber, Ann I. Kang
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Patent number: 7632609Abstract: A susceptor having the most basic structure has a three-layer structure including a first and a second transparent quartz part and an opaque quartz part sandwiched therebetween. For example, the opaque quartz part is made of “foamed quartz”. In addition, the opacity of the opaque quartz part to flash light is determined to fall within an appropriate range based on the material or thickness of the opaque quartz part, taking into consideration the composition or thickness of a thin film formed on the substrate and various conditions concerning the energy of the irradiation light during flash light irradiation or the like. The stack structure may be composed of a stack of a plurality of opaque quartz layers having different opacities.Type: GrantFiled: October 11, 2006Date of Patent: December 15, 2009Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Noriyasu Fukushima, Hiroki Yoshikawa, Hideo Kaneko, Yukio Inazuki
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Patent number: 7629109Abstract: Mask and integrated circuit fabrication approaches are described to facilitate use of so called “full phase” masks. This facilitates use of masks where substantially all of a layout is defined using phase shifting. In one embodiment, the phase shifting mask and the trim mask are exposed using substantially the same exposure conditions. These approaches facilitate better exposure profiles for the resulting ICs and can thus improve chip yield and increase throughput by reducing the need to alter settings and/or switch reticles between exposures.Type: GrantFiled: April 7, 2008Date of Patent: December 8, 2009Assignee: Synopsys, Inc.Inventors: Christophe Pierrat, Michel Luc Cote
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Patent number: 7615336Abstract: The present application relates to a method of fabricating a display device, including the steps of forming at least one to-be-patterned material layer on a substrate and forming a photo-resist layer on the at least one to-be-patterned material layer, providing a halftone mask including light transmission parts for transmitting light, shielding parts, in which shielding patterns for intercepting the light are formed, and a halftone transmission part, in which a first halftone transmission pattern for transmitting an amount of the light that is less than an amount of an incident light and a second halftone transmission pattern formed on the first halftone transmission pattern for transmitting an amount of the light that is less than the amount of the incident light are formed, exposing the photo-resist layer to the light through the halftone mask, developing the photo-resist layer to form a photo-resist pattern on the at least one to-be-patterned material layer on the subststrate, wherein the photo-resist pattType: GrantFiled: December 21, 2005Date of Patent: November 10, 2009Assignee: LG Display Co., Ltd.Inventor: Ji No Lee
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Patent number: 7604903Abstract: A mask is provided to be used with nanoprint lithography processes to facilitate reproduction of small features required for the production of integrated circuits. A translucent substrate is provided along with one or more three-dimensional features that include one or more vertical sidewalls. An absorbing material is deposited upon one or more of the vertical sidewalls so that light in an incident direction to an upper surface of the substrate will be absorbed by the absorbing material, resulting in light blocking features. One or more horizontal surfaces are formed upon one or more of the three-dimensional features, which allow light rays to exit a lower surface of the substrate unobstructed by the absorbing material.Type: GrantFiled: January 30, 2004Date of Patent: October 20, 2009Assignee: Advanced Micro Devices, Inc.Inventors: Bhanwar Singh, Srikanteswara Dakshina-Murthy, Khoi A. Phan, Bharath Rangarajan, Ramkumar Subramanian
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Patent number: 7588869Abstract: A divided exposure method for a photolithography process is disclosed, which uses a mask. The mask for an exposer having a left and right light intensity deviation includes a substrate; a first pattern in a middle of the substrate; and second and third patterns on left and right sides of the first pattern, respectively, wherein the first and second patterns compensate for the left and right light intensity deviation of the exposer.Type: GrantFiled: December 29, 2004Date of Patent: September 15, 2009Assignee: LG Display Co., Ltd.Inventors: Su Woong Lee, Sang Yoon Paik
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Patent number: 7579121Abstract: An optical proximity correction photomask comprises a transparent substrate, a main feature having a first transmitivity disposed on the transparent substrate and at least one assist feature having a second transmitivity disposed to each side of the main feature and on the transparent substrate, wherein the first transmitivity is not equal to the second transmitivity.Type: GrantFiled: October 7, 2005Date of Patent: August 25, 2009Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Ching-Yu Chang
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Patent number: 7575852Abstract: An oriented assist feature is described that permits transferring of a lithographic pattern corresponding to an integrated circuit from a mask onto a semiconductor substrate. The oriented assist feature does not exhibit a forbidden pitch phenomenon, thereby providing a wide photo process window for a hole pattern.Type: GrantFiled: August 20, 2004Date of Patent: August 18, 2009Assignee: Macronix International Co., Ltd.Inventor: Chin Chen Yang
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Patent number: 7563547Abstract: A photomask ensures the transfer of a pattern having a uniform and desired CD onto a substrate from which an electronic device or the like is made. The photomask includes a transparent substrate, a light-shielding film on the front side of the substrate and defining a mask pattern of transmission regions dedicated for pattern formation, and an auxiliary pattern on the front side of the substrate that alters the intensity of the light beam passing through the substrate. After the mask pattern is formed, the photomask is tested to determine variations between the desired (target) CD and the CDs of the features of a pattern transcribed onto a test wafer using the photomask. A density function in which characteristics of the auxiliary pattern to be formed, e.g., the size, depth and/or pitch of recesses, is developed as a prediction of the intensity distribution of the light beam transmitted through the substrate once the auxiliary pattern is present at the front side of the substrate.Type: GrantFiled: November 8, 2004Date of Patent: July 21, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-hyung Park, Sung-min Huh
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Patent number: 7563546Abstract: Disclosed is a method for forming an optical mask that has reduced processing steps. The invention performs a first patterning of an opaque chrome layer to expose a first region of a transparent quartz substrate and ten etches the first region of the transparent quartz substrate through the chrome layer to create a phase shift region within the transparent quartz substrate. Next, the invention performs additional patterning of the opaque chrome layer to expose a second region of the transparent quartz substrate that is adjacent to the first region. This additional patterning process enlarges the opening formed in the opaque mask formed in the first patterning process. The first region and the second region comprise a continuous area of the transparent quartz substrate.Type: GrantFiled: January 23, 2004Date of Patent: July 21, 2009Assignee: International Business Machiens CorporationInventor: Jason M. Benz
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Patent number: 7560200Abstract: In the mask data generation method, optical simulation is performed on a dual gate including a first gate portion doped with an impurity of a first conductivity type and a second gate portion doped with an impurity of a second conductivity type for correcting design data including the dual gate. Specifically, a first dimesion difference of the first gate portion between a resist dimension obtained in lithography and a dimension obtained after dryetch following the lithography is calculated. Next, a second dimension difference of the second gate portion between a resist dimension obtained in the lithography and a dimension obtained after the dryetch is calculated. Furthermore, after calculating a difference between the first dimension difference and the second dimension difference, the first gate portion or the second gate portion is corrected in the design data by using the calculated difference.Type: GrantFiled: March 16, 2006Date of Patent: July 14, 2009Assignee: Panasonic CorporationInventor: Tokuhiko Tamaki