Patents Examined by Jonathan Han
  • Patent number: 11575074
    Abstract: Light-emitting devices are described herein. A device includes a hybridized device having a top surface and a bottom surface and a packaging substrate comprising a metal inlay in an opening on a top surface of the packaging substrate. The metal inlay is thermally coupled to the bottom surface of the hybridized device. The device also includes conductive contacts on the top surface of the packaging substrate and conductive connectors electrically coupled between the top surface of the hybridized device and the top surface of the packaging substrate.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: February 7, 2023
    Assignee: Lumileds LLC
    Inventors: Tze Yang Hin, Seng Huat Lau, Hideo Kageyama
  • Patent number: 11568275
    Abstract: A system receives a predictive model and receives one or more runtime constraints. The system generates a directed acyclic graph (DAG) of the predictive model indicating dependencies. The system compiles the predictive model into first instructions for a first processor based on the one or more runtime constraints and the DAG. The system packages first instructions, the one or more runtime constraints, and the DAG of the predictive model in a first binary. The system recompiles the predictive model into second instructions for a second processor based on the runtime constraints and the DAG stored in the first processor. The system packages the second instructions, the DAG, and the runtime constraints in a second binary.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: January 31, 2023
    Assignee: GROQ, INC.
    Inventors: Jonathan Alexander Ross, Gregory M. Thorson
  • Patent number: 11569186
    Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: January 31, 2023
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Thorsten Scharf
  • Patent number: 11563104
    Abstract: A semiconductor device is provided. The semiconductor device includes a fin protruding from a semiconductor substrate and a gate structure over the fin. The semiconductor device also includes a source region and a drain region in the fin and at opposite sides of the gate structure. The semiconductor device further includes a gate spacer on a sidewall of the gate structure. The gate spacer includes an air-gap spacer and a sealing spacer above the air-gap spacer, an upper portion of the gate structure is laterally overlapping with the sealing spacer, and the bottom portion of the gate structure is laterally overlapping with the air gap spacer.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: January 24, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hsiung Lin, Pei-Hsun Wang, Chih-Chao Chou, Chia-Hao Chang, Chih-Hao Wang
  • Patent number: 11562304
    Abstract: A device receives real-time data and historical data associated with a product or a service, wherein the real-time data includes data indicating real-time interactions between customers of the product or the service and customer service personnel. The device processes the real-time data and the historical data to generate processed data, and utilizes a first artificial intelligence model with the processed data to determine future events associated with the product or the service, and preventative solutions for the future events. The device extracts one or more features from the processed data to provide extracted features, and utilizes a second artificial intelligence model with the extracted features to determine priorities associated with the preventative solutions. The device performs one or more particular preventative solutions based on the priorities associated with the preventative solutions.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: January 24, 2023
    Assignee: Accenture Global Solutions Limited
    Inventor: Mingzhu Lu
  • Patent number: 11562958
    Abstract: The present application discloses a method for fabricating a semiconductor device. The method includes providing a substrate comprising a central array area and a marginal array area surrounding the central array area; concurrently forming a first bit line above the central array area and a first dummy bit line above the marginal array area; and concurrently forming a second bit line above the central array area and a second dummy bit line above the marginal array area. The second bit line is higher than and offset from the first bit line and the second dummy bit line is directly above the first dummy bit line.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: January 24, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Tse-Yao Huang
  • Patent number: 11558937
    Abstract: A door (100) for a microwave oven (200) is provided that includes: a door frame (102); a substantially transparent, glass or polymeric substrate (10) arranged within the frame (102) to define a viewing window (50); and an electrically conductive mesh (90) spanning the viewing window (50). Further, the mesh (90) comprises a plurality of carbon nanotubes and is embedded in the substrate (10) to shield the microwave radiation generated in the oven (200) from reaching an exterior of the door frame (102).
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: January 17, 2023
    Assignee: Whirlpool Corporation
    Inventors: Hongzhen Zhao, Muhammad Khizar, Ermanno Buzzi
  • Patent number: 11551106
    Abstract: Systems and methods include a method for providing recommendations and advisories associated with a facility. Source data is received in real-time from disparate sources and in disparate formats. The source data provides information about a facility and external systems with which the facility interacts. The source data is aggregated to form ontological frameworks. Each ontological framework models a category of components selected from components of a Things category, components of an Events category, and components of a Methods category. An abstraction layer is created based on the ontological frameworks. The abstraction layer includes abstractions that support queries, ontologies, metadata, and data mapping. A knowledge discovery layer for discovering knowledge from the abstraction layers is provided. Discovering the knowledge includes graph/network computation, graph/network training and validation, and graph representation learning.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: January 10, 2023
    Assignee: Saudi Arabian Oil Company
    Inventor: Marko Maucec
  • Patent number: 11552219
    Abstract: An LED display screen module includes a module substrate and a plurality of LED package structures. The LED package structures are disposed on the module substrate and arranged into an array. Each of the LED package structures includes a plurality of pixels and a packaging layer. The pixels are spaced apart from each other. The packaging layer includes a plurality of packaging portions and a plurality of connecting portions. The packaging portions respectively cover the pixels, and each of the connecting portions is connected between the adjacent two packaging portions. Each of the packaging portions has an upper light emitting surface and a lateral light emitting surface. The upper light emitting surface is a flat surface and is connected to the lateral light emitting surface via a transitional curved surface.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: January 10, 2023
    Assignee: HARVATEK CORPORATION
    Inventors: Jen-Hung Chang, Feng-Hui Chuang
  • Patent number: 11543863
    Abstract: A portable electronic device and an image-capturing module thereof are provided. The image-capturing module includes a circuit substrate, an image-capturing chip, a plurality of first conductive materials, a filter component, a plurality of second conductive materials, and a lens assembly. The circuit substrate includes a plurality of substrate bond pads. The image-capturing chip includes a plurality of chip bond pads. The first conductive materials are respectively disposed on the chip bond pads. The filter component is disposed on the first conductive materials, and the filter component includes a light-transmitting body and a plurality of conductive structures disposed on the light-transmitting body and respectively electrically connected to the first conductive materials. Each of the second conductive materials is electrically connected between the corresponding conductive structure and the corresponding substrate bond pads.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: January 3, 2023
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: Tseng-Chieh Lee, Kung-An Lin
  • Patent number: 11538966
    Abstract: A method of manufacturing a light emitting device, the method includes: preparing an intermediate structure including a supporter, a plurality of light emitting elements arranged on the supporter, a covering layer arranged on the supporter and surrounding the light emitting elements, and wiring electrodes each arranged on and straddling the covering layer and a corresponding one of the light emitting elements: preparing a board including light-reflective resin arranged on a surface of the board; pressing the intermediate structure against the light-reflective resin arranged on the board, with the wiring electrodes facing the light-reflective resin; curing the light-reflective resin to form a light-reflective resin layer; and removing the supporter.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: December 27, 2022
    Assignee: NICHIA CORPORATION
    Inventor: Katsuyoshi Kadan
  • Patent number: 11538914
    Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode, and a pair of source/drain regions. The gate dielectric is disposed in the semiconductor substrate having an upper boundary lower than an upper surface of the semiconductor substrate, and an upper surface flush with the upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric having a first section over the upper boundary of the gate dielectric and a second section over the upper surface of the gate dielectric. The second section partially covers and partially exposes the upper surface of the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: December 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Ta-Yuan Kung, Ruey-Hsin Liu, Chen-Liang Chu, Chih-Wen Yao, Ming-Ta Lei
  • Patent number: 11526791
    Abstract: Embodiments for creating planning tasks are provided. A plurality of atoms are generated. The plurality of atoms are partitioned into a plurality of variables. A casual graph is generated based on the plurality of variables. A layered graph including interchanging variable value layers and action layers is created based on the casual graph. A planning task is generated based on the layered graph.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: December 13, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Katz, Shirin Sohrabi Araghi
  • Patent number: 11527640
    Abstract: Wrap-around contact structures for semiconductor nanowires and nanoribbons, and methods of fabricating wrap-around contact structures for semiconductor nanowires and nanoribbons, are described. In an example, an integrated circuit structure includes a semiconductor nanowire above a first portion of a semiconductor sub-fin. A gate structure surrounds a channel portion of the semiconductor nanowire. A source or drain region is at a first side of the gate structure, the source or drain region including an epitaxial structure on a second portion of the semiconductor sub-fin, the epitaxial structure having substantially vertical sidewalls in alignment with the second portion of the semiconductor sub-fin. A conductive contact structure is along sidewalls of the second portion of the semiconductor sub-fin and along the substantially vertical sidewalls of the epitaxial structure.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: December 13, 2022
    Assignee: Intel Corporation
    Inventors: Rishabh Mehandru, Tahir Ghani, Stephen Cea, Biswajeet Guha
  • Patent number: 11521082
    Abstract: Data protection activity time in a backup environment can be predicted with a computer-implemented method. The method includes gathering datasets of data points from a range of backup components of a backup system and constructing input features for a predictive machine learning model, where the input features relate to backup parameters of the backup system. The method also includes training the predictive machine learning model to predict data protection activity times for the backup system by using the gathered datasets and applying the input features to the model. The method also includes deploying the trained predictive machine learning model to predict a data protection activity time of a backup system formed of a set of the backup components.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: December 6, 2022
    Assignee: Kyndryl, Inc.
    Inventors: Mikael Lindström, Daniela Trevisan, Alex R. Martin, Mu Qiao
  • Patent number: 11521967
    Abstract: A substrate has an active area including first and second doped regions separated by portions of the substrate. Gates are located over the active area, each gate formed extending over a portion of the substrate separating adjacent first and second doped regions. A length of the doped regions is greater than other devices within the substrate that have a same gate oxide thickness. A first metallization layer has first electrical connectors between each of the first doped regions and a gate immediately adjacent thereto, and second electrical connectors connected to each of the second doped regions. A second metallization layer has a first electrical connector connected to each first electrical connector of the first metallization layer, and a second electrical connector connected to each second electrical connector of the first metallization layer, with the second electrical connector of the second metallization layer not overlapping the gates.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: December 6, 2022
    Assignee: STMicroelectronics International N.V.
    Inventor: Vishal Kumar Sharma
  • Patent number: 11515347
    Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: November 29, 2022
    Assignee: OmniVision Technologies, Inc.
    Inventors: Wei-Feng Lin, En-Chi Li, Chi-Chih Huang
  • Patent number: 11508891
    Abstract: A method of manufacturing a light-emitting module according includes providing an intermediate structure, the intermediate structure including a board, and a plurality of light sources, and forming first and second wirings on an upper surface of the intermediate structure. The first wiring includes first extending portions and first connecting portions. The second wiring includes second extending portions and second connecting portions. The forming of the first and second wirings includes forming the first extending portions and the first connecting portions and the second extending portions, forming an insulating member covering at least the first connecting portions while at least a portion of each of the second extending portions is exposed from the insulating member, and forming the second connecting portions on or above a part of the insulating member positioned on or above the first connecting portions of the first wiring.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: November 22, 2022
    Assignee: NICHIA CORPORATION
    Inventor: So Sakamaki
  • Patent number: 11508676
    Abstract: Density-graded adhesion layers on conductive structures within a microelectronic package substrate are described. An example is a density-graded adhesion layer that includes a dense region proximate to a conductive structure that is surrounded by a less dense (or porous) region adjacent to an overlying dielectric layer. Providing such a graded adhesion layer can have a number of benefits, which can include providing both mechanical connections for improved adhesion with a surrounding dielectric layer and provide hermetic protection for the underlying conductive structure from corrosive species. The adhesion layer enables the conductive structure to maintain its as-formed smooth surface which in turn reduces insertion loss of signals transmitted through the conductive structure.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: November 22, 2022
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Kemal Aygun, Srinivas V. Pietambaram, Cemil S. Geyik
  • Patent number: 11508880
    Abstract: A structure and a method for producing a structure are disclosed. In an embodiment a structure includes at least one semiconductor structure comprising at least one semiconductor nanocrystal and a high-density element for increasing a density of the structure, wherein a density of the high-density element is greater than a density of silica, and wherein the structure is configured to emit light.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: November 22, 2022
    Assignee: TDK ELECTRONICS AG
    Inventors: Joseph Treadway, Erik Johansson, Brian Theobald