Abstract: A combined cellular/GNSS (global navigation satellite systems) antenna is provided. The combined cellular/GNSS antenna comprises an external area and an internal area delineated by a circumference of a circle. The combined cellular GNSS antenna further comprises a cellular antenna and a GNSS antenna. The cellular antenna comprises a set of cellular radiators disposed in the external area and connected to a cellular feeding network for excitation of the set of cellular radiators. The GNSS antenna comprises radiation elements disposed in the internal area and has a center located substantially at a center of the circle.

Abstract: There are provided a signal generation unit that generates a predetermined digital signal, a level conversion unit that converts a level of the digital signal generated by the signal generation unit, a DA converter that converts the digital signal of which the level is converted by the level conversion unit into an analog signal in a predetermined intermediate frequency bandwidth, and a control unit that creates correction data for correcting a linearity of a level of an output signal of the DA converter for all frequencies to be used, based on actual data which is data of a level of an actual output signal when a setting of the level of the output signal of the DA converter is changed at a predetermined level interval, at a predetermined frequency, and converts a level of an input signal of the DA converter with the correction data.

Abstract: The present invention discloses an electromagnetic wave generating system, including an electromagnetic generating module, a radiating assembly and a matching unit connected in series between the electromagnetic generating module and the radiating assembly. The electromagnetic generating module is configured to generate an electromagnetic wave signal. The radiating assembly includes one or more radiating units and is configured to be electrically connected with the electromagnetic generating module to generate electromagnetic waves of a corresponding frequency according to the electromagnetic wave signal. The matching unit includes a first matching module, a second matching module and a fixed value inductor. The input end of the first matching module is configured to be electrically connected with the electromagnetic generating module. The fixed value inductor is connected in series between the output end of the first matching module and the radiating assembly.

Abstract: A beam steering antenna structure comprises a stacked antenna module and a first conductive component. The antenna module comprises a first substrate and a second substrate arranged superjacent such that main planes of the substrates extend in parallel. The first substrate comprises a first antenna array transmitting and receiving a first radiation beam. The second substrate comprises a second antenna array transmitting and receiving a second radiation beam. The first conductive component extends adjacent to the antenna module and is at least partially separated from the antenna module in a first direction perpendicular to the main plane of the conductive component. The antenna module is coupled to the conductive component by means of at least one of a galvanic, capacitive, or inductive coupling. At least one of the first and the second radiation beams is at least partially steered away from the other one by the first conductive component.

Abstract: This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.

Abstract: Embodiments of the disclosure relate to an antenna unit. The antenna unit includes a first antenna plate and a second antenna plate. The second antenna plate is spatially disposed from the first antenna plate. A glass frame is disposed between the antenna plates, defining an internal cavity. The antenna unit also includes a printed circuit board (PCB), a first and second integrated circuits (IC) mounted to the at least one PCB. The first IC is configured to send/receive signals at a first frequency. The second IC is configured to send/receive signals at a second frequency different from the first frequency. The antenna unit also includes a waveguide elements configured to transmit signals at the first and second frequencies through respective first and second waveguide channels. The antenna plates, the glass frame, and PCB comprise a material that transmits at least 50% of incident light in the visible spectrum.

Abstract: A resolver converter includes a tracking loop circuit that calculates an angle ? from a resolver output signal, a control and diagnosis circuit that controls the tracking loop circuit and diagnoses based on the resolver output signal, wherein the control and diagnosis circuit, by operating the tracking loop circuit as a direct digital synthesizer (DDS), synchronously detects a noise signal superimposed on the resolver output signal.

Abstract: A compression apparatus performs processing of registering a symbol, which is input, in a predetermined entry among a plurality of entries in a case where the symbol is not registered in a first table having the plurality of entries and outputting the symbol and index data indicating non-compression, processing of outputting index data indicating compression and positional information indicating a position of the entry having the symbol registered therein and having a size smaller than a size of the symbol in a case where the symbol has been registered in the table, and processing of changing the size of the positional information depending on usage conditions of the plurality of entries.

Abstract: A current output module includes a current output section configured to output a current, an AD conversion circuit configured to convert a detection voltage, which is a voltage according to the current output from the current output section, into a digital value, a controller configured to control a current output from the current output section on the basis of the digital value of the detection voltage output from the AD conversion circuit, and a reference voltage generator configured to generate a plurality of reference voltages. The controller includes a processor configured to cause the AD conversion circuit to convert each of the plurality of reference voltages into a digital value, and a corrector configured to calibrate the AD conversion circuit on the basis of each digital value obtained by conversion of the plurality of reference voltages.

Abstract: A terminal comprises a printed circuit board (PCB), a PCB floor, and a rear cover. The metal frame is disposed at edges of the PCB floor. The PCB floor is disposed between the PCB and the rear cover, and the PCB floor is used to ground electronic components. The antenna apparatus may include a split antenna formed by a split provided on the metal frame, and a slot antenna formed by a slot connecting to the split. The slot may be connected to the split at a middle position on one side of the slot, and the slot may be provided on the metal frame of the terminal or on a PCB floor of the terminal.

Abstract: The disclosure provides a micro-wave transducer and a manufacturing method thereof, and belongs to the technical field of communication. The micro-wave transducer includes: a dielectric layer having a first surface and a second surface oppositely arranged; a first electrode layer arranged on the first surface of the dielectric layer, and the reference electrode layer being provided with at least one first opening; at least one transducer electrode arranged on the second surface of the dielectric layer, wherein an orthographic projection of one transducer electrode on the dielectric layer is within an orthographic projection of one first opening on the dielectric layer; at least one first microstrip line arranged on the second surface of the dielectric layer, wherein one first microstrip line is configured to feed one transducer electrode.

Abstract: There is described a hybrid ADC device for converting an analog input signal (Vin) into a digital output signal (Vout), the device comprising a first ADC circuit configured to receive the analog input signal (Vin) and convert it into a first digital signal (Y0); a DAC circuit configured to receive the first digital signal and convert it into a first analog signal; a delay circuit configured to delay the analog input signal; a first combiner configured to generate an analog residual signal by subtracting the first analog signal from the delayed analog input signal; a second ADC circuit configured to receive the residual analog signal and convert it into a second digital signal (Y1); a filter circuit configured to receive the first digital signal and output a filtered first digital signal (Y0?), the filter circuit having a transfer function corresponding to a combined transfer function of the DAC circuit and the second ADC circuit; and a second combiner configured to generate the digital output signal (Vout) by

Abstract: According to one embodiment of the present invention, provided is an analog to digital converter. The analog-to-digital converter according to one embodiment of the present invention comprises an analog amplification unit and a flash conversion unit, wherein the analog amplification unit may have a structure in which in which two input terminal circuits that alternately operate share a single amplifier. Accordingly, the analog-to-digital converter according to one embodiment of the present invention can be implemented in a smaller area and operate at low power, and can have a high resolution while operating at a high speed.

Abstract: A method for cartesian (IQ) to polar phase conversion includes: converting a first input value into a first absolute value, and a second input value into a second absolute value; converting the first absolute value into a first logarithmic value by calculating a scaled logarithmic value of the first absolute value, and the second absolute value into a second logarithmic value by calculating a scaled logarithmic value of the second absolute value; subtracting the first logarithmic value from the second logarithmic value, to provide a subtract value; and selecting a phase value from a plurality of phase values stored in a storage unit. Each of the plurality of phase values corresponds to a respective index value, and the phase value is selected taking the subtract value as the index value.

Abstract: A multiband antenna, having a reflector, and a first array of first radiating elements having a first operational frequency band, the first radiating elements being a plurality of dipole arms, each dipole arm including a plurality of conductive segments coupled in series by a plurality of inductive elements; and a second array of second radiating elements having a second operational frequency band, wherein the plurality of conductive segments each have a length less than one-half wavelength at the second operational frequency band.

Abstract: A current-mode circuit, comprising: at least one switch unit, each switch unit comprising a field-effect transistor connected at its source terminal in series with an impedance and configured to carry a given current, wherein for each switch unit or for at least one of the switch units the impedance is a variable impedance; and an adjustment circuit configured, for each switch unit or for said at least one of the switch units, to adjust an impedance of the variable impedance to calibrate a predetermined property of the switch unit which is dependent on the field-effect transistor.

Abstract: Differential circuitry including first and second current paths each including a succession of first and further load nodes, each successive further load node connected to its preceding load node via a divider impedance; and first switching circuitry connected to the further load node or nodes of the first current path, and second switching circuitry connected to the further load node or nodes of the second current path, the first and second switching circuitry controlling a magnitude of controllable current signals passing through the load nodes of the first current path and the second current path, respectively, wherein: the first load nodes of the first and second current paths include a first pair of load nodes, and the or each successive further load node of the first current path and its corresponding successive further load node of the second current path include a successive further pair of load nodes.

Abstract: A conductive layer includes a microwave transformer for scaling the intensity of a microwave signal of a first frequency by a scaling factor. The transformer includes a first physical area delimited with a closed curve on the conductive layer for receiving the microwave signal from a first space angle and re-emitting a ray of the microwave signal to a second space angle. A ratio of the first physical area to the second physical area is smaller than 0.5. The ratio of the first effective area to the first physical area is larger than the ratio of the second effective area to the second physical area. The scaling factor is the ratio of the maximal intensity of the re-emitted ray and the intensity of a ray through an open aperture having a physical area equivalent to the second physical area in the same direction than the re-emitted ray.

Abstract: The present disclosure relates to improved electronic structures for propagating logic states between superconducting digital logic gates using a three-junction interferometer in a receiver circuit to reduce reflecting signals that otherwise result in distortions in the signals being transmitted between the gates. Other improved electronic structures comprise passive transmission lines (PTLs) with transmission line matching circuitry that has previously been avoided. The matching circuitry minimizes generation and propagation of spurious pulses emitted by Josephson junctions used in the digital logic gates.

Abstract: Systems and methods for compression of data that exhibits mixed compressibility, such as floating-point data, are provided. As one example, aspects of the present disclosure can be used to compress floating-point data that represents the values of parameters of a machine-learned model. Therefore, aspects of the present disclosure can be used to compress machine-learned models (e.g., for reducing storage requirements associated with the model, reducing the bandwidth expended to transmit the model, etc.).