Abstract: The present disclosure relates to the fabrication of microelectronic devices having at least one negative differential resistance device formed therein. In at least one embodiment, the negative differential resistance devices may be formed utilizing quantum wells. Embodiments of negative differential resistance devices of present description may achieve high peak drive current to enable high performance and a high peak-to-valley current ratio to enable low power dissipation and noise margins, which allows for their use in logic and/or memory integrated circuitry.

Abstract: Embodiments of the present disclosure relate to semiconductor devices such as transistors used for amplifying or switching electronic signals. In one embodiment, a first trench is formed in a dielectric layer formed on a substrate to expose a surface of the substrate, a multi-stack layer structure is formed within the first trench, and a third semiconductor compound layer is formed on the second semiconductor compound layer, wherein the second semiconductor compound layer has an etching resistance against an etchant lower than that of the first and third semiconductor compound layers, a second trench is formed in the dielectric layer to partially expose at least the second semiconductor compound layer and the third semiconductor compound layer, and the second semiconductor compound layer is selectively removed so that the first semiconductor compound layer is isolated from the third semiconductor compound layer by an air gap.

Abstract: A package (120), wherein the package (120) has at least one electronic chip (124), an encapsulation body (138) that encapsulates the electronic chip(s) (124), and a plurality of terminal pins (122) to connect the electronic chip(s) (124), wherein each of the said terminal pins (122) has an encapsulated section (126), which is encapsulated at least partially by the encapsulation body (138) and has an exposed section (128) that protrudes from the encapsulation body (138), and wherein at least a portion of the exposed sections (128) laterally extends from the encapsulation body (138) up to a reversal point (130) and laterally extends back from the reversal point (130) to the encapsulation body (138), so that a free end (132) of the exposed sections (128) is laterally aligned with or to a corresponding side wall (134) of the encapsulation body (138) or is spaced from the corresponding side wall (134) of the encapsulation body (138) laterally outwardly.

Abstract: A light-emitting diode arrangement includes a light-emitting diode and a coding resistor for coding the light-emitting diode. The coding resistor is embodied as a star connection of a number of resistors. Furthermore, a module includes a plurality of light-emitting diode arrangements. Furthermore, a method for producing a light-emitting diode arrangement is specified, wherein the coding of a coding resistor is carried out depending on a determined characteristic of the light-emitting diode.

Abstract: A device includes a first package component, and a second package component underlying the first package component. The second package component includes a first electrical connector at a top surface of the second package component, wherein the first electrical connector is bonded to the first package component. The second package component further includes a second electrical connector at the top surface of the second package component, wherein no package component is overlying and bonded to the second electrical connector.

Abstract: A flexible display device includes a folding section formed on a flexible substrate, a flat section connected to the folding section, and a display area for displaying an image, wherein the display area is formed on the folding section and the flat section, wherein each of the display areas of the folding section and the flat section includes a plurality of pixels and a plurality of wires for supplying electrical signals to the pixels, and wherein the wires in the display area of the folding section include a winding wire extending in a winding configuration on the flexible substrate.

Abstract: Devices employing semiconductor die having hydrophobic coatings, and related cooling methods are disclosed. A device may include at least one semiconductor die electrically coupled to a substrate by electrical contact elements. During operation the semiconductor die and the electrical contact elements generate heat. By applying hydrophobic coatings to the semiconductor die and the electrical contact elements, a cooling fluid may be used to directly cool the semiconductor die and the electrical contact elements to maintain these components within temperature limits and free from electrical shorting and corrosion. In this manner, the semiconductor die and associated electrical contact elements may be cooled to avoid the creation of damaging localized hot spots and temperature-sensitive semiconductor performance issues.

Abstract: A metal gate structure located on a substrate includes a gate dielectric layer, a metal layer and a titanium aluminum nitride metal layer. The gate dielectric layer is located on the substrate. The metal layer is located on the gate dielectric layer. The titanium aluminum nitride metal layer is located on the metal layer.

Abstract: A method of forming a lithium-ion battery by spinning and a battery formed thereby are disclosed. The spinning may include electrospinning A first anode layer may be spun, followed by a first separator layer, a first cathode layer, and a second separator layer. Each layer may be spun directly onto the previously spun layer to provide a battery that does not include metal current collectors. The anode and/or cathode layers may include polyacrylonitrile (PAN) fibers. To render the anode and cathode layers conductive, they may be carbonized using a heat source (e.g., a laser). The disclosed method may allow for the incorporation of high capacity materials, such as sulfur and/or silicon, in the electrode active materials.

Abstract: High field-effect mobility is provided for a transistor including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a bottom-gate transistor including an oxide semiconductor layer, an oxide semiconductor layer functioning as a current path (channel) of the transistor is sandwiched between oxide semiconductor layers having lower carrier densities than the oxide semiconductor layer. In such a structure, the channel is formed away from the interface of the oxide semiconductor stacked layer with an insulating layer in contact with the oxide semiconductor stacked layer, i.e., a buried channel is formed.

Abstract: A graphene semiconductor including graphene and a metal atomic layer disposed on the graphene, wherein the metal atomic layer includes a metal, which is capable of charge transfer with the graphene.

Abstract: A curved display device includes a first substrate, a pixels and a second substrate. The first substrate is curved along a first direction and includes a pixel area through which light is transmitted and a non-pixel area which blocks light transmission therethrough. The pixel is disposed in the pixel area. The second substrate is curved along the first direction, and is opposite to and coupled to the first substrate. First trenches are defined in at least one substrate among the first and second substrates and extending in a second direction intersecting the first direction.

Abstract: An organic EL display device includes a first substrate, a plurality of organic EL devices arranged on the first substrate, a second substrate arranged above the first substrate, and a filling layer arranged between the first substrate and the second substrate, and displays an image on the second-substrate side. The organic EL display device is characterized in that: the organic EL devices each have a light-emission layer, a reflection electrode formed below the light-emission layer and reflecting light from the light-emission layer upwards, and an upper electrode formed above the light-emission layer and having a light transmission property and reflectivity; a structure for resonating the light emitted by the light-emission layer is formed between the reflection electrode and the upper electrode; and the filling layer includes fine particles for diffusing light exiting from the upper electrode added therein.

Abstract: A semiconductor device with fin-shaped structure is disclosed. The semiconductor device includes: a substrate; a fin-shaped structure on the substrate; and an epitaxial layer on a top surface and part of the sidewall of the fin-shaped structure, in which the epitaxial layer and the fin-shaped structure includes a linear gradient of germanium concentration therebetween.

Abstract: A method embodiment includes providing a MEMS wafer comprising an oxide layer, a MEMS substrate, a polysilicon layer. A carrier wafer comprising a first cavity formed using isotropic etching is bonded to the MEMS, wherein the first cavity is aligned with an exposed first portion of the polysilicon layer. The MEMS substrate is patterned, and portions of the sacrificial oxide layer are removed to form a first and second MEMS structure. A cap wafer including a second cavity is bonded to the MEMS wafer, wherein the bonding creates a first sealed cavity including the second cavity aligned to the first MEMS structure, and wherein the second MEMS structure is disposed between a second portion of the polysilicon layer and the cap wafer. Portions of the carrier wafer are removed so that first cavity acts as a channel to ambient pressure for the first MEMS structure.

Abstract: A memory module is disclosed. The memory module may have an insulator. The memory module may also have a device disposed within the insulator. The memory module may further have a filler disposed on the device. The filler may be configured to expand and flow into one or more cracks in the insulator, when the filler is subjected to a threshold temperature.

Abstract: An apparatus and methods for controlling energy consumption of an electronic device determine an availability of an energy source to provide energy to the electronic device. The apparatus and methods control, by power management control logic of the electronic device, energy consumption of the electronic device in response to determining the availability of the energy source.

Abstract: Semiconductor fuses with epitaxial fuse link regions and fabrication methods thereof are presented. The methods include: fabricating a semiconductor fuse including an anode region and a cathode region electrically linked by a fuse link region, and the fabricating including: forming, epitaxially, the fuse link region between the anode region and the cathode region, wherein the fuse link region facilitates the semiconductor fuse open circuiting from applying a programming current between the anode region and the cathode region thereof. The semiconductor fuses include: an anode region and a cathode region electrically linked by a fuse link region, wherein the fuse link region includes an epitaxial structure and facilitates the semiconductor fuse open circuiting from applying a programming current between the anode region and the cathode region, wherein the epitaxial structure is in at least partial crystallographic alignment with the anode region and the cathode region of the semiconductor fuse.

Abstract: An embodiment, in a single structure, combines a pad including a connection terminal suitable for coupling the circuit elements integrated in a chip to circuits outside of the chip itself and at least one capacitor. By combining a connection pad and a capacitor in a single structure, it may be possible to reduce the overall area of the chip that otherwise in common integrated circuits would be greater due to the presence of the capacitor itself. In this way, the costs and size of the chip can be reduced.

Abstract: A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a substrate having at least a carrying region and a cutting region defined on a surface thereof, wherein the cutting region surrounds the carrying region; disposing at least an electronic element on the carrying region of the substrate; disposing a shield having a recess portion and at least a positioning member extending outwards, on the carrying region of the substrate with the electronic element received in the recess portion and the positioning member extending outwards to the cutting region; and performing a cutting process along the cutting region to remove portions of the positioning member and the substrate. Therefore, the shield is precisely positioned on the substrate.