Abstract: The present invention discloses an array substrate, a method of manufacturing the array substrate and a display device. Since the respective surfaces of the sources, the drains and the data lines are clad by the respective insulating films, in formation of the patterns of the pixel electrodes above the insulating films by using a patterning process, the insulating films can prevent the sources and the data lines provided under them from being corroded by an etching agent when an etching process is performed to form the patterns of the pixel electrodes, so as to avoid an influence on display quality of a display panel.

Abstract: The present invention discloses a multi-gate thin film transistor for realizing a multi-gate occupying a small area, pixels provided with the multi-gate TFTs are high in aperture ratio, and a display device provided with the multi-gate TFTs is high in resolution. The multi-gate thin film transistor comprises: at least three gate electrodes; a plurality of active layers corresponding to each of the gate electrodes, respectively, the active layers being formed into an integrated structure; a source electrode connected with one of the plurality of active layers; and a plurality of drain electrodes connected with each of the remainder of the plurality of active layers, respectively. The present invention further discloses an array substrate comprising the multi-gate thin film transistor, and a display device.

Abstract: An optoelectronic device (10, 1010) having a semiconductor layer structure (100, 1100) comprising a first light-active layer (140) and a second light-active layer (240). A first tunnel junction (200) is formed between the first light-active layer (140) and the second light-active layer (240). A first Bragg reflector (160) is formed between the first light-active layer (140) and the first tunnel junction (200). A second Bragg reflector (260) is formed between the second light-active layer (240) and the first tunnel junction (200).

Abstract: One or more Zener diodes and a field effect transistor having a drain connected in series with the one or more Zener diodes are integrally formed by a plurality of doped regions in the same P-type semiconductor substrate and separated by a punch through stop region. An N-type region is formed under the one or more Zener diodes.

Abstract: The purpose of the present invention is to provide an organic light-emitting element that comprises an internal light extraction layer on a flexible transparent substrate, that has high luminous efficiency by means of light extraction, and that prevents the breakage and partial or complete separation of electrodes when the organic light-emitting element is repeatedly bent. The organic light-emitting element according to the present invention has an internal light extraction layer, a transparent electrode, and an organic light-emitting layer in this order on the flexible transparent substrate, wherein the value of the ratio (D) represented by formula 1 between the elastic modulus (EMI) of the surface of the internal light extraction layer and the elastic modulus (EMS) of the surface of the transparent electrode side of the transparent substrate is within the range of 100±30%. D (%)=(EMI/EMS)×100(%).

Abstract: A method for fabricating a package structure is provided, including the steps of: disposing and electrically connecting a sensing chip to a substrate; forming an encapsulant on the substrate to encapsulate the sensing chip; and forming a bright layer on the encapsulant to increase the gloss of the package structure. The encapsulant includes an additive to increase the Mohs hardness of the encapsulant. Further, the encapsulant with different additives presents different colors. Therefore, the invention obtains a high-gloss, high-hardness and colorful sensor package structure.

Abstract: Methods of forming a lithium-ion battery on a vehicle component by spinning and vehicle components with a batteries formed thereon are disclosed. The spinning may include electrospinning. A first electrode layer may be spun, followed by a first separator layer, a second electrode layer, and a second separator layer. Each layer may be spun directly onto the previously spun layer to provide a battery that does not include metal current collectors. The anode and/or cathode layers may include polyacrylonitrile (PAN) fibers. To render the anode and cathode layers conductive, they may be carbonized using a heat source (e.g., a laser). The disclosed method may allow for the formation of batteries directly onto a vehicle component, such as a body panel, thereby using otherwise empty space to increase the battery capacity of the vehicle.

Abstract: One embodiment provides a method comprising etching a fin of a fin-shaped field effect transistor (FinFET) to form a reduced fin, and laterally etching the reduced fin to form a fin channel including a first fin channel sidewall and a second fin channel sidewall opposing the first fin channel sidewall. The method further comprises forming a first thin dielectric tunnel and a second thin dielectric tunnel on the first fin channel sidewall and the second fin channel sidewall, respectively. Each thin dielectric tunnel prevents lateral epitaxial crystal growth on the fin channel. The method further comprises etching an insulator layer disposed between the fin channel and a substrate of the FinFET to expose portions of a substrate surface of the substrate. A source epitaxy and a drain epitaxy are formed from vertical epitaxial crystal growth on the exposed portions of the substrate surface after epitaxial deposition.

Abstract: A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do not damage IC device components contiguous to the varistor being fabricated. The lateral thin film varistor may consist of a continuous layer of alternating regions of a first metal oxide layer and a second metal oxide layer formed between two laterally spaced electrodes using a low temperature sputtering process followed by a low temperature annealing process.

Abstract: A semiconductor device comprises: a substrate; a multilayer semiconductor layer located on the substrate; a source located on the multilayer semiconductor layer, the source including a first source portion inside an active region and a second source portion inside a passive region; a drain located on the multilayer semiconductor layer, the drain including a first drain portion inside the active region and a second drain region inside the passive region; a gate located on the multilayer semiconductor layer, the gate including a first gate portion inside the active region and a second gate portion inside the passive region, and the first gate portion being in a form of interdigital among the first source portion and the first drain portion; and a heat dissipating layer disposed at one or more of the first source portion, the first drain portion, the first gate portion, the second source portion, the second drain portion and the second gate portion.

Abstract: Disclosed is a display device integrated with a touch screen panel and a method for fabricating the same. The display includes: a TFT positioned at each pixel region; a first electrode spaced from one of a source electrode or a drain electrode of the TFT; a second electrode facing the first electrode; a TFT protective layer positioned on the TFT and has a first contact hole; a touch signal line positioned between a first touch connection pattern, which is made of the same material as the first electrode, and a second touch connection pattern made of the same material as the second electrode, and transfers a touch driving signal to the second touch connection pattern; a first connection pattern made of the same material as the second electrode; and a first electrode protective layer positioned on the first electrode and the touch signal line.

Abstract: A color-tunable LED emitter with high CRI can be made by mounting multiple LED chips onto a ceramic substrate that has been patterned with metal contacts and paths so as to connect the LED chips into multiple independently addressable LED groups. Each LED group can produce light of a different color, allowing the color of the emitter to be tuned by adjusting the relative amount of operating current supplied to each LED group. At least some of the LED groups include LEDs coated with a broad spectrum phosphor that can reduce the sharpness of spectral peaks, thereby improving CRI and particular components of CRI, such as R9.

Abstract: Disclosed are a light emitting device, a method of manufacturing a light emitting device, a light emitting device package and a lighting system.

Abstract: A method for manufacturing a semiconductor device including a cell region and a peripheral region formed outside the cell region, comprising the steps of (a) providing a semiconductor substrate including a first epitaxial layer of a first conductivity type formed over a main surface thereof, (b) doping a lower band gap impurity for making the band gap smaller than the band gap of the first epitaxial layer before doping into the first epitaxial layer in the cell region, and thereby forming a lower band gap region, (c) after the step (b), forming a plurality of first column regions of a second conductivity type which is the opposite conductivity type to the first conductivity type in such a manner as to be separated from one another in the first epitaxial layer extending from the cell region to the peripheral region, and (d) after the step (c), forming a second epitaxial layer.

Abstract: A display panel and a repairing method thereof are disclosed. In one aspect, the display panel includes an active area including a plurality of pixels and a plurality of signal lines. The panel also includes a repair line at least partially surrounding the active area and overlapping the signal line in the active area and a plurality of first transistors formed on a side of the active area, wherein one end of each of the first transistors overlaps the repair line. The panel further includes a sealing portion configured to seal the active area, the repair line, and the first transistors. The panel also includes a pad portion formed outside the sealing portion and including a plurality of dummy pads respectively connected to the first transistors and a plurality of driving pads respectively connected to the signal lines.

Abstract: A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.

Abstract: A resistive memory structure includes two electrodes sandwiching an insulating region. The structure further includes a nanochannel array providing a conducting path between the two electrodes. The nanochannel array includes a plurality of nanowires that extends from one electrode to the other.

Abstract: An electronic device includes a circuit board and a semiconductor device package. The semiconductor device package includes a laminate layer. The semiconductor device package includes a semiconductor die having an active side, an inactive side opposite the active side, and through-silicon vias (TSVs) conductively connecting the active side to the inactive side and conductively connecting the semiconductor die to one of the laminate layer and the circuit board. The semiconductor device package includes a laminate layer having a side attached to the active side or the inactive side semiconductor die. The semiconductor device package includes solder balls at the side of the laminate layer attached to the semiconductor die, around the semiconductor die, and attached to the circuit board.

Abstract: A camera module and a fabrication method thereof are provided. The camera module includes a lens structure and an image sensor device chip disposed under the lens structure. The lens structure includes a transparent substrate and a lens disposed on the transparent substrate. A spacer is disposed on the transparent substrate to surround the lens, wherein the spacer contains a base pattern and a dry film photoresist. The method includes forming a base pattern on a carrier and attaching a dry film photoresist on the carrier. The dry film photoresist is planarized by a lamination process and then patterned to form a spacer. A transparent substrate having a plurality of lenses is provided. The spacer is stripped from the carrier, attaching on the transparent substrate to surround each of the lenses, and then bonded with image sensor device chips.

Abstract: An integrated circuit (IC) device may include a first active transistor of a first-type in a first-type region. The first active transistor may have a first-type work function material and a low channel dopant concentration in an active portion of the first active transistor. The IC device may also include a first isolation transistor of the first-type in the first-type region. The second active transistor may have a second-type work function material and the low channel dopant concentration in an active portion of the first isolation transistor. The first isolation transistor may be arranged adjacent to the first active transistor.