Patents Examined by Jung Ho Kim
  • Patent number: 6326839
    Abstract: A low voltage current source generates low voltage signals for powering a variable frequency oscillator. The low voltage signals are at a slightly higher voltage until a negative substrate bias is achieved. The oscillator operates at a low frequency for low power consumption when no charge pumping is needed and at a higher frequency when charge pumping is in fact needed or when charge pumping will most likely be needed. The variable frequency oscillator controls a timing signal generator which generates the timing signals used to control the overall operation of the charge pump system. Voltage translation circuitry translates the low voltage current source signals into higher voltage signals which are used to translate the substrate voltage from its negative value to a positive value so that the substrate voltage may be compared to a reference voltage using a conventional comparator.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: December 4, 2001
    Assignee: Townsend and Townsend and Crew LLP
    Inventor: Robert J. Proebsting
  • Patent number: 6323723
    Abstract: Current mirror circuit including a current input terminal (2), a current output terminal (6), a common terminal (8), a first transistor (T1) arranged between the current input terminal (2) and the common terminal (8), a second transistor (T2) arranged between the current output terminal (6) and the common terminal (8), a transconductance stage (TS) having an input terminal coupled to the current input terminal (2), and an output terminal coupled to the common terminal (8), and a bias source (22) for biasing the control electrodes of the first and second transistors (T1, T2). This configuration provides a large bandwidth independently of the input current, accurate current transfer and a single pole system.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: November 27, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Hasan Gül, Johannes P. A. Frambach
  • Patent number: 6323721
    Abstract: A low voltage current source generates low voltage signals for powering a variable frequency oscillator. The low voltage signals are at a slightly higher voltage until a negative substrate bias is achieved. The oscillator operates at a low frequency for low power consumption when no charge pumping is needed and at a higher frequency when charge pumping is in fact needed or when charge pumping will most likely be needed. The variable frequency oscillator controls a timing signal generator which generates the timing signals used to control the overall operation of the charge pump system. Voltage translation circuitry translates the low voltage current source signals into higher voltage signals which are used to translate the substrate voltage from its negative value to a positive value so that the substrate voltage may be compared to a reference voltage using a conventional comparator.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: November 27, 2001
    Assignee: Townsend and Townsend and Crew LLP
    Inventor: Robert J. Proebsting
  • Patent number: 6323726
    Abstract: A diode network having at least one diode which during operation is located in the path of an HF signal, a predetermined diode voltage being applied to the diode to adjust its operating point, is characterised in that a control device is provided to maintain the diode voltage constant. With the invention it is advantageous that, due to the measurement of the DC voltage acting on the diode itself and influencing the operating point, it is not necessary to provide a low-resistance coupling between a voltage source and the diode, with respect to direct current.
    Type: Grant
    Filed: July 6, 1999
    Date of Patent: November 27, 2001
    Assignee: Alcatel
    Inventors: Werner Berger, Klaus Braun
  • Patent number: 6323722
    Abstract: A low voltage current source generates low voltage signals for powering a variable frequency oscillator. The low voltage signals are at a slightly higher voltage until a negative substrate bias is achieved. The oscillator operates at a low frequency for low power consumption when no charge pumping is needed and at a higher frequency when charge pumping is in fact needed or when charge pumping will most likely be needed. The variable frequency oscillator controls a timing signal generator which generates the timing signals used to control the overall operation of the charge pump system. Voltage translation circuitry translates the low voltage current source signals into higher voltage signals which are used to translate the substrate voltage from its negative value to a positive value so that the substrate voltage may be compared to a reference voltage using a conventional comparator.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: November 27, 2001
    Assignee: Townsend and Townsend and Crew LLP
    Inventor: Robert J. Proebsting
  • Patent number: 6320451
    Abstract: An improved method and system for providing power to digital potentiometers is provided by applying the static electric field of an adjacent modified, non-volatile memory cell to the wiper mechanism. During periods of power removal to the circuitry as a whole, the potentiometer maintains the selected resistance via this static power supply.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: November 20, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Arthur D. Harvey, Frank Duffey
  • Patent number: 6320456
    Abstract: A charge pump (10) includes a supply voltage terminal (16) and a ground terminal (18) for generating at an output terminal an output voltage (34) which is higher than the voltage present at the supply voltage terminal. It has two complementary MOS field-effect transistors (12, 14), the source-drain paths of which are connected in series between the supply voltage terminal and the ground terminal. It further has a driving circuit (26) for driving the two MOS field-effect transistors and a charge storage capacitor connected by one terminal to the point connecting the source-drain paths of the two MOS field-effect transistors. This charge storage capacitor is formed by the gate capacitance of a further MOS field-effect transistor (20), the source-drain path of which is connected at one end via a first diode (22) to the supply voltage terminal and at the other end via a second diode (24) to the output terminal.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: November 20, 2001
    Assignee: Texas Instruments Deutschland, GmbH
    Inventor: Erich Bayer
  • Patent number: 6313693
    Abstract: An electronics module (FIG. 1, 30) requires two distinct voltage inputs (V1, V2) and can be damaged when the difference between the two voltages exceeds a maximum value during power up. Additionally the electronics module (30) can be damaged during a power down transition when the difference between the two voltages exceeds a maximum negative value. A voltage ratio control circuit (FIG. 8) which includes at least one diode (D1), a capacitor (C1) whose value is proportional to the product of the value of the second voltage source (V2) and the value of the sum of any decoupling capacitances (C2) divided by the difference between the two input voltages is used to reduce the difference between the two voltages. This prevents damage to the electronic module (FIG. 1, 30) during power up and power down transitions caused by excessive voltage differences in the two voltage inputs (V1 and V2).
    Type: Grant
    Filed: July 10, 2000
    Date of Patent: November 6, 2001
    Assignee: Motorola, Inc.
    Inventor: Sigurd Arnulf Kelm
  • Patent number: 6310497
    Abstract: A power loss detector for generating a signal indicating the need to switch from a main power supply to an auxiliary power supply responsive to detecting that the main power supply has dropped below a predetermined threshold.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: October 30, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventor: Mark S. Strauss
  • Patent number: 6307421
    Abstract: An output circuit for outputting a voltage signal to a circuit working with a power supply of a voltage higher than that under which the output circuits works, having an advantage that the voltage signal quickly increases to the potential level of the power supply of the output circuit, an input circuit for receiving a voltage signal from a circuit working with a power supply of a voltage higher than that under which the output circuits works and for forwarding the voltage signal to a circuit working with a power supply of a voltage identical to that under which the input circuit works, having an advantage that the potential level of the forwarded signal is the voltage of the power supply of the input circuit and the an input/output circuit having the foregoing both advantages.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: October 23, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Harumi Kawano, Akihiro Sushihara
  • Patent number: 6307423
    Abstract: A programmable circuit and method of programming that provide an easily fabricated circuit that does not require specialize manufacturing or packaging techniques. The circuit provides for temporarily setting the circuit outputs which can then be used for testing. The circuit also provides for permanently setting the output by applying sufficient voltage and current to the transistor that permanent spiking of the metallized contact layer through the junction occurs.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: October 23, 2001
    Assignee: Xerox Corporation
    Inventor: Christopher R. Morton
  • Patent number: 6302546
    Abstract: In a preferred embodiment, a glare shield for a portable display screen, the display screen having a display surface with a top edge and first and second sides, the shield including: a material substantially surrounding the top edge and the first and second sides of the display surface and extending from the display surface, the shield being being constructed so as to be deformable in the event of the application of an external force, so as to absorb at least a portion of the external force to protect the display screen therefrom; and the glare shield being removable from the display screen and foldable substantially flat when not in use.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: October 16, 2001
    Inventor: John A. Kordiak
  • Patent number: 6304108
    Abstract: A reference-corrected ratiometric current sensing circuit for sensing a current flowing through a load and a power-controlling pass device includes a sense device, a sense resistor, and a variable reference current source for providing a varying reference current. The varying reference current is varied according to a ratio of the voltage across the sense device to the voltage across the pass device. The ratiometric current sensing circuit of the present invention is capable of accurate current sensing in spite of disparities that may occur between the voltages across the sense and the pass devices. In one embodiment, the variable reference source includes a transconductance amplifier circuit that provides an output current indicative of the voltage difference at its input terminals. Furthermore, the variable reference current source includes a translinear circuit that works with the transconductance amplifier circuit to implement the prescribed arithmetic operations to generate the varying reference current.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: October 16, 2001
    Assignee: Micrel, Incorporated
    Inventor: Bruce Lee Inn
  • Patent number: 6300822
    Abstract: The inventive mechanism provides a hysteresis margin to a comparator. The inventive mechanism generates two different voltage values, one high level and one low level, which forms the noise margin. The mechanism will select the proper level based on the output of the comparator. The comparator will then use the selected reference voltage, having either a slightly higher or lower level than a nominal reference value, as the reference voltage in its operations. The difference between each level and the nominal level is the added hysteresis noise margin. The inventive mechanism uses the higher voltage level when the output of the comparator is below the nominal reference voltage, and uses the lower voltage level when the output of the comparator is above the nominal reference voltage. Thus, a noise spike in the input signal would have to be larger than the margin provided by the mechanism, before causing the comparator to react to the noise in the signal.
    Type: Grant
    Filed: June 25, 1998
    Date of Patent: October 9, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Brian Cardanha, Dan Stotz, Kent R. Townley
  • Patent number: 6300819
    Abstract: One embodiment of the invention includes a semiconductor circuit including a ground voltage node to provide a ground voltage and pFET transistors having an n-type body electrically coupled to the ground voltage node to forward body bias the pFET transistors. Another embodiment of the invention includes a semiconductor circuit including a supply voltage node to provide a supply voltage and nFET transistors having a p-type body electrically coupled to the supply voltage node to forward body bias the nFET transistors. Still another embodiment of the invention includes a semiconductor circuit including a ground voltage node to provide a ground voltage and pFET transistors having an n-type body electrically coupled to the ground voltage node to forward body bias the pFET transistors. The circuit also includes a supply voltage node to provide a supply voltage and nFET transistors having a p-type body electrically coupled to the supply voltage node to forward body bias the nFET transistors.
    Type: Grant
    Filed: May 13, 1998
    Date of Patent: October 9, 2001
    Assignee: Intel Corporation
    Inventors: Vivek K. De, Ali Keshavarzi, Siva G. Narendra, Shekhar Y. Borkar
  • Patent number: 6300817
    Abstract: A circuit to reduce the temperature-dependence of a predistorter diode in a predistorter for an external optical modulator characterized in that a predistorter diode (D1, D2) is connected in series with an ohmic resistance (Rv) and the series circuit is fed from a power supply in operation, whereby the voltage V1 of the power supply and the ohmic resistance are selected such that when the temperature of the predistorter changes the curvature of the temperature-dependent current-voltage curve for the predistorter diode hardly varies at the respective operating point. One advantage of the invention is the very simply type of compensation that it allows.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: October 9, 2001
    Assignee: Alcatel
    Inventors: Klaus Braun, Werner Berger
  • Patent number: 6297690
    Abstract: A booster circuit uses a source voltage to generate a boosted voltage that is higher than the source voltage. The booster circuit has two capacitors. The two capacitors are alternately charged and discharged in response to a signal voltage applied to an input terminal. The first capacitor is discharged to boost the voltage at a boosting node, whereas the second capacitor is discharged to boost the voltage at an output terminal. Further, the booster circuit includes a control circuit. When the voltage at the input terminal changes from an “H” level to an “L” level, the control circuit supplies a voltage for discharging the first capacitor to the first capacitor after the second capacitor has been brought into a charging state. Since the voltage at the output terminal is reduced by the charging of the second capacitor, a transistor is deactivated in response to the voltage at the output terminal.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: October 2, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yuichi Matsushita
  • Patent number: 6297689
    Abstract: Apparatus for storing voltage on an Erasable Programmable Read-Only Memory (EPROM) buffered through an input voltage follower circuit provides an architecturally simple and efficient low temperature coefficient, low power, programmable complementary metal oxide semiconductor voltage reference.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: October 2, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Richard Billings Merrill
  • Patent number: 6294948
    Abstract: A charge pump system for providing a voltage to a semiconductor device is disclosed. Current charge pumps use a separate pre-charge capacitor and pre-charge circuitry for the boot circuit which provides the gate voltage for the output transistor. The present invention eliminates the need for the separate pre-charge capacitor and pre-charge circuitry by the use of a single diode. The net effect is a more efficient and smaller charge pump circuit.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: September 25, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Greg A. Blodgett
  • Patent number: 6292048
    Abstract: A gate enhancement charge pump for a low voltage power supply. The charge pump stage circuit comprises a first transistor comprising a first terminal, a second terminal, and a third terminal. The stage further comprises a first capacitor comprising a first terminal coupled to a first clock source and a second terminal coupled to said third terminal of said first transistor. The circuit also comprises a second capacitor comprising a first terminal coupled to a second clock source and a second terminal coupled to said second terminal of said first transistor. The circuit further comprises a first diode comprising an input terminal coupled to said first terminal of said first transistor and an output terminal coupled to said second terminal of said first transistor.
    Type: Grant
    Filed: November 11, 1999
    Date of Patent: September 18, 2001
    Assignee: Intel Corporation
    Inventor: Bo Li