Patents Examined by Justin P. Bettendorf
  • Patent number: 6472948
    Abstract: A step attenuator for use in attenuating an electromagnetic signal. The step attenuator includes a first path having a plurality of attenuator structures provided therein, each attenuator structure being selectively actuated to permit the signal to pass therethrough. A second path is disposed in parallel with the first path, the second path permitting the signal to selectively bypass the first path. A third path is disposed in series with the first and second paths and includes at least one attenuator structure that is selectively actuated to permit the signal to pass therethrough.
    Type: Grant
    Filed: July 10, 2000
    Date of Patent: October 29, 2002
    Assignee: Rockwell Collins, Inc.
    Inventors: Constantinos S. Kyriakos, James B. Ledebur, Leo G. Maloratsky, Carl E. Steen
  • Patent number: 6472952
    Abstract: A high frequency wireless circuit apparatus is formed by connecting a phase shifter between an antenna duplexer and a low noise amplifier, so that the impedance of the receiving terminal of the antenna duplexer at a transmission frequency and the input impedance of the low noise amplifier may not be matched in complex conjugates of each other. Therefore it prevents the transmission output passing through the receiving terminal of the antenna duplexer and the interference signal entered through the antenna from making the cross modulation in the low noise amplifier. Thus it improves the reception sensitivity and immunity to interference signals of the high frequency wireless circuit apparatus at the same time.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: October 29, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukio Sakai, Kazuhiro Yahata, Michiaki Tsuneoka
  • Patent number: 6472956
    Abstract: An input trap circuit removes a predetermined frequency component included in an input signal and then outputs the input signal to a circuit at a later stage. The input trap circuit is provided with: a parallel oscillation circuit in which a pair of variable capacitance diodes are connected in series such that cathodes thereof are connected to each other at a junction portion and in which an inductance is connected in parallel to the variable capacitance diodes between anodes of the variable capacitance diodes at both ends thereof; a voltage applying device for applying a voltage to the junction portion so as to vary capacitance values of the variable capacitance diodes on the basis of reverse voltage characteristics of the variable capacitance diodes respectively; and a variable capacitor element connected between the junction portion and a ground.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: October 29, 2002
    Assignee: Pioneer Corporation
    Inventor: Tadashi Kosuga
  • Patent number: 6472960
    Abstract: In a complex circuit board, the positional relationships between element portions, including an electrode pattern, a dielectric substrate and a magnetic substrate, can be adjusted as desired, and the complex circuit board can be miniaturized. The complex circuit board includes a dielectric substrate and a magnetic substrate, a space being provided between the magnetic substrate and the dielectric substrate, and an electrode pattern provided between the dielectric substrate and the magnetic substrate, a capacitance element portion of the electrode pattern being provided adjacent or in contact with or spaced a predetermined distance from the dielectric substrate, and the inductance element portion of the electrode pattern being provided adjacent or in contact with or spaced a predetermined distance from the magnetic substrate.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: October 29, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Hiromu Tokudera, Kei Matsutani
  • Patent number: 6469595
    Abstract: A singular or multiple paired, filter capacitor assembly that is comprised of either multilayer or monolithic capacitors and includes selective and arranged attachment to at least a conductive substrate, with operable conductors. This assembly can also include coupled to sets of interleaved-type or monolithic-type ground and active electrodes all arranged in a pre-selected manner for electrical connection into various types of electrical devices.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: October 22, 2002
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony
  • Patent number: 6469588
    Abstract: A non-reciprocal component includes a casing having an input/output terminal and a ground terminal formed therein, a ferrite plate, a line conductor, and magnetic stored in the casing, and an upper yoke and a lower yoke provided at the top face and the bottom face of the casing, respectively. In the non-reciprocal component, the casing is insert-molded with the lower yoke.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: October 22, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Toshihiro Makino, Hiroki Dejima, Takashi Kawanami, Takashi Hasegawa, Masakatsu Mori, Takahiro Jodo
  • Patent number: 6469596
    Abstract: A composite capacitor/inductor assembly has been developed that merges the capacitance utilized for energy storage into the inductor, creating a consolidated electrical component. The composite capacitor/inductor is capable of functioning in those applications requiring resonant circuits for frequencies in excess of 100 MHz. The composite nature of the device reduces by one-half the number of components required to produce a resonant circuit.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: October 22, 2002
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Jonathan P. Hull, David W. Scholfield
  • Patent number: 6469589
    Abstract: A noise filter is provided with a cylindrical ferrite core having a wire insertion through-hole, the ferrite core being received within a case. A wire passing once through the wire insertion through-hole is looped to surround an exterior of the case and passes back through the wire insertion through-hole. A wire fixing portion is provided on the outer surface of the case so as to hold and fix a portion of the wire to the exterior of the case. The wire fixing portion includes a pressing surface and a pressing portion that faces the pressing surface, and the pressing portion is opened from and closed toward the pressing surface. Thus, the noise filter is prevented from displacement or sliding on the wire. Further, a method of mounting the noise filter on the wire is provided.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: October 22, 2002
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Yasuto Takeda
  • Patent number: 6466113
    Abstract: A printed circuit architecture includes a relatively thick, stiffening base of thermally and electrically conductive material, and a laminate of conductive layers including a printed circuit structure, interleaved with dielectric layers, disposed atop the base. The patterned conductive layers contain an integrated circuit structure that is configured to provide RF signaling, microstrip shielding, and digital and analog control signal leads, and DC power. Low inductance electrical connectivity among the conductive layers and also between conductive layers and the base is provided by a plurality of conductive bores. Selected bores are counter-drilled at the RF signaling layer and filled with insulating plugs, which prevent shorting of the RF signal trace layer to ground, during solder reflow connection of leads of circuit components to the RF signaling layer.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: October 15, 2002
    Assignee: Spectrian Corporation
    Inventors: E. James Crescenzi, Jr., Anwar A. Mohammed
  • Patent number: 6466102
    Abstract: A micro-mechanical microwave switch has a signal line formed on a substrate and defining a gap forming an open circuit in the off-state of the switch. A dielectric support, which may be a cantilevered arm, carries a contact to bridge the gap and close the switch in the on-state. At least one shield electrode in the vicinity of the contact creates reduces the coupling across the gap by creating a shunt capacitance or redistributing the electromagnetic field.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: October 15, 2002
    Assignee: National Research Council of Canada
    Inventors: Peter Grant, Mike W. Denhoff, Sean Patrick McAlister
  • Patent number: 6462628
    Abstract: An isolator device with a built-in power amplifier includes a single dielectric multi-layered substrate, a high frequency power amplifier circuit, an isolator element, and circuit elements provided to the dielectric multi-layered substrate. The high frequency power amplifier circuit and the isolator element are connected with each other through the circuit elements and united with the single dielectric multi-layered substrate.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: October 8, 2002
    Assignee: TDK Corporation
    Inventors: Ryoichi Kondo, Takahide Kurahashi, Shinya Nakai, Hajime Kato
  • Patent number: 6462629
    Abstract: A method of forming metallization patterns on a block of dielectric material wherein the entire surface area of the dielectric block is encased with a conductive material and unwanted conductive metal is ablatively etched from a designated surface area of the dielectric block to form desired metallized circuit patterns. The invention also comprises a filter and a duplexer formed by the method of the present invention.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: October 8, 2002
    Assignee: CTS Corporation
    Inventors: Raymond G. Blair, Edward J. Rombach, Randel N. Simons, Wayne D. Pasco
  • Patent number: 6459343
    Abstract: In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic discharge (ESD) protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC. The conductor inductance isolates the capacitance of the circuit devices from one another, thereby improving characteristics of the frequency response of the interconnect system. Also the ESD protection function is distributed among multiple ESD devices interconnected by series inductors to provide a multi-pole filter at each IC terminal.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: October 1, 2002
    Assignee: Formfactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 6448865
    Abstract: In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC. The conductor inductance isolates the capacitance of the circuit devices from one another, thereby improving characteristics of the frequency response of the interconnect system. The inductances of the conductors and various capacitances of the interconnect system are also appropriately adjusted to optimize desired interconnect system frequency response characteristics.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: September 10, 2002
    Assignee: Formfactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 6448864
    Abstract: Inner conductor formation holes having inner conductors formed on the inner walls thereof are formed in a dielectric block. Both of the ends of one of the inner conductors are open and led out as terminal electrodes which function as balanced ports. Both of the ends of another inner conductor are connected to an outer conductor to be grounded, and the center portion of the inner conductor between the ends is led out as a terminal electrode which functions as an unbalanced port. The circuit can also be realized with striplines or microstriplines on a dielectric substrate. Thus, a balanced-unbalanced converter having these terminal electrodes as balanced and unbalanced ports is formed.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: September 10, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Motoharu Hiroshima, Shohachi Nishijima, Hideyuki Kato
  • Patent number: 6448863
    Abstract: The differential transmission cable comprises a cable having at least one pair of differential transmission lines, one or more transmission transformers, and connectors at both ends, the transmission transformer having an integrally sintered laminate structure and a coupling coefficient of 0.65 to 0.98 at 100 MHz, the distance between a center of the transmission transformer and a tip end of the closest connector being within 0.1 m, and the distance between a center of the transmission transformer and a tip end of the farthest connector or between a center of the transmission transformer and a center of the other transmission transformer being 0.5 to 4 m. The transmission transformer is mounted onto a substrate, which is inserted into the connector or a housing of the connector having lands or a positioning holder. After wiring, the connector including the substrate is integrally resin-molded.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: September 10, 2002
    Assignee: Hitachi Metals, Ltd.
    Inventors: Tomomi Ogawa, Toshikazu Nishiyama, Hirokazu Araki, Katsuhiro Okada, Yasuo Tani, Osamu Ikemoto
  • Patent number: 6448873
    Abstract: A suspended printed inductor (SPI) connected in parallel to a suspended interdigital capacitor (SIC) so as to form a parallel resonant circuit that is nearly independent of variations in PCB etching tolerances. This combination of SPI and SIC functions to resonate at a center frequency and with similar parallel resonant circuits can be used to form RF filters having any desired order. Using the parallel resonant combination of SPI and SIC, a RF filter can be constructed whose electrical properties are nearly insensitive to variations in PCB parameters and etch processing. The sensitivity of the spiral suspended printed inductor in combination with the suspended printed interdigital capacitor to PCB parameters such as dielectric constant and PCB height is greatly reduced. Further, the parallel combination of suspended printed spiral inductor and suspended interdigital capacitor is nearly insensitive to PCB etching tolerances. SPIs and SICs are characterized by the absence of a ground plane.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: September 10, 2002
    Assignee: Texas Instruments Incorporated
    Inventor: Alexander Mostov
  • Patent number: 6448872
    Abstract: A method of producing filters using lower unloaded Q factor components than filters with the same performance characteristics but requiring higher unloaded Q factor components is disclosed. The method includes the steps of defining a desired filter characteristic and applying an algorithm which provides a filter having infinite Q factor elements and having a theoretical characteristic corresponding to the desired characteristic transformed to a compensate for the difference between finite Q factor and infinite Q factor elements.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: September 10, 2002
    Assignee: Filtronic PLC
    Inventors: John Rhodes, Ian Hunter
  • Patent number: 6448869
    Abstract: An apparatus and method for switching waveguides between a junction waveguide and a bypass waveguide among a plurality of housing ports. The apparatus comprises a housing having a first, second and third housing port and a waveguide rotor, having a first and second rotary position. The waveguide rotor includes a junction waveguide, having a first, second and third junction port, for combining the first, second and third housing ports in the first rotary position and a bypass waveguide, having a first and second bypass port, for connecting the first and second housing ports in the second rotary position. The junction and bypass waveguides are alternately selectable by rotating the waveguide rotor to the first and second rotary positions.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: September 10, 2002
    Assignee: The Boeing Company
    Inventors: Rolf Kich, Richard L. Bennett, James M. Barker
  • Patent number: 6441702
    Abstract: A method and system for tuning a bulk acoustic wave device at the wafer level by adjusting the thickness of the device. In particular, the thickness of the device has a non-uniformity profile across the device surface. A mask having a thickness non-uniformity profile based partly on the thickness non-uniformity profile of the device surface is provided on the device surface for etching. A dry etching method is used to remove part of the mask to expose the underlying device surface and further removed the exposed device surface until the thickness non-uniformity of the device surface falls within tolerance of the device.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: August 27, 2002
    Assignee: Nokia Mobile Phones Ltd.
    Inventors: Juha Ellä, Pasi Tikka, Jyrki Kaitila