Abstract: Techniques are disclosed for sub-second annealing a lithographic feature to, for example, tailor or otherwise selectively alter its profile in one, two, or three dimensions. Alternatively, or in addition to, the techniques can be used, for example, to smooth or otherwise reduce photoresist line width/edge roughness and/or to reduce defect density. In some cases, the sub-second annealing process has a time-temperature profile that can effectively change the magnitude of resist shrinkage in one or more dimensions or otherwise modify the resist in a desired way (e.g., smooth the resist). The techniques may be implemented, for example, with any type of photoresist (e.g., organic, inorganic, hybrid, molecular photoresist materials) and can be used in forming, for instance, processor microarchitectures, memory circuitry, logic arrays, and numerous other digital/analog/hybrid integrated semiconductor devices.

Abstract: A method includes coating a photo resist on a wafer in a first production tool, and performing a pre-exposure baking on the photo resist in a second production tool separate from the first production tool. After the pre-exposure baking, the photo resist is exposed using a lithography mask. After the step of exposing the photo resist, a post-exposure baking is performed on the photo resist. The photo resist is then developed.

Abstract: A pattern is formed by coating a resist composition comprising a resin comprising recurring units having an acid labile group, a photoacid generator, and a first organic solvent onto a processable substrate, prebaking, exposing, PEB, and developing in an organic solvent developer to form a negative pattern; heating the negative pattern to render it resistant to a second organic solvent; coating a solution containing Si, Ti, Zr, Hf, and/or Al and the second organic solvent thereon, prebaking, and dry etching to effect image reversal for converting the negative pattern into a positive pattern.

Abstract: A method for manufacturing a semiconductor device includes a photolithography process having steps of a developing solution immersing process. The steps of the developing solution immersing process includes step (a) of dropping a developing solution on a silicon carbide semiconductor substrate and forming a developing solution film so as to have a film thickness of more than 6 ?m and step (b) of reducing the film thickness of the developing solution film to 6 ?m or less.

Abstract: A method and an apparatus print a pattern of periodic features into a photosensitive layer. The methods includes the steps of: providing a substrate bearing the layer, providing a mask, arranging the substrate such that the mask has a tilt angle with respect to the substrate in a first plane orthogonal thereto, and providing collimated light for illuminating the mask pattern so as to generate a transmitted light-field composed of a range of transversal intensity distributions between Talbot planes separated by a Talbot distance so that the transmitted light-field has an intensity envelope in the first plane. The mask is illuminated with the light while displacing the substrate relative to the mask in a direction parallel to the first plane and to the substrate. The tilt angle and the intensity envelope are arranged so that the layer is exposed to an average of the range of transversal intensity distributions.

Abstract: Techniques or processes for providing markings on products are disclosed. The markings provided on products can be textual and/or graphic. The techniques or processes can provide high resolution markings on surfaces that are flat or curved. In one embodiment, the products have housings and the markings are to be provided on the housings. For example, the housing for a particular product can include an outer housing surface and the markings can be provided on the outer housing surface.

Abstract: Systems and methods are provided for forming features through photolithography. A polymer layer is formed over a substrate. The polymer layer is patterned to form a first feature and a second feature, the first feature and the second feature being separated at a first distance. A rinse material is applied to the polymer layer including the first feature and the second feature. The rinse material is removed from the polymer layer including the first feature and the second feature to cause the first feature and the second feature to come into contact with each other. A third feature is formed based on the first feature and the second feature being in contact with each other.

Abstract: Methods and materials for making a semiconductor device are described. The method includes forming a middle layer (ML) of a patterning stack (e.g., a tri-layer patterning stack such as a tri-layer resist) and forming a photoresist layer directly on the middle layer. The middle layer includes an additive component having a photo base generator (PBG). The substrate including the photoresist layer and the middle layer is then exposed to a radiation. A covalent bond between the ML and the photoresist layer may be formed.

Abstract: Multiple patterned exposures of a single layer of image reversal resist prior to and following image reversal processing, upon development, respond to the respective exposures as either a positive or a negative resist, allowing a desired shape of a resist structure to be built up from any of a number of combinations of primitive masks. Exploiting the image reversal resist in this manner allows several types of diffraction distortion to be entirely avoided and for many sophisticated lithographic processes to he reduced in complexity by one-half or more while any desired resist structure shape can be formed form a limited number of primitive mask patterns. A regimen, which may be automated as an executable algorithm for a computer may be followed to evaluate different combinations of masks which are valid to produce a desired resist structure shape and select the optimum mask pattern combination to do so.

Abstract: A system and method for photoresists is provided. In an embodiment a photoresist is developed. Once developed, the photoresist is slimmed using either a direct slimming technique or an indirect slimming technique. In a direct slimming technique the slimming agent is either an alkaline solution or a polar solvent. In the indirect slimming technique a hydrophobic material is diffused into the photoresist to form a modified region and the modified region is then removed.

Abstract: DUV lithography process that eliminates post exposure baking of a photoresist. Thick photoresist may be processed to obtain enhanced sidewall profiles for microelectronic devices.

Abstract: A method for forming a pattern on a substrate is described. The method includes providing a substrate, forming a photosensitive layer over the substrate, exposing the photosensitive layer to a first exposure energy through a first mask, exposing the photosensitive layer to a second exposure energy through a second mask, baking the photosensitive layer, and developing the exposed photosensitive layer. The photosensitive layer includes a polymer that turns soluble to a developer solution, at least one photo-acid generator (PAG), and at least one photo-base generator (PBG). A portion of the layer exposed to the second exposure energy overlaps with a portion exposed to the first exposure energy.

Abstract: A method for manufacturing a planarized reflective layer disposed on a hinge layer connected to a hinge support post (210) is disclosed. The method comprises depositing a first layer of a first material to form the hinge layer (206), patterning a first mask over the first layer and selectively removing the first material not covered by any of the first mask to form a plurality of recesses, depositing a second layer of a second material over the first layer, patterning a second mask over the second layer and selectively removing the second material not covered by any of the second mask to form a hinge component (212), depositing a reflective layer (202) of a reflective material over the second layer and planarizing the reflective layer (202) to form a substantially planar reflective surface.

Abstract: The disclosure relates to a three-dimensional integrated structure comprising a substrate and a plurality of projecting elements projecting from a flat surface thereof and obtained from a patterned and developed dry film photoresist. Advantageously, the three-dimensional integrated structure is highly defined, the projecting elements obtained by the patterned and developed dry film photoresist having a shape factor greater than 6. The three-dimensional integrated structure can be used to directly realize different type of electronic devices, such as microfluidic devices, microreactors or sensor devices.

Abstract: Contrast enhancing exposure apparatus and method for use in semiconductor fabrication are described. In one embodiment, a method for forming a pattern on a substrate, wherein the substrate includes a photoresist layer comprising photoacid generators (“PAGs”) and photobase generators (“PBGs”), is described.

Abstract: A method of forming a tight-pitched pattern. A target pattern including a plurality of first stripe patterns is provided. Each of the first stripe patterns has a first width and a first length. A photomask includes a plurality of second stripe patterns corresponding to the first stripe patterns is provided. Each of the second stripe patterns has a second width and a second length. A first exposure process with the photomask is provided in an exposure system. The first exposure process uses a first light source with a higher resolution that is capable of resolving the second width of each of the second stripe patterns. Finally, a second exposure process with the photo-mask is provided in the exposure system. The second exposure process uses a second light source with a lower resolution that is not adequate to resolve the second width of each of the second stripe patterns.

Abstract: A method for patterning a substrate is described. The method includes forming a layer of radiation-sensitive material on a substrate, and preparing a pattern in the layer of radiation-sensitive material using a lithographic process, wherein the pattern is characterized by a critical dimension (CD) and a roughness. Following the preparation of the pattern in the layer of radiation-sensitive material, the method further includes performing a CD slimming process to reduce the CD to a reduced CD, and performing a vapor smoothing process to reduce the roughness to a reduced roughness.

Abstract: An extreme ultraviolet lithography method is disclosed. In an example, the EUVL method comprises providing at least two mask areas having a same pattern, forming a resist layer over a substrate, determining an optimized exposure dose based on an exposure dose for a pre-specified pattern on one of the at least two mask areas to achieve a pre-specified target dimension under a corresponding single exposure process, and performing a multiple exposure process for exposing a same area of the resist layer to the same pattern. The multiple exposure process comprises a plurality of exposure processes, wherein each of the plurality of exposure processes uses an exposure dose that is less than the optimized exposure dose and a sum of the exposure dose of each of the plurality of exposure processes is approximately equal to the optimized exposure dose.

Abstract: A method for using self aligned multiple patterning with multiple resist layers includes forming a first patterned resist layer onto a substrate, forming a spacer layer on top of the first patterned resist layer such that spacer forms on side walls of features of the first resist layer, and forming a second patterned resist layer over the spacer layer and depositing a masking layer. The method further includes performing a planarizing process to expose the first patterned resist layer, removing the first resist layer, removing the second resist layer, and exposing the substrate.

Abstract: A method of patterning a conductive polymer includes providing a conductive polymer layer coated over a first support followed by pattern-wise transferring a layer containing polyvinyl acetal from a second support onto the conductive polymer to form a mask with at least one opening. The masked conductive polymer is subjected to treatment through the opening that changes the conductivity of the conductive polymer by at least one order of magnitude in areas not covered by the mask.