Patents Examined by Kenneth A. Wieder
  • Patent number: 5640103
    Abstract: A method for detecting a departure from normal operation of an electric motor comprises obtaining a set of normal current measurements for a motor being monitored; forming clusters of the normal current measurements; training a neural network auto-associator using the set of normal current measurements; making current measurements for the motor in operation; comparing the input and output of the auto-associator; and indicating abnormal operation whenever the current measurements deviate more than a predetermined amount from the normal current measurements. The method models a set of normal current measurements for the motor being monitored, and indicates a potential failure whenever measurements from the motor deviate significantly from a model. The model takes the form of an neural network auto-associator which is "trained"--using clusters of current measurements collected while the motor is known to be in a normal operating condition--to reproduce the inputs on the output.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: June 17, 1997
    Assignee: Siemens Corporate Research, Inc.
    Inventors: Thomas Petsche, Charles Garrett
  • Patent number: 5640096
    Abstract: Portable apparatus for inducing an alternating electrical gradient into an impounded liquid media and including, directionally sensitive, sensing apparatus for monitoring gradients established in the liquid to detect leaks at a liquid impermeable membrane. A conductive electrode floated on the liquid directs an amplified square wave signal into the liquid at a 5 to 15 hertz frequency relative to a ground reference established outside the membrane. First and second recessed sensors in a portable, hollow tubular probe are manipulated within the liquid. A portable signal processor monitors a changing signal between the sensors as the probe is moved in the liquid. The sensed and source signals are snychronously sampled, integrated, subtracted in a positive correlation arrangement, and amplified to reject common mode signals within the liquid.
    Type: Grant
    Filed: November 8, 1995
    Date of Patent: June 17, 1997
    Assignee: Anderson Manufacturing Co.
    Inventor: Christian Alm
  • Patent number: 5640101
    Abstract: A probe system tests the electrical characteristics of chips arranged in a matrix on a semiconductor wafer. An XYZ stage movable in the directions of three-dimensional axes is disposed under a probe card having probes to be brought into contact with the electrode pads of the chips. A wafer table rotatable within a horizontal plane is disposed on the XYZ stage. A first image pickup means for picking up the probe images is mounted on the XYZ stage. A second image pickup means for picking up a wafer image is disposed above the table. The second image pickup means is movable horizontally to and from a use position under the probe card. A target is supported and moved by a driving member mounted on the XYZ stage, for aligning the focal points and optical axes of the first and second image pickup means. The target is moved between forward and retreat positions within and outside the field of view of the first image pickup means.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: June 17, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Motohiro Kuji, Haruhiko Yoshioka, Shinji Akaike, Shigeaki Takahashi
  • Patent number: 5640097
    Abstract: A test pattern for contact resistance, includes a contact hole section, and first to fourth electrode pad patterns connected to the contact hole section.
    Type: Grant
    Filed: October 1, 1996
    Date of Patent: June 17, 1997
    Assignee: NEC Corporation
    Inventor: Hiromitsu Hada
  • Patent number: 5640099
    Abstract: A short circuit point is detected between wiring patterns on an integrated circuit which includes functional circuits and wiring patterns. For this purpose, an apparatus includes a power supply unit for applying a predetermined voltage between power supply wiring patterns of the integrated circuit such that the functional circuits are in a non-operating state. A current consumed between the power supply wiring patterns is continuously monitored. In this state, a laser beam is irradiated to a predetermined point on the integrated circuit and a current change amount is detected in response to the irradiation of the laser beam. The detection operation is performed for all the predetermined points. A short circuit point is determined between the wiring patterns from data indicating the current change amounts at the predetermined points.
    Type: Grant
    Filed: July 28, 1995
    Date of Patent: June 17, 1997
    Assignee: NEC Corporation
    Inventor: Masaru Sanada
  • Patent number: 5640102
    Abstract: The present invention provides a cost effective and compact pin test circuit for non-connection pins of the semiconductor device under test. The pin test circuit includes a plurality of exclusive DC channels each of which has a flirt relay controlled by a control signal for switching ON/OFF a power source which generates a predetermined voltage, and a second relay controlled by a control signal switching ON/OFF a fixed electric potential such as a ground level electric potential. The exclusive DC channel is used for the NC pin testing and connected to each of the NC pins which are divided into two groups. The exclusive DC channels are used to determine whether or not the NC pins form an electrical short circuit each other by connecting one NC pin to a ground level and while connecting the other NC pin to the power source having the DC measurement function.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: June 17, 1997
    Assignee: Advantest Corporation
    Inventor: Kazuhiko Sato
  • Patent number: 5640085
    Abstract: A temperature compensation circuit for a power measurement device includes an input sensor, with a temperature-dependent transmission factor (K.sub.H,T), connected to a signal processor with a temperature-dependent transmission factor (K.sub.S,T). Transmission factor (K.sub.S,T) of the signal processor is inversely proportional to a temperature-dependent reference voltage (U.sub.R,N,T), which is inputted to the signal processor in order to render the combined transmission factor (K.sub.H,T .multidot.K.sub.S,T) temperature independent. To accomplish this, a temperature coefficient value of reference voltage (U.sub.R,N,T) must be equal to the sum of a temperature coefficient value of transmission factor (K.sub.H,T) and a temperature coefficient value of transmission factor (K.sub.S,T). The desired temperature coefficient value of reference voltage (U.sub.
    Type: Grant
    Filed: February 15, 1996
    Date of Patent: June 17, 1997
    Assignee: Landis & Gyr Technology Innovation AG
    Inventors: Jan Petr, Erich Jeker
  • Patent number: 5637994
    Abstract: The characteristics of an a.c. waveform are determined by measuring the time interval between the instant when the waveform crosses a first reference threshold and the instant when it crosses another threshold. The second threshold is varied to obtain a series of time interval measurements from which a point by point reconstruction of the waveform can be made. The technique has the advantage that it can be used to characterize waveforms whose arrival time is indeterminable.
    Type: Grant
    Filed: February 3, 1993
    Date of Patent: June 10, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Norman G. Carder
  • Patent number: 5638005
    Abstract: A tester exercises a DUT with a repetitive signal pattern, supplying a trigger signal for each repetition. The waveform on a conductor of the DUT is to be acquired by repeatedly measuring voltage at each of a number of sample points following the trigger, using a charged-particle probe system having an integrator-filter loop for analyzing energy of secondary particles. Before measurement at a sample point, integrator is reset and the filter voltage needed to settle the loop for the sample point is set using a predictive scheme. When the measurement is made, the predicted filter voltage is summed with the integrator output voltage to produce the actual filter voltage. The integrator then measures the error between the predicted filter voltage and the actual filter voltage needed to settle the loop. The time needed to settle the loop is thereby minimized. Various predictive schemes can be used.
    Type: Grant
    Filed: June 8, 1995
    Date of Patent: June 10, 1997
    Assignee: Schlumberger Technologies Inc.
    Inventors: Suresh N. Rajan, Kenichi Kanai
  • Patent number: 5638003
    Abstract: An apparatus for testing a dielectric sample for susceptibility to surface electrical failure due to tracking. The apparatus includes an enclosure continuously purged of air-borne contaminants, which eliminates external drafts, and a base disposed within the enclosure for supporting the dielectric sample. A pair of electrodes are operably interconnected with a variable voltage power supply and adapted to engage the dielectric sample on a first side with a mutual separation. A source of water and water borne contaminants intermittently discharges the water and water-borne contaminants in droplet form onto the dielectric test sample between the electrodes.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: June 10, 1997
    Assignee: Underwriters Laboratories, Inc.
    Inventor: Jeffrey B. Hall
  • Patent number: 5638002
    Abstract: The circuit has a common measurement transducer together with individual measurement interfaces for each of the cells. Each interface has its own generator for defining a measurement signal relating to a characteristic of the associated cell, and each of the interfaces has its own measurement signal output that is connected to the measurement transducer of the circuit via a common single-wire link. Each interface also includes two ports, operable in alternation so that one constitutes an input for control pulses transmitted to the interface while the other acts as an output for relaying such pulses after they have been received. Each interface also includes means for forcing a signal to be emitted via its measurement signal output to the measurement transducer of the circuit in the event of a threshold being crossed by a measurement element that monitors a characteristic of the cell with which the interface is associated.
    Type: Grant
    Filed: April 20, 1995
    Date of Patent: June 10, 1997
    Assignee: Saft
    Inventor: Michel Perelle
  • Patent number: 5635850
    Abstract: Process information obtained by a process section is input to a host computer. The process information includes information about a film, information about etching, information about cleaning, information about heat treatment, and information about a test. Yield information obtained by a D/S section is also input to the host computer. The host computer classifies wafers or lots into a plurality of quality ranks on the basis of these pieces of information, and supplies process conditions determined on the basis of the quality ranks to a burn-in section and a test section. The burn-in section and the test section respectively execute screening tests on the basis of the process conditions.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: June 3, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mitsugi Ogura
  • Patent number: 5635832
    Abstract: An IC carrier for loading thereon and transporting a device under test is used in an IC handler. The IC carrier is capable of easily and reliably loading thereon and positioning in place a device under test even the device under test having a reduced pitch between lead pins thereof. A box-like housing open in the top is formed and the bottom wall thereof has two generally parallel contact holes in the form of elongated slots, these two contact holes being spaced from each other by a spacing corresponding to that between two arrays of lead pins of the device under test. Each of the contact holes has a length corresponding to that of the associated lead pin array and a width sufficient to receive the associated lead pin array. Carrier guides are formed one adjacent each of opposite longitudinal ends of each of the contact holes and extend upwardly to a predetermined height from the bottom floor of the housing.
    Type: Grant
    Filed: February 8, 1996
    Date of Patent: June 3, 1997
    Assignee: Advantest Corporation
    Inventors: Akihiko Ito, Yoshihito Kobayashi
  • Patent number: 5635842
    Abstract: In estimating the residual capacity of a battery according to the maximum output estimating process, a reference point is established in advance at the intersection of a plurality of current/voltage characteristic linear curves corresponding to various residual capacities of the battery or in an area in the vicinity of the intersections of the curves. A current/voltage characteristic linear curve is determined so as to pass through the reference point and a measured operating point of the battery which corresponds to the present discharging current and output voltage values measured when the battery is discharged. Then, a maximum transfer power value of the battery is determined from the current/voltage characteristic linear curve thus determined, and the present residual capacity of the battery is estimated from the maximum transfer power value.
    Type: Grant
    Filed: February 5, 1996
    Date of Patent: June 3, 1997
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Masahide Yokoo, Masao Nagano, Hideharu Takemoto
  • Patent number: 5635843
    Abstract: An auto harness integrity tester the components of which are respectively a housing unit protectively holding three male prongs extending from holes in one end thereof adjacent a female socket pocket in this end of the housing unit with wiring running from the prongs, one at a time to one each of three resistors and wiring running from each resistor to one each of three light emitting diodes from each of which a wire leads to a common wire leading to the female socket pocket such that when the instant device is plugged into the end plug of an auto harness, current can run from the harness through the prongs to the diodes and via a prong in the end plug received by the female socket pocket to ground.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: June 3, 1997
    Inventor: Leslie R. Borland
  • Patent number: 5635845
    Abstract: A method for detecting extent of cross-linking of a high impedance polymer material during a pre-cure state, the method including: placing an insulated ground plane adjacent to the polymer material and substantially parallel to a sensor; applying a test signal through a sensor to the material and through a reference resistance; determining a voltage difference between the test signal applied to the material and the reference resistance as the reference voltage; and correlating the voltage difference as a relative indicator of the extent of cross-linking which has occurred within the polymer material. Also disclosed is a device for implementing the subject method.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 3, 1997
    Assignee: Brigham Young University
    Inventors: A. Brent Strong, R. Scott Merrell, Barry M. Lunt, Larry J. Davis
  • Patent number: 5633596
    Abstract: Fixtureless automatic test equipment for testing a printed wiring board having electrically conductive elements. The automatic test equipment of the present invention includes an array of modular integrated switching circuit (MISC) devices and test instrumentation fore determining the functionality of a workpiece. Each MISC includes an array of semiconductor dies mounted on a PWB interconnector for kiss touch deployment on a workpiece. All the PWB interconnectors form a test mattress of probes for deployment against a bare workpiece. Each semiconductor die includes a matrix of switching cells of which each switching cell terminates in a terminal. The PWB interconnector of each MISC connects the switching cell terminals to probes forming part of the test mattress.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: May 27, 1997
    Assignee: Key Solutions Ltd.
    Inventor: Avner Ilani
  • Patent number: 5633594
    Abstract: In a capacitive sensor system, first and second driving signals opposite in phase are applied to a sensor capacitor and a reference capacitor, respectively, which are both connected to a switched capacitor circuit. An output signal of the switched capacitor is sampled by two sample-and-hold circuits which are operated in different phases of the driving signals. A differential amplifier generates a sensor signal in response to the difference in potential between the outputs of the sample-and-hold circuits.
    Type: Grant
    Filed: November 28, 1995
    Date of Patent: May 27, 1997
    Assignee: NEC Corporation
    Inventor: Hiroyuki Okada
  • Patent number: 5633582
    Abstract: A combined signal level meter and leakage detector having a built-in antenna for the leakage detector, and dual clock frequency control of the microcontroller along with bandwidth switching for greater sensitivity in leakage detection mode. A data logging function is also provided. Control circuitry is also provided for avoiding receiver spurs by combined switching of multiple local oscillator frequencies, including combinations of high-side and low-side injection and IF shifting.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: May 27, 1997
    Assignee: Trilithic, Inc.
    Inventors: Dennis L. Orndorff, Dennis W. Staley
  • Patent number: 5631571
    Abstract: A system for functionally testing opto-electronic devices, such as fiber-optic infrared receiver photodiodes, in the integral wafer or other optical port-exposed status. The testing arrangement uses a portable optical probe for communicating optical signals between the testing apparatus and the tested device in coincidence with electrical energization and functional operation of the electro-optical device by the test apparatus. The optical probe signals may be correlated in time relationship or other manner with the electrical signals applied-to the device-under-test. The invention provides simple conversion between a conventional electrical semiconductor device probe station and an electro-optical device probe station.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: May 20, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Stephen Spaziani, Kenneth Vaccaro, William Waters