Abstract: A filter includes a filter frame and at least two resonators. A receiving space is formed in the filter frame. The at least two resonators are disposed in the receiving space and distributed along a signal transmission path. Adjacent resonators on the signal transmission path are coupled. Each resonator includes a body part and a bending part. One end of the body part is grounded. The bending part includes a head bending part and an end bending part, the head bending part being connected to the end bending part to form a resonator structure circulating in a counterclockwise or clockwise direction.

Abstract: Embodiments of the present invention provide methods, computer program products, and systems. Embodiments of the present invention receive a request for a machine learning model and information associated with decisions made by the machine learning model. Embodiments of the present invention can determine one or more machine learning modules that satisfy the received request and create a dedicated traffic channel to send the determined one or more machine learning modules and information associated with the decisions made by the machine learning model. Embodiments of the present invention can transmit the determined one or more machine learning modules and information associated with decisions made by the machine learning model to a computing system using the created, dedicated traffic channel.

Abstract: A radio frequency multiplexer comprises send and receive circuits each including a RF filter circuit. The send and receive circuits are coupled to an antenna port and corresponding send and receive ports. A portion of the send circuit and a portion of the receive circuit are disposed on a single die. The layer stacks of the resonators of the send and receive circuits disposed on the single die can be optimized for the required functionality.

Abstract: Surface acoustic wave (SAW) filter packages employing an enhanced thermally conductive cavity frame for heat dissipation, and related fabrication methods are disclosed. The SAW filter package also includes a cavity frame comprising a perimeter structure and a cavity inside the perimeter structure coupled to a substrate of a piezoelectric material that contains interdigital transducers (IDTs). A cap substrate is disposed on the perimeter structure of the cavity frame to enclose an air cavity inside the perimeter structure between a substrate and the cap substrate. In exemplary aspects, to effectively dissipate heat generated in the SAW filter package to maintain the desired performance of the SAW filter, the cavity frame is comprised of a material that has an enhanced thermal conductivity. The heat generated in the SAW filter package can more effectively be dissipated, particularly at edges and corners of the cavity frame where hot spots can particularly occur.

Abstract: An elastic wave device that excites main vibration of an SH mode includes a piezoelectric layer formed from a piezoelectric material, a carrier substrate, and an IDT electrode formed on the piezoelectric layer. When a wavelength of an elastic wave, which is determined by an electrode cycle P of the IDT electrode, is represented by ?, the piezoelectric layer has a thickness of 0.15? or more and 1.5? or less. The carrier substrate has an acoustic anisotropy, and is arranged in a crystal orientation that reduces unnecessary vibrations of an SV mode and a vertical L-mode.

Abstract: Circuits, devices and methods related to impedance tuners. In some embodiments, a capless impedance tuner can include first node and second nodes, a first series path, a second series path, and an inductance path, each between the first node and the second node and including a switch to allow the path to couple or uncouple the first and second nodes. Each series path can be configured to allow a substantially continuous flow of a direct current between the first node and the second node when coupled. The tuner can further include a shunt path with a switch to allow coupling or uncoupling of the second node and ground. The tuner can further include a switchable grounding path implemented along the inductance path and configured to allow the inductance path to function as a series inductance path between the first and second nodes, or as a shunt inductance path between the ground and a node along the inductance path.

Abstract: Embodiments provided herein generally include apparatus, e.g., plasma processing systems, and methods for the plasma processing of a substrate in a processing chamber. Some embodiments are directed to a waveform generator. The waveform generator generally includes a first voltage stage having: a first voltage source; a first switch; a ground reference; a transformer having a first transformer ratio, the first transformer comprising: a primary winding coupled to the first voltage source and the ground reference; and a secondary winding having a first end and a second end, wherein the first end is coupled to the ground reference, and the second end is configured to be coupled to a load through a common node; and a first diode coupled in parallel with the primary winding of the first transformer. The waveform generator generally also includes one or more additional voltage stages coupled to a load through the common node.

Abstract: A communication network search method and an apparatus are disclosed. The method can include a terminal device sending a first message to a network device, where the first message includes a communication network type of the terminal device and first location information that is used during the sending of the first message. The terminal device receives a second message sent by the network device, where the second message includes N cell identifiers that are used to mark N pre-selected cells, which are determined by the network device based on the first location information and the communication network type. The terminal device determines M target cells in the N pre-selected cells based on second location information and motion status information that are used during the receiving of the second message. The terminal device searches for the M target cells.

Abstract: A method for driving an output node includes driving a control node of an output device coupled to the output node according to an input signal and using a fixed regulated voltage and a variable regulated voltage. The method includes generating the fixed regulated voltage based on a first power supply voltage, a second power supply voltage, and a first reference voltage. The method includes generating the variable regulated voltage based on the first power supply voltage, the second power supply voltage, and a second reference voltage. The method includes generating the second reference voltage based on the first power supply voltage, the second power supply voltage, a reference current, and a predetermined target voltage level of the control node of the output device. In an embodiment of the method, generating the second reference voltage includes periodically calibrating the second reference voltage.

Abstract: Disclosed is a switch circuit for an ultra-high frequency band, which includes a transistor including a first terminal connected to an input stage, a second terminal connected to an output stage, and a gate terminal, an inductor connected to the transistor in parallel, between the input stage and the output stage, a variable gate driver to apply a gate input voltage to the gate terminal and, an input resistor connected between the variable gate driver and the gate terminal. The variable gate driver adjusts the gate input voltage to be in one of a first voltage level for turning on the transistor and a second voltage level for turning off the transistor. The second voltage level varies depending on a capacitance between the first terminal and the second terminal, when the transistor is in a turn-off state.

Abstract: A semiconductor device (1) according to the present disclosure includes: an n-channel depletion-mode transistor (10); an input matching circuit inside which the gate terminal (11) and the ground terminal (22) are DC-connected; a self-bias circuit (26) including a resistor (14) biasing the transistor (10) by a voltage drop due to a current flowing through the resistor (14), and a capacitor (15) connected in parallel to the resistor 14) and regarded as short-circuit at a frequency of the high-frequency power; and a diode (31) having an endmost anode connected to the source terminal (12) and an endmost cathode connected to the ground terminal (22), and connected in one stage or connected in series in a plurality of stages in the same direction.

Abstract: A method for operating a gate driver system includes measuring a first parameter according to a first priority schedule synchronously to a first edge of a switching signal generated by a gate driver integrated circuit and having a variable duty cycle. The method includes after measuring the first parameter of the gate driver system and prior to a second edge of the switching signal, measuring at least a second parameter of the gate driver system according to a first round-robin schedule synchronously to the first edge of the switching signal.

Abstract: A semiconductor device includes: a semiconductor body; an electrical device formed in an active region of the semiconductor body, the active region including an interface between the semiconductor body and an insulating material; and a sensor having a bandwidth tuned to at least part of an energy spectrum of light emitted by carrier recombination at the interface when the electrical device is driven between accumulation and inversion, wherein an intensity of the emitted light is proportional to a density of charge trapping states at the interface, wherein the sensor is configured to output a signal that is proportional to the intensity of the sensed light. Corresponding methods of monitoring and characterizing the semiconductor device and a test apparatus are also described.

Abstract: An integrated isolator circuit for isolating receiver and transmitter in a Time-Division Duplex transceiver is disclosed. The integrated isolator circuit comprises a first node, a second node and a third node. The integrated isolator circuit further comprises a fist capacitor connected in series with a first switch and connected between the first and second nodes. The integrated isolator circuit further comprises a first inductor connected between the first and second nodes and a second capacitor connected between the second node and the third node. The first switch has an on state and an off state, and the integrated isolator circuit is configured to have a different impedance at a certain operating frequency by controlling the state of the first switch.

Abstract: An interface circuit and an electronic apparatus, including: a programmable current array (1), generating a first current and a second current transmitted to a common mode and differential mode generation circuit (2) according to an input code, and a third current and a fourth current transmitted to a driving bias generation circuit (3) according to the input code; the common mode and differential mode generation circuit (2), generating a common mode voltage according to the first current, and generating a high level voltage and a low level voltage according to the second current and the common mode voltage; a driving bias generation circuit (3), simulating a load according to the third and fourth currents, and generating a bias voltage based on the load and the low and high level voltages; an output driving circuit (4), converting an input signal into a differential signal in which the common mode voltage and a differential mode amplitude are configurable.

Abstract: Provided is a dual-band multimode antenna feed for a high-frequency band and a low-frequency band. The feed includes four high-frequency waveguide ports, where each high-frequency waveguide port is connected to a respective high-frequency input/output waveguide. Each high-frequency input/output waveguide includes a high-frequency waveguide aperture facing a first section for mixing electromagnetic modes in the E-plane. The first section is connected to a second section for mixing electromagnetic modes in the H-plane. The feed further includes a low-frequency waveguide port connected to a low-frequency input/output waveguide. A filter is arranged inside the first section to be transparent for plane wave modes exhibited at lower frequencies and reflecting for plane wave modes exhibited at higher frequencies.

Abstract: An acoustic wave resonator is disclosed. The acoustic wave resonator can include a piezoelectric layer, an interdigital transducer electrode positioned over the piezoelectric layer, a temperature compensation layer positioned over the interdigital transducer electrode, and a velocity reduction cover that extends over at least a portion of a central region of the interdigital transducer electrode and over at least a portion of the temperature compensation layer. The velocity reduction cover is arranged to cause a velocity of an acoustic wave generated by the acoustic wave resonator to be reduced.

Abstract: A gate driver system includes a transistor configured to be driven between switching states, the transistor including a control terminal controlled by a control voltage that has a maximum rated limit; and a gate driver coupled to the control terminal by a turn-on current path, the gate driver being configured to control the control voltage in order to drive the transistor between the switching states. The turn-on current path includes a resistor and a Zener diode connected in series, with an anode of the Zener diode connected to the control terminal and a cathode of the Zener diode connected to the resistor. The turn-on current path is configured to provide an on-current to increase the control voltage above a switching threshold. While the transistor is turned on, the Zener diode is configured to limit the control voltage to a voltage level limit that is less than the maximum rated limit.

Abstract: An acoustic wave device includes a support substrate, a piezoelectric layer, and an IDT electrode. The piezoelectric layer is directly or indirectly provided on the support substrate. The IDT electrode includes a plurality of electrode fingers and is provided on a main surface of the piezoelectric layer. The thickness of the piezoelectric layer is about 1? or less when a wavelength of an acoustic wave determined by an electrode finger period of the IDT electrode is defined as ?. The support substrate is an A-plane sapphire substrate.

Abstract: Certain aspects of the present disclosure can be implemented in an electroacoustic device. The electroacoustic device generally includes: a substrate; a bottom electrode layer disposed above the substrate; an acoustic mirror stack having a dielectric layer disposed above the bottom electrode layer and a conductive layer disposed above the dielectric layer; a piezoelectric layer disposed above the acoustic mirror stack; and one or more vias disposed between the bottom electrode layer and the conductive layer, the one or more vias electrically coupling the bottom electrode layer and the conductive layer.