Abstract: Method and apparatus for transferring data. The apparatus preferably includes a first volatile memory block, a second volatile memory block coupled to a non-volatile circular buffer, and a controller configured to direct first data to the first volatile memory block for subsequent transfer to a downstream block, such as a data storage array. The controller is further configured to direct second data to the second volatile memory block for subsequent transfer to the non-volatile circular buffer. Preferably, the second volatile memory block forms a portion of a non-volatile random access memory (NVRAM) and the circular buffer is formed from a flash memory device. An intelligence block preferably controls said subsequent transfer of the second data from the second volatile memory block to the circular buffer. The second data are preferably transferred from the circular buffer to the downstream block in conjunction with the transfer of the first data.

Abstract: This invention is an architecture for backup and recovery of data including continuous backup and information protection backup and recovery system components.

Abstract: A method is disclosed which may include providing a cache in a computing system having an initial group of cache objects, the cache object having an initial compression ratio and including stored data; decreasing an amount of data storage space in the cache occupied by at least one of the cache objects other than a given one of the cache objects; and increasing an amount of data storage space in the cache occupied by the given cache object.

Abstract: Provided are a method, system, and an article of manufacture for detecting errors while accessing a storage device. A host system writes an identical initialization pattern into each block of a plurality of blocks while formatting the storage device. Each block of the plurality of blocks has a checksum field capable of containing a value. Any host system generates an error when data from a retrieved block from the plurality of blocks computes to a checksum that is different from the value contained within the checksum field for the retrieved block, and the retrieved block does not contain the initialization pattern.

Abstract: A method of accessing data from a cache is disclosed. Tag bits of data among sets and ways of cache lines are divided into common subtags and remaining subtags. Similarly, an access address tag is divided into an address common subtag and address remaining tag. When the index of an access address selects a set, a match comparison of the address common subtag and the selected set common subtag is performed. Also, the address remaining tag and selected set remaining subtags are compared for matching before the selected set and associated data is supplied to the requester.

Abstract: A cache coherent data processing system includes at least first and second coherency domains. The first coherency domain contains a memory controller, an associated system memory having a target memory block identified by a target address, and a domain indicator indicating whether the target memory block is cached outside the first coherency domain. During operation, the first coherency domain receives a flush operation broadcast to the first and second coherency domains, where the flush operation specifies the target address of the target memory block. The first coherency domain also receives a combined response for the flush operation representing a system-wide response to the flush operation. In response to receipt in the first coherency domain of the combined response, a determination is made if the combined response indicates that a cached copy of the target memory block may remain within the data processing system.

Abstract: The use of disk-assisted, dynamic databases is to be optimized. To this end, provision is made for new data intended to update an old stock of data to have a second index, relating to the new data, generated for them, and for said second index to be stored on the disk storage medium as a supplement to the first index relating to the old stock of data. This allows the number of write access operations to the disk storage medium to be reduced. This is particularly advantageous for optical media, whose useful life can be increased as a result.

Abstract: Increasing security for a hand-held data processing device with communication functionality where such a device includes an access-ordered memory cache relating to communications carried out by the device. The hand-held data processing device has a locked state that is entered by the device receiving or initiating a trigger. On occurrence of the trigger to enter the locked state the memory cache is reordered so as to disrupt the access-ordering of the cache to obscure device traffic information and thus increase the security of the device in the locked state.

Abstract: A cache memory system capable of adaptively accommodating various memory line sizes comprises cache memory and cache logic. The cache memory has sets of ways. The cache logic is configured to request a memory line in response to a cache miss, and the memory line represents a portion of a way line. The cache logic is configured to select one of the ways based on which portion of the way line is represented by the memory line. The cache logic is further configured to store the memory line in the selected way.

Abstract: A method for caching data in a blade computing complex includes providing a storage blade that includes a disk operative to store pages of data and a cache memory operative to store at least one of the pages. A processor blade is provided that includes a first memory area to store at least one of the pages and a second memory area configured to store an address of each of the pages and a hint value that is assigned to each of the pages. An address of each of the pages is stored in the second memory area, and a hint is assigned to each of the pages, where the hint is one of: likely to be accessed, may be accessed, and unlikely to be accessed. The page is then stored in storage blade cache memory based on the hint.

Abstract: The method consists of providing (1) a user interface for selecting a content item stored on a storage means, retrieving (3) a further content item related to the content item from a system on a network using an identification of the content item, and storing (5) the further content item on the removable medium. The electronic device contains a writer (23), a control unit (25), and a network interface (27). The control unit (25) is able to use an input device and an output device to enable a user to select a content item stored on a storage means (33), to use the network interface (27) for retrieving a further content item related to the content item from a system on a network using an identification of the content item, and to use the writer (23) for storing the further content item on the removable medium. The computer program product enables, upon its execution, a programmable apparatus to function as the electronic device.

Abstract: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction timing method, and the eviction timing method to trigger eviction of an object from the region of cache. The sorting component includes code to implement a sorting method to identify an object that is eligible for eviction in the region of cache. The sorting method involves identifying an object that has been cached in the region of cache for a longer time period than other objects that are cached in the cache region.

Abstract: In accordance with further embodiments of the present invention, there is provided a disk controller for managing the delegation of tasks from a disk controller to a disk, including a task delegation module adapted to delegate fetch or destage tasks to the disk in accordance with a relation between an amount of dirty data currently in a cache and a number of pending destage tasks currently being handled by the disk.

Abstract: An improved approach to cache management is disclosed which may be implemented to provide fine-grained control over individual caches or subsets of a multi-level cache hierarchy. By selectively operating on shared and unshared caches during power management processing, more efficient system operation can be achieved. In one example, a microprocessor is adapted to interface with multiple caches configured in multiple cache levels. The microprocessor includes multiple processors associated with the caches. At least one of the processors is adapted to execute an instruction configured to identify a subset of the caches. The microprocessor also includes a control circuit adapted to perform an operation on the subset of the caches in response to an execution of the instruction by the at least one of the processors.

Abstract: One embodiment is directed to a method of segregating one or more content addressable storage systems into a plurality of virtual pools. The virtual pools can be allocated to different content sources and/or can be assigned to different storage system capabilities. Another embodiment is directed to transmitting with an input/output request for a content unit information specifying at least one storage capability to be applied to the content unit, and/or receiving such an I/O and implementing the specified storage system capabilities. Another embodiment is directed to extracting from an I/O request from a source information relating to an impact of the I/O on at least one characteristic of the content units stored on a CAS system from the source.

Abstract: One embodiment of the present invention provides a system that facilitates faster execution of code on a memory-constrained computing device that has fast on-chip RAM, wherein the fast on-chip RAM is located on a processor chip, but is not cache memory. The system operates by copying a compiled method from an object heap to the fast on-chip RAM on the memory-constrained computing device. Additionally, the system updates an execution pointer to point to the compiled method in the fast on-chip RAM, wherein the execution pointer can also point to a compiled method in the object heap or an interpreted method in the object heap.

Abstract: A transactional memory programming interface allows a thread to directly and safely access one or more shared memory locations within a transaction while maintaining control structures to manage memory accesses to those same locations by one or more other concurrent threads. Each memory location accessed by the thread is associated with an enlistment record, and each thread maintains a transaction log of its memory accesses. Within a transaction, a read operation is performed directly on the memory location, and a write operation is attempted directly on the memory location, as opposed to some intermediate buffer. The thread can detect inconsistencies between the enlistment record of a memory location and the thread's transaction log to determine whether the memory accesses within the transaction are not reliable and the transaction should be re-tried.

Abstract: A cache read request is received at a cache comprising a plurality of data arrays, each of the data arrays comprising a plurality of ways. Cache line data from each most recently used way of each of the plurality of data arrays is selected in response to the cache read request and selecting a first data of the received cache line data from the most recently used way of the cache. An execution of an instruction is stalled if data identified by the cache read request is not present in the cache line data from the most recently used way of the cache. A second data from a most recently used way of one of the plurality of data arrays other than the most recently used data array is selected as comprising data identified by the cache read request. The second data is provided for use during the execution of the instruction.

Abstract: A method for copying data to multiple remote sites includes transmitting data from a first volume in a primary storage system to a back-up volume provided in a secondary storage system. The primary storage system is located at a primary site, and the secondary storage system is located at a first remote site from the primary site. The data from the first volume in the primary storage system is copied to a second volume in the primary storage system using a point in time (PiT) as a reference point of time for the copying. The second volume is provided with a first time consistent image of the first volume with respect to the reference point of time. The data from the second volume in the primary storage system is transferred to a third volume in a ternary storage system at a second remote site.

Abstract: A memory and method for operating it provide for increased data access speed. In an implementation, a synchronous memory or SDRAM includes a central memory region with memory blocks arranged in sets on respective opposite sides. A number of primary sense amplifier sets are provided, each set being associated with a respective set of the memory blocks and located adjacent. A row cache is provided in the central memory region, and row decoders decode a row address in response to a “bank activate” command and move data from a decoded row address into a primary sense amplifier set associated with a memory block containing the decoded row address and into the row cache, before application of a “read” command to the SDRAM. Column decoders decode a column address in response to a “read” command and for reading data from the cache in accordance with the decoded column address.