Abstract: A structure and related design structure for providing a common mode feedback to a differential amplifier are disclosed. A common mode feedback amplifier is connected to a differential amplifier to provide common mode feedback voltage thereto. An input of the common mode feedback amplifier is shorted to an output terminal of the differential amplifier during a sampling phase, and is coupled to the differential output voltage through two matched capacitors during a holding phase.

Abstract: A linearizer changes a gain characteristic to a valley characteristic in which a gain reduces and then increases. The linearizer includes: a signal path in which an RF signal input terminal an input side bias blocking capacitor, a diode pair, including diodes having opposite polarities to each other, an output side bias blocking capacitor and an RF signal output terminal in series in the stated order; a bias circuit in which a resistor is provided between and a signal path formed between the input side bias blocking capacitor and the diode pair and a bias terminal; an RF short-circuiting capacitor whose one end is connected with the bias circuit between the bias terminal and the resistor and whose other end is grounded; and a DC feed inductor whose one end is connected with the signal path between the diode pair and the output side bias blocking capacitor and whose other end is grounded.

Abstract: A transimpedance amplifier having open-loop DC control is provided. The open-loop feedback control may provide a DC bias that is configurable based on the characteristics of an input device, such as, a photodiode or a magnetoresistor. The open-loop feedback control may provide quick recovery from voltage level variations and may provide stability for the amplifier.

Abstract: An architecture and method for improving efficiency of a Class-A power amplifier by dynamically scaling biasing current thereof as well as synchronously compensating gain thereof in order to maintain overall constant gain of the Class-A power amplifier at all biasing configurations thereof. A biasing-current switching-network is operatively connected to the back-end block of the Class-A power amplifier. A gain-control switching-network is operatively connected to a front-end block of the Class-A power amplifier. A detector-and-control block is operatively connected to an output of the back-end block of the Class-A power amplifier, and samples a signal that is then compared with reference signals to determine switching configurations in the biasing-current switching-network and the gain-control switching network when the signal is processed through the front-end block of the Class-A power amplifier followed by the back-end block of the Class-A power amplifier.

Abstract: An offset cancellation amplifier where during a first period of a data output period, an output voltage and a reference voltage are supplied to the gates of a first differential pair, and the output voltage is accumulated in first and second capacitors while an input voltage is supplied in common to the gates of a second differential pair. During a second period, the output voltage is accumulated in the first capacitor, while the reference voltage is accumulated in the second capacitor. During a third period, the gates of the first differential pair cease to be supplied with the output voltage and with the reference voltage, respectively, and are supplied with the voltages accumulated in the first and second capacitors, respectively. The gates of the second differential pair are supplied with the output voltage and with the input voltage, respectively.

Abstract: A power amplifier to provide a compensated output voltage to a load through a series-connected impedance. The power amplifier includes an inner positive current feedback loop that is capable of sensing changes in the resistance of the load, and which adjusts the effective impedance of the series-connected impedance seen by the load to reduce current induced changes in the level of the compensated output voltage provided to the load due to the presence of the series connected impedance.

Abstract: Amplifier embodiments are provided that are well suited for systems which require high signal gains and high transient currents that can drive various loads (e.g., capacitive loads). At least one amplifier embodiment is realized with a cascoded complementary differential input stage, a complementary differential output stage, and a bias controller. The output stage includes lower and upper differential pairs of transistors that respectively have lower and upper coupled back gates and the bias controller is configured to provide bias voltages for the lower and upper coupled back gates.

Abstract: The present invention relates to a reference current circuit. The reference circuit comprises a low-level current bias circuit, a voltage proportional-to-absolute temperature generator for creating a proportional-to-absolute temperature voltage (VPTAT), and a MOSFET-based constant-IC regulator circuit. The MOSFET-based constant-IC regulator circuit includes a constant-IC input and constant-IC output. The constant-IC input is electrically connected with the VPTAT generator such that the voltage proportional-to-absolute temperature is the input into the constant-IC regulator circuit. Thus the constant-IC output maintains the constant-IC ratio across any temperature range.

Abstract: Circuits and methods to achieve a voltage-to-current converter having low noise and a high linearity are disclosed. In a preferred embodiment the converter has been used as a Gm integrator. The core of the invention is an operational transconductance amplifier (OTA) having additional DC current sources allowing a common mode voltage shift. The feedback currents and output currents are decoupled by means of current mirrors. The feedback currents are higher than the output currents thus allowing lower integration resistor size. A common mode decoupling of input and output has been achieved by current mirrors.

Abstract: A new Class L amplifier which dynamically switches between multiple pairs of power rails, and has the ability to select the most advantageous combination of rails for the minimization of power dissipation in the amplifier. A bridged amplifier system using two Class L amplifiers to drive a load.

Abstract: Provided is a linearization apparatus of a triode region type operational transconductance amplifier that can provide a wide linear input range even when a differential pair input transistor having a short channel length is used at a low power supply voltage. The linearization apparatus of the triode region type operational transconductance amplifier includes: a first transconductor unit for receiving differential pair input voltages through differential pair input transistors and generating a basic transconductance; and a second transconductor unit for receiving the same differential pair input voltages, generating distortion transconductances, and overlapping the basic transconductace with the distortion transconductance for extending a linear range of a final transconductance.

Abstract: A power amplifier (100) suitable for use in mobile telecommunications equipment has a first stage (2) and an optional second stage (2), each stage being provided with a bias circuit (4, 5). To provide a well-defined gain characteristic, in the first stage (1) a bias current (Ib1) is fed into a signal amplifying transistor (T1). The first bias circuit (4) comprises non-linear a voltage/current converter (41) coupled to a current mirror (40). To suit alternative applications, such as GSM and UMTS requiring a different bias, plural voltage/current converters (41, 42) may be provided in parallel.

Abstract: A superconducting switching amplifier embodying the invention includes superconductive devices responsive to input/control signals for clamping the output of the amplifier to a first voltage or to a second voltage. The amplifier includes a first set of superconducting devices serially connected between a first voltage line and an output terminal and a second set of superconducting devices serially connected between the output terminal and a second voltage line. The first set and the second set of devices are operated in a complementary fashion in response to control signals. When one of the first and second sets is driven to a superconducting (zero resistance) state the other set is driven to a resistive state. In accordance with the invention, the devices of each set are laid out in a pattern and driven in a manner to enable all the devices of each set to be driven to a selected state at substantially the same time.

Abstract: An apparatus for supplying a load current. The apparatus comprises a first differential amplifier producing a differential output signal and an output buffer comprising a first and a second parallel emitter follower transistors each producing a current responsive to the differential output signal. A second differential amplifier responsive to the differential output signal controls current mirror masters that in turn control current source mirrors. Current supplied by each of the current sources mirrors in cooperation with the current produced by each of the first and second transistors produce the load current.

Abstract: A distortion cancellation amplifier is described having a main amplifier and an error amplifier. The main amplifier, in response to an input signal, generates an output signal having an amplified signal component and a distortion signal component. The error amplifier is sized and biased to generate, in response to the same input signal, a distortion signal component that has substantially the same magnitude as the distortion signal component of the main amplifier. The distortion signal component from the error amplifier is subtracted from the output signal of the main amplifier.

Abstract: An apparatus and method of reducing a flicker noise of a CMOS amplifier is provided. In the CMOS amplifier, a load circuit is connected to a signal input circuit which includes two pairs of MOSFETs which simultaneously receive differential signals. In this instance, a first MOSFET included in a switch-bias circuit is connected to one pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø1. A second MOSFET included in the switch-bias circuit is connected to another pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø2.

Abstract: A transimpedance amplifier having open-loop DC control is provided. The open-loop feedback control may provide a DC bias that is configurable based on the characteristics of an input device, such as, a photodiode or a magnetoresistor. The open-loop feedback control may provide quick recovery from voltage level variations and may provide stability for the amplifier.

Abstract: A fully differential amplifier device includes a first input and a second input, a first output and a second output, and a differential input stage, provided with a first input transistor and a second input transistor. The first input and the first output and the second input and the second output are directly connected selectively in a first operating configuration and disconnected in a second operating configuration. The amplifier device further includes a current-generator circuit connected so as to supply respective first currents to the first and second outputs irrespective of a state of conduction of the first and second input transistors.

Abstract: A multi-band low noise amplifier capable of operating in a plurality of band modes includes a plurality of input amplifiers respectively corresponding to the plurality of band modes and a single output amplifier. Each input amplifier includes a receiving port for receiving a corresponding input signal in one of the plurality of band modes. The single output amplifier includes at least one port coupled to the plurality of input amplifiers and an output port for outputting a signal processed by the single output amplifier.

Abstract: An amplifier for amplifying a reception signal, having an input terminal for inputting the reception signal from an antenna, has a grounded gate transistor of which gate is grounded in a high frequency manner and of which source is connected to the input terminal, a load element disposed between the drain of the transistor and a power supply, an output terminal connected to a connection node between the drain and the load element, and an attenuator selectively inserted between the drain and the output terminal.