Abstract: A gain control amplifier is provided including: a non-inverting amplifier receiving an input voltage and a direct current reference voltage, and non-inverting amplifying and outputting an alternating component of the input voltage using a predetermined voltage gain based on the direct current reference voltage; and an offset compensator removing a direct current offset component from an output voltage of the non-inverting amplifier using at least two operational amplifiers. The non-inverting amplifier includes: a ladder-shaped resistor varying the voltage gain according to a digital control signal input from an external source.

Abstract: The bias circuit of the present invention can be configured for extremely stiff biasing for Class A circuits, which is solid under heavy RF input overdrive. Alternatively, the circuit may be configured for controlled self biasing for use in Class AB designs.

Abstract: According to an exemplary embodiment, an amplification module includes a power control circuit. The amplification module further includes a power amplifier coupled to the power control circuit and configured to draw a supply current and receive a supply voltage from the power control circuit. The power control circuit is configured to control a DC power provided to the power amplifier by controlling a product of a sense current, which is a mirror current of the supply current, and the supply voltage. The power control circuit includes a feedback voltage that corresponds to the product of the sense current and the supply voltage. The power control circuit further includes an analog multiplier circuit configured to receive the sense current and the supply voltage and generate the feedback voltage. The power control circuit further includes a differential error amplifier configured to compare the feedback voltage to a control voltage.

Abstract: From power supply potential wiring to ground potential wiring, a first inductor, a first resistance, a first output terminal, and a first transistor are series-connected in this order, and in parallel with these, a second inductor, a second resistor, a second output terminal, and a second transistor are series-connected in this order. And, one electrode of a first variable capacitor is connected between the first inductor and first resistor, and one electrode of a second variable capacitor is connected between the second inductor and second resistor. The other electrodes of the first variable capacitor and second variable capacitor are connected to a first frequency characteristics control terminal and a second frequency characteristics control terminal, respectively.

Abstract: An operational amplifier includes an input stage for producing a voltage signal in response to an input signal. An output stage includes an output transistor having a source coupled to a supply voltage and a gate coupled to receive the voltage signal. An output cascode transistor has a source coupled to a drain of the output transistor and a drain coupled to an output conductor. A gate control amplifier includes an input stage including a first input transistor having a control electrode coupled to the source of the output cascode transistor and an active load transistor, the input transistor and the active load transistor being coupled to a gate of the output cascode transistor. The gate control amplifier also includes a feedback amplifier having an input coupled to the source of the output cascode transistor and an output coupled to a control electrode of the active load transistor.

Abstract: An amplifier pre-distorter method and apparatus squares an input signal and splits the signal into inphase and quadrature parts which are processed to generate a polynominal predistortion signal. This simplifies the apparatus and enables implementation in an application specific integrated circuit.

Abstract: An intermodulation product reduction or cancellation amplifier received two input signals that are split in quadrature wherein the inphase outputs are summed and then amplified as an inphase signal, and the quadrature outputs are fixed-phase phase-shifted, then summed and then amplified as a quadrature signal. The inphase and quadrature signals are fed into an output hybrid for canceling intermodulation products, where the fixed-phase phase shift is +/?60° for reducing 3rd order, +/?36° for reducing 5th order, and +/?25.71° for reducing 7th order intermodulation products, for examples, for improved signal communications of the two signals over a common antenna or link.

Abstract: An amplifier includes a signal splitter operable to receive an input signal and generate at least first and second split signals, a first amplifier adapted to receive the first split signal and to generate a first amplified signal, and a second amplifier adapted to receive the second split signal and to generate a second amplified signal. A combining circuit is adapted to generate an output signal which is a sum of the first amplified signal and the second amplified signal. The amplifier further includes a phase control circuit arranged in a signal path of one of the first and second amplifiers, the phase control circuit comprising at least one thin film ferroelectric element. The amount of phase shift provided by the phase control circuit is selectively variable as a function of a control signal applied thereto.

Abstract: An amplifier which comprises an operational amplifier, a semiconductor switch that selectively connects at least one circuit to an input terminal of the operational amplifier, and a device for virtual shorting of both terminals of the semiconductor switch in an isolated state.

Abstract: A power amplification apparatus includes, between a first amplification element for amplifying an input signal and a first output terminal, a second amplification element for further amplifying the input signal amplified in the first amplification element to output to the first output terminal, and a first switch element for controlling the second amplification element to be stop condition. Further, between the first amplification element and a second output terminal, a second switch circuit for controlling the supply of an output from the first amplification element to the second output terminal is provided. When outputting a medium power, the operation efficiency of the power amplification apparatus is improved by reducing a power consumption. Thereby, a total operation efficiency of the power amplification apparatus which outputs either the input signal amplified to a large power or the input signal amplified to a medium power by switching is improved.

Abstract: A low noise amplifier (LNA), which utilizes an AC coupling technique that can internally bias diodes in such a way as to provide effective low noise amplification, is provided. The low noise amplifier includes an input to an amplifier circuit, and an AC coupling capacitor disposed externally to a chip boundary of the amplifier circuit.

Abstract: An inductor element containing circuit board of the present invention comprises a plurality of conductive layers, and a conductor having an inductor function (inductor conductor segment) in one or more of the conductive layers, wherein at least part of the inductor conductor segment is made thicker than other conductors disposed within the circuit board. The at least part of the inductor conductor segment extends through an insulating layer disposed between the conductive layers, or is embedded in the insulating layer, wherein the part of the inductor conductor segment has a thickness one-half or more the thickness of the insulating layer. A power amplifier module of the present invention comprises the multi-layer circuit board, a semiconductor amplifier fabricated in the multi-layer circuit board, and an impedance matching circuit coupled to the output of the semiconductor amplifier. The impedance matching circuit has a portion thereof formed of the inductor conductor segment.

Abstract: A rail-to-rail-Input Buffer with constant mutual conductance includes a differential input; a first differential stage supplied with a first reference current; a second differential stage supplied with a second reference current; a switching PMOS-transistor which switches through when the input signal is higher than a first threshold voltage to divert the first reference current to a first current mirror circuit; a switching NMOS-transistor which switches through when an input signal is lower than a second threshold voltage to divert the second reference current to a second current mirror circuit; a third differential stage supplied with the mirrored first reference current and replaces the first differential stage when the input signal is higher than the first threshold voltage; and a fourth differential stage supplied with the mirrored second reference current and replaces the second differential stage when the input signal is lower than the second threshold voltage.

Abstract: An amplifier circuit controls the output current through an inductive load. A signal is amplified by one or more op amps, and sourced into a back to back coupling of an NPN transistor and a PNP transistor. In a positive circuit segment, current is sourced to an inductive load, and in a negative segment, current is sunk from the inductive load. The current at the output of the inductive load flows through a resistor, and the resultant voltage drop is negatively fed back to the op amp.

Abstract: A variable-gain amplifier (VGA), with one or more amplifier stages, has two or more offset correction sources connected to apply offset correction signals at different locations in the VGA. In one embodiment, each amplifier stage has both an input offset correction source and an output offset correction source. In another embodiment, each amplifier stage of a multi-stage VGA has an input offset correction source. By sequentially calibrating each amplifier stage, starting with the initial stage and proceeding downstream, the entire VGA can be calibrated to achieve gain-independent compensation for the adverse affects of input and output voltage offsets at the input and output, respectively, of each stage.

Abstract: An apparatus for automatically controlling a gain of a power amplifier includes a reception-signal detecting unit which detects a reception signal; a reference-voltage generating unit which generates a reference voltage; a gain control voltage detecting unit which compares the detected reception signal with the generated reference voltage to detect a gain control voltage; a gain control unit which controls a gain of an input signal to output a gain signal based on the detected gain control voltage; an impedance matching unit which compensates for mismatched impedance of the gain control unit according to gain control; and a power amplifying unit which amplifies the gain signal.

Abstract: A left-handed nonlinear transmission line system has multiple nonlinear capacitors connected in series between input and output terminals and multiple inductances connected in parallel between the nonlinear capacitors and a return conductor extending between the input and output terminals. The nonlinear capacitors have a capacitance characteristic that changes with the voltage applied across the capacitors, such as a capacitance that decreases with increasing voltage. A radio frequency signal source is coupled to the input terminals and provides power at a selected drive frequency. Depending on the frequency of the drive signal with respect to the Bragg cutoff frequency of the nonlinear transmission line, the output signal may include a strong signal component at the third harmonic of the input drive signal frequency, components at higher harmonics, or components at fractional frequencies of the input drive signal frequency.

Abstract: Provided is a digital feedback linearizing apparatus and method to linearize a power amplifier (PA), which is intended to improve the linearity of a mobile communication base station PA, and more particularly, a digital feedback linearizing apparatus and method to linearize a PA using a digital signal process (DSP) and a feedback technology, in which a predistorted signal required for linearization is generated by adding an input signal input through a predetermined path to an inverse distortion component corresponding to a distortion component of an PA and in which a linearly amplified output signal is obtained by passing the predistorted signal through the PA.

Abstract: In an interface circuit for connection to an output of a frequency converter, at least two current paths are coupled to one another in parallel. Each current path includes at least one cascode stage for signal processing. The circuit compensates for DC voltage offsets of the frequency converter, and has a gain ratio that can be changed over for signals with a large dynamic range.

Abstract: A differential amplifier suitably adapted to an ultra-high-speed signal transmitting apparatus. The differential amplifier includes a first inductor located between a differential transistor and a gate grounded transistor, an optional second inductor located between a load resistor and a power supply, and an optional third inductor located between a source follower transistor and an output terminal.