Abstract: An inductor element containing circuit board of the present invention comprises a plurality of conductive layers, and a conductor having an inductor function (inductor conductor segment) in one or more of the conductive layers, wherein at least part of the inductor conductor segment is made thicker than other conductors disposed within the circuit board. The at least part of the inductor conductor segment extends through an insulating layer disposed between the conductive layers, or is embedded in the insulating layer, wherein the part of the inductor conductor segment has a thickness one-half or more the thickness of the insulating layer. A power amplifier module of the present invention comprises the multi-layer circuit board, a semiconductor amplifier fabricated in the multi-layer circuit board, and an impedance matching circuit coupled to the output of the semiconductor amplifier. The impedance matching circuit has a portion thereof formed of the inductor conductor segment.

Abstract: System and method for limiting an output signal of a differential amplifier. A preferred embodiment comprises a limit sense amplifier configured to detect when the output exceeds a permitted limit, a common mode bias current unit configured to increase a signal gain of a common mode amplifier in the differential operational amplifier when the limit sense amplifier detects that the output exceeded the permitted limit, and an output stage bias current unit configured to fix the output at a level substantially equal to the specified limit when the limit sense amplifier detects that the output exceeded the permitted limit. The clamping is achieved by changing the operation of circuitry within the differential amplifier and results in a smoother clamping that helps to maintain stable operation.

Abstract: A radio frequency power amplifier including control electronics for providing control signals for timing of the power amplifier. A first group of the drivers are coupled to the control electronics and a second group of drivers are coupled to the control electronics. The first group of drivers operate in response to the control signals to generate first drive signals and the second group of drivers operate in response to the control signals to generate second drive signals with a phase difference of 180° relative to the first drive signals. A first group of switches energize a first group of primary windings in response to the first drive signals and a second group of switches energize a second group of primary windings in response to the second drive signals. An output summing transformer has a plurality of ferrite cores, the first group of primary windings and the second group of primary windings passing through the ferrite cores.

Abstract: Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection. Impedance matching and bandwidth extension provides desired gain at higher frequencies and may be achieved at the interface between silicon and package and/or circuit board within various integrated circuits that may be employed within communication devices. In some instances, a differential transistor pair is employed that also includes Miller capacitors coupled between the gate of one transistor of the differential transistor pair to the drain of the other transistor of the differential transistor pair. This can also include series load connected resistors and inductors coupled between the respective drains of the transistors of the differential transistor pair to a power supply voltage. Also, series connected input inductors may also couple to the gates of the transistors of the differential transistor pair.

Abstract: Equal common mode voltage is present at the input terminals of an operational amplifier with amplifies the residue signal in a stage of an ADC in two phases while reducing the noise introduced into the amplified signal. A reference capacitor is coupled between an input terminal of the operational amplifier and a reference voltage in a first phase, and between the input terminal and a the reference voltage but with opposite polarity in the second phase.

Abstract: A collector boost circuit is disclosed for providing a first voltage in a first mode of operation to a power amplifier, and a second voltage in a second mode of operation to the power amplifier. The collector boost circuit uses a switch and an indicator signal for triggering the switch between the first and the second mode of operation. The second voltage is a boosted voltage greater than the first voltage and is provided during peak excursions through a boost capacitor.

Abstract: An integrated circuit includes a composite transistor including at least a first transistor of a first technology type having a first group of intrinsic properties and a second transistor of a second technology type having a second group of the intrinsic properties, at least one of the intrinsic properties of the second group being substantially different than a corresponding intrinsic property of the first group, the second transistor having a first electrode coupled to a supply voltage, a second electrode coupled to a first electrode of the first transistor, and a control electrode coupled to a bias voltage conductor and also coupled to a control electrode and a second electrode of the first transistor. A source of bias current is coupled to the bias voltage conductor and is also coupled to the second electrode of the second transistor. A bias voltage across the composite transistor is produced on the bias voltage conductor to bias a cascode transistor of the first technology type.

Abstract: The invention proposes a negative gain transconductance amplifier circuit (1) for capacitive load that includes: an RC serial circuit connected between an input terminal (E) of the amplifier circuit and a intermediate terminal (A); an amplification level connected between the intermediate terminal and an output terminal (S) designed to be connected to a capacitive load, and which includes: a first negative gain transconductance amplifier (2) connected via open loop between the intermediate terminal and the output terminal; a second negative gain transconductance amplifier (3) with characteristics that are notably identical to those of the first amplifier, connected via closed loop; its input and output are connected to the intermediate terminal via a resistance (R1).

Abstract: A system and method is provided for driving an output transistor. The system and method employ a sense control to adjust a drive strength associated with driving the output transistor. The sense control measures an output parameter of the transistor, and adjusts the drive strength based on the measured parameter. The drive strength can be based on a selected driver of a plurality of driver devices with varying drive strengths or selected output devices of a driver of a plurality of output devices of varying drive strengths. The drive strength of the driver devices or output devices can be varied by varying the channel widths of output drive devices selectively coupled to a drive terminal (e.g., gate, base) of the output transistor.

Abstract: A differential amplifier stage includes one active load circuit connected to a pair of cross-coupled transistors that produce a differential signal. The active load circuit controls the rise time of the differential signal. The differential amplifier stage also includes another active load circuit connected to the pair of cross-coupled transistors. The second active load circuit controls the fall time of the differential signal.

Abstract: The invention is a power amplifier circuit for providing a signal acceptable for use in audio amplifiers or similar applications without requiring a stable power supply free from fluctuation. An alternating current power supply signal rectified to a direct current signal is processed by two voltage multipliers. A voltage divider establishes a unity gain level, and the variance from this voltage is squared by the first voltage multiplier. This squared voltage is then multiplied with a triangular wave signal to generate a modulated triangular wave signal. The modulated triangular wave signal and a signal to be amplified, typically an audio signal, are processed by an internal comparator to generate a pulse width modulated signal. This modulated signal is processed by a power transistor network and filter to provide an amplified signal to a load device.

Abstract: A low noise amplifier is provided that includes a first circuit block capable of amplifying a first voltage signal that is input to the amplifier. The first circuit block includes a first terminal coupled to a first supply voltage by a variable resistance, and a second terminal coupled to a second supply voltage. The second terminal is coupled to an output terminal of the amplifier, and the first voltage signal is applied to a further terminal of the first circuit block. The amplifier also includes a feedback network coupled to the output terminal and to the further terminal of the first circuit block, and a second circuit block coupled between the second supply voltage and the further terminal of the first circuit block. The second circuit block is adapted to compensate for variations in value of the variable resistance to ensure a substantially constant input resistance of the amplifier.

Abstract: A double reference wave modulation scheme for filterless power amplifiers is disclosed for reducing EMI and common mode voltages. In the filterless power amplifier, differential outputs for driving load impedance are feedback and corrected based on input audio signals. Reference wave generators generate reference waves. A control logic results pulses in the pair of differential outputs in response to a clock signal or a reference voltage and a cross relationship between the input audio signal and the first and second reference waves. Pulses of one of the differential outputs are not overlapped with pulses of the other of the differential outputs for eliminating common mode noises of the power amplifier.

Abstract: The invention provides an apparatus and a method for adjusting an output impedance of an output stage. The apparatus comprises a detector for outputting a direct current potential corresponding to the impedance of the output stage circuit. It also comprises a controlling unit for outputting a control signal according to the direct current potential and a reference potential, and for adjusting the output impedance of the output stage according to the control signal.

Abstract: A CMOS class A/B output stage provides the advantages of high speed operation, low supply voltage requirements, and low quiescent current draw, resulting from the use of subthreshold biasing of the output driver transistors. The architecture of the output stage makes it particularly suitable for use in operational amplifiers in power demanding applications, such as portable instruments, smoke detectors, sensors, or the like.

Abstract: An amplifier includes a subtracting unit for generating an error signal according to an input signal and an output signal; a noise shaping unit for executing a noise shaping operation on the error signal to produce a noise-shaped signal; a pulse adjustment unit for generating a control signal according to the noise-shaped signal and the input signal; and a power stage for generating the output signal according to the control signal.

Abstract: The present invention relates to an input circuit for receiving an input signal in an integrated circuit, having a differential amplifier whose first input can have a predetermined reference voltage applied to it and whose second input can have the input signal applied to it, and having a current source for operating the differential amplifier at its operating point, wherein a setting circuit is connected to the current source in order to set the operating point of the differential amplifier in an optimum manner on the basis of the predetermined reference voltage.

Abstract: A current-matching variable gain amplifier is provided. The amplifier comprises a reference current source, at least one cascode amplifier, a matching circuit, a control circuit, and at least one first blocking circuit. The reference current source provides a reference current. Each of the cascode amplifiers amplifies an input signal according to the reference current. The matching circuit equalizes the voltage level at a first node in each cascode amplifier and the voltage level at a second node in the matching circuit. The matching circuit also equalizes the current of a main MOSFET of each cascode amplifier and the current of a first MOSFET of the matching circuit. The control circuit controls the current of the first MOSFET of the matching circuit. Each of the first blocking circuit(s) corresponds with the cascode amplifier, and is coupled between the reference current source and the corresponding cascode amplifier, for blocking RF signals.

Abstract: A low noise amplifier (LNA) is discussed. In implementations, a LNA may include a feedback section coupled to a transistor. The feedback section may have a resistive portion including a buffer and a resistor. A capacitor may be connected in parallel with the resistor. In additional implementations, an integrated circuit may include a second transistor connected to the drain of the first transistor. A feedback section may be coupled across the first and second transistors. The feedback section may include a buffer, a resistor and a capacitor connected in series, so that the terminal of the buffer is connected to the drain of the second transistor while the terminal of the resistor is connected to a source on the first transistor.

Abstract: A distortion cancellation amplifier is described having a main amplifier and an error amplifier. The main amplifier, in response to an input signal, generates an output signal having an amplified signal component and a distortion signal component. The error amplifier is sized and biased to generate, in response to the same input signal, a distortion signal component that has substantially the same magnitude as the distortion signal component of the main amplifier. The distortion signal component from the error amplifier is subtracted from the output signal of the main amplifier.