Patents Examined by Kyoung Lee
  • Patent number: 11935849
    Abstract: A semiconductor package includes a front redistribution structure having a first surface and a second surface, opposite to the first surface, a dielectric layer, an antenna substrate including a plurality of antenna members in the dielectric layer, a semiconductor chip having a connection pad connected to the plurality of antenna members, a conductive core structure having a first through-hole accommodating the antenna substrate and a second through-hole accommodating the semiconductor chip, and a rear redistribution structure including a conductive cover layer exposing an upper portion of the antenna substrate and covering an upper portion of the semiconductor chip, and a conductive via connecting the conductive cover layer to the conductive core structure.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myungsam Kang, Sangkyu Lee, Yongkoon Lee
  • Patent number: 11935812
    Abstract: A semiconductor package may include a package substrate, a semiconductor chip on the package substrate, a heat dissipation member on the semiconductor chip, and a first thermal interface material coated on an upper surface of the semiconductor chip to bond the semiconductor chip and the heat dissipation member. The first thermal interface material may include a liquid metal and fine particles disposed inside the liquid metal. The fine particles may have no oxide layer on a surface thereof. A volume percentage of the fine particles in the liquid metal including the fine particles therein may be about 1% to about 5%. A thermal conductivity of the liquid metal including the fine particles therein may be equal to or more than about 40 W/m·K.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: March 19, 2024
    Assignees: SAMSUNG ELECTRONICS CO., LTD., UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
    Inventors: Seunggeol Ryu, Seokkan Ki, Youngsuk Nam, Jaechoon Kim, Bangweon Lee, Seungtae Hwang
  • Patent number: 11930671
    Abstract: A flexible display panel and a manufacturing method thereof, and a flexible display apparatus are disclosed. The flexible display panel includes: a flexible substrate, the flexible substrate including a display area, a peripheral area, a welding area and a bending area, and the bending area including a first edge; and the flexible display panel further includes: a barrier and an organic insulation layer, wherein the peripheral area includes a peripheral transition area between the bending area and the display area, the organic insulation layer in the peripheral transition area is provided with a first groove, the first groove is on one side of the barrier and extends along a direction substantially parallel to a bending axis, and the first groove is on one side of the first edge proximal to the display area.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: March 12, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Kemeng Tong, Xiangdan Dong, Fan He
  • Patent number: 11929340
    Abstract: A structure includes a redistribution structure, which includes a bottom layer and a plurality of upper layers over the bottom layer. The redistribution structure also includes a power-ground macro extending from a topmost layer in the plurality of upper layers to a bottommost layer in the plurality of upper layers, and a metal pad in the bottom layer and overlapped by the power-ground macro. The metal pad is electrically disconnected from the power-ground macro.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Yu Yeh, Chun-Hua Chang, Fong-Yuan Chang, Jyh Chwen Frank Lee
  • Patent number: 11923309
    Abstract: Disclosed are semiconductor packages and methods of fabricating the same. The semiconductor package includes a redistribution substrate including redistribution line patterns in a dielectric layer, and a semiconductor chip on the redistribution substrate. The semiconductor chip includes chip pads electrically connected to the redistribution line patterns. Each of the redistribution line patterns has a substantially planar top surface and a nonplanar bottom surface. Each of the redistribution line patterns includes a central portion and edge portions on opposite sides of the central portion. Each of the redistribution line patterns has a first thickness as a minimum thickness at the central portion and a second thickness as a maximum thickness at the edge portions.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: March 5, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunsu Hwang, Junyun Kweon, Jumyong Park, Jin Ho An, Dongjoon Oh, Chungsun Lee, Ju-Il Choi
  • Patent number: 11923375
    Abstract: A display apparatus includes a substrate partitioned into a central area and a peripheral area disposed adjacent to the central area. The central area includes a display area; a first insulating layer corresponding to the peripheral area of the substrate; at least one slit corresponding to a region of the first insulating layer; and a cladding layer, which covers the at least one slit, on the first insulating layer.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: March 5, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wonkyu Kwak, Jaeyong Lee
  • Patent number: 11925100
    Abstract: A display module includes substrate and adhesive portion. Substrate includes display portion, bending portion and bonding portion located on non-light-emitting side of display portion. Bending portion is located between display portion and bonding portion. Adhesive portion includes first adhesive portion including first adhesive sub-portion and second adhesive sub-portion located on side of first adhesive sub-portion facing away from bending portion. Bonding portion includes first bonding sub-portion at least partially overlapping first adhesive sub-portion in a first direction and second bonding sub-portion located on side of first bonding sub-portion facing away from bending portion at least partially overlapping second adhesive sub-portion in the first direction.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: March 5, 2024
    Assignee: Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventors: Xiangwei Zhao, Jiang Li, Guancheng Xiao, Ruiyuan Zhou
  • Patent number: 11923395
    Abstract: The present disclosure relates to a semiconductor device, a solid-state image pickup element, an image pickup device, and an electronic apparatus that are enabled to reduce restrictions on materials and restrictions on device configuration. A CSP imager and a mounting substrate are connected together with a connection portion other than a solder ball. With such a configuration, restrictions on materials and restrictions on device configuration are reduced, which has conventionally occurred because it is limited to a configuration in which solder balls are used for connection. The present disclosure can be applied to image pickup devices.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: March 5, 2024
    Assignee: Sony Group Corporation
    Inventors: Yoshiaki Masuda, Minoru Ishida
  • Patent number: 11917852
    Abstract: Provided is a display apparatus according to an exemplary embodiment of the present disclosure which includes a substrate including a display area and at least one non-display area; a light emitting device and a plurality of transistors disposed in the display area of the substrate; and a power wiring disposed in the at least one non-display area and electrically connected to the plurality of transistors and the light emitting device. The at least one non-display area includes a camera hole area and a disconnection area, and the disconnection area has a closed loop shape to surround the camera hole area. Therefore, provided is a display apparatus that is more stable for permeation of moisture and oxygen.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: February 27, 2024
    Assignee: LG Display Co., Ltd.
    Inventors: Minsoo Park, Sang-Il Shin, Jaechang Kang
  • Patent number: 11916036
    Abstract: A system and method are provided for depositing a substance onto a substrate, the system comprising: a chamber adapted to operate under high vacuum; an apparatus for receiving and cleaning the substrate to produce a clean substrate and for delivering the clean substrate to a coating position in the chamber under high vacuum; a carrier assembly for receiving the clean substrate from the apparatus and for retaining the substrate at the coating position; an evaporator adapted to hold a supply of the substance in the chamber and to evaporate and produce a discharge of the substance; and a collimator disposed within the chamber between the supply of the substance and the carrier assembly, the collimator being configured to define an aperture proximal to the substrate and to capture the discharge but for that which is directed through the aperture.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: February 27, 2024
    Assignee: INTLVAC INC.
    Inventors: Michael Nagy, Dino Deligiannis
  • Patent number: 11901182
    Abstract: Embodiments disclosed herein are directed to forming MOSFET devices. In particular, one or more pre-silicide treatments are performed on a substrate prior to the deposition of the metal-silicide layer to improve the density and performance of the metal-silicide layer in the MOSFETs. The metal-silicide formation formed with the pre-silicide treatment(s) can occur before or after the formation of metal gates during MOSFET fabrication.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: February 13, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Xuebin Li, Errol Antonio C. Sanchez, Patricia M. Liu
  • Patent number: 11901301
    Abstract: A semiconductor package includes a frame structure having a core portion and a lower pad under the core portion. A cavity penetrates the core portion, and a semiconductor chip is arranged in the cavity and has an active surface on which a bump pad is arranged and a non-active surface facing the active surface. A redistribution structure is positioned under the frame structure and the semiconductor chip, and is connected to the lower pad and the bump pad. A molding member covers the frame structure and the semiconductor chip and fills the cavity. The molding member surrounds a lower surface of the frame structure, the active surface of the semiconductor chip, the lower pad, and the bump pad.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: February 13, 2024
    Inventors: Jeongho Lee, Doohwan Lee
  • Patent number: 11903304
    Abstract: The invention relates to a photodiode, like an photovoltaic (OPV) cell or photodetector (OPD), comprising, between the photoactive layer and an electrode, a hole selective layer (HSL) for modifying the work function of the electrode and/or the photoactive layer, wherein the HSL comprises a fluoropolymer and optionally a conductive polymer, and to a composition comprising such a fluoropolymer and a conductive polymer.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: February 13, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Yi-Ming Chang, Chuang-Yi Liao, Wei-Long Li, Kuen-Wei Tsai, Huei Shuan Tan, Nicolas Blouin, Luca Lucera, Tim Poertner, Graham Morse, Priti Tiwana
  • Patent number: 11903292
    Abstract: Provided is an organic light emitting display device. The organic light emitting display device includes a lower substrate including sub-pixels, a display area, a non-display area, and an exposed area; a lower touch pad unit in the non-display area and adjacent to the exposed area on the lower substrate; an upper substrate disposed opposite to the remaining area excluding the exposed area of the lower substrate; an upper touch pad unit on the upper substrate so as to correspond to the lower touch pad unit; a first connection electrode in direct contact with the lower touch pad unit; a second connection electrode opposite to the first connection electrode and in direct contact with the upper touch pad unit; and a self-assembly contact member disposed between the first connection electrode and the second connection electrode so as to electrically connect the first connection electrode and the second connection electrode.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: February 13, 2024
    Assignee: LG Display Co., Ltd.
    Inventors: JoongHa Lee, DongKyu Lee, BooYoung Kim, YoungJun Hong, Onesouk Cho, SeongHoon Kim, SeYoung Kim, Jaehwan Yun, WonGyu Jeong, WooJin Sim
  • Patent number: 11894333
    Abstract: A semiconductor package includes: a redistribution substrate including a connection via and a redistribution layer electrically connected to each other, and a redistribution pad electrically connected to the redistribution layer by the connection via, a space pattern separating at least some of the redistribution pads from each other, a dummy metal pattern at least partially surrounded by the space pattern, and a degassing opening passing through at least one of the redistribution pad and the dummy metal pattern; a connection bump electrically connected to the redistribution pad; and a semiconductor chip on the redistribution substrate and including a connection pad electrically connected to the redistribution layer, the redistribution pad including a plurality of protrusions protruding from the same plane in directions different from each other and having a corner having a rounded shape, and the dummy metal pattern includes branch patterns each extending in directions different from one another.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: February 6, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dahee Kim, Jeongrim Seo, Gookmi Song
  • Patent number: 11894312
    Abstract: A package includes an interposer structure free of any active devices. The interposer structure includes an interconnect device; a dielectric film surrounding the interconnect device; and first metallization pattern bonded to the interconnect device. The package further includes a first device die bonded to an opposing side of the first metallization pattern as the interconnect device and a second device die bonded to a same side of the first metallization pattern as the first device die. The interconnect device electrically connects the first device die to the second device die.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu Chen, Chun-Chih Chuang, Kuan-Lin Ho, Yu-Min Liang, Jiun Yi Wu
  • Patent number: 11894324
    Abstract: In-package radio frequency (RF) waveguides as high bandwidth chip-to-chip interconnects and methods for using the same are disclosed. In one example, an electronic package includes a package substrate, first and second silicon dies or tiles, and an RF waveguide. The first and second silicon dies or tiles are attached to the package substrate. The RF waveguide is formed in the package substrate and interconnects the first silicon die or tile with the second silicon die or tile.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: February 6, 2024
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Telesphor Kamgaing, Sri Ranga Sai Boyapati, Kristof Darmawikarta, Eyal Fayneh, Ofir Degani, David Levy, Johanna M. Swan
  • Patent number: 11894354
    Abstract: An optoelectronic device package includes a first redistribution layer (RDL), a first electronic die disposed over the first RDL, wherein an active surface of the first electronic die faces the first RDL. The optoelectronic device package further includes a second electronic die disposed over the first RDL, and a photonic die disposed over and electrically connected to the second electronic die. An active surface of the second electronic die is opposite to the first RDL.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: February 6, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chi-Han Chen
  • Patent number: 11887991
    Abstract: A display apparatus includes a base substrate, a polysilicon active pattern disposed on the base substrate, including polycrystalline silicon, including a source region and a drain region each doped with impurities and a channel region between the source region and the drain region, and including indium, a first gate electrode overlapping the channel region, and a source electrode electrically connected to the source region and a drain electrode electrically connected to the drain region.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: January 30, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyoung Seok Son, Myounghwa Kim, Jaybum Kim, Yeon Keon Moon, Masataka Kano
  • Patent number: 11889725
    Abstract: A flexible display panel and a manufacturing method thereof, and a flexible display apparatus are disclosed. The flexible display panel includes: a flexible substrate, the flexible substrate including a display area, a peripheral area, a welding area and a bending area, and the bending area including a first edge; and the flexible display panel further includes: a barrier and an organic insulation layer, wherein the peripheral area includes a peripheral transition area between the bending area and the display area, the organic insulation layer in the peripheral transition area is provided with a first groove, the first groove is on one side of the barrier and extends along a direction substantially parallel to a bending axis, and the first groove is on one side of the first edge proximal to the display area.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: January 30, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Kemeng Tong, Xiangdan Dong, Fan He