Patents Examined by Lan Vinh
  • Patent number: 11615964
    Abstract: An etching method in accordance with the present disclosure includes providing a substrate, which includes a silicon-containing film, in a chamber; and etching the silicon-containing film with a chemical species in plasma generated from a process gas supplied in the chamber. The process gas includes a phosphorus gas component and a fluorine gas component.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: March 28, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takahiro Yokoyama, Maju Tomura, Yoshihide Kihara, Ryutaro Suda, Takatoshi Orui
  • Patent number: 11605544
    Abstract: Embodiments of the present disclosure generally relate to methods and systems for cleaning a surface of a substrate. In an embodiment, a method of processing a substrate is provided. The method includes introducing a substrate to a processing volume of a processing chamber by positioning the substrate on a substrate support. The method further includes flowing a first process gas into the processing volume, the first process gas comprising HF, flowing a second process gas into the processing volume, the second process gas comprising pyridine, pyrrole, aniline, or a combination thereof, and exposing the substrate to the first process gas and the second process gas to remove oxide from the substrate under oxide removal conditions. In another embodiment, a system is provided that includes a processing chamber to process a substrate, and a controller to cause a processing method to be performed in the processing chamber.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: March 14, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Schubert S. Chu, Errol Antonio C. Sanchez
  • Patent number: 11569094
    Abstract: An etching method includes: (a) providing, on a support, a substrate having the first region covering the second region and the second region defining a recess receiving the first region, (b) etching the first region until or immediately before the second region is exposed, (c) exposing the substrate to plasma generated from a first process gas containing C and F atoms using a first RF signal and forming a deposit on the substrate, (d) exposing the deposit to plasma generated from a second process gas containing an inert gas using a first RF signal and selectively etching the first region to the second region, and (e) repeating (c) and (d). (c) includes using the RF signal with a frequency of 60 to 300 MHz and/or setting the support to 100 to 200° C. to control a ratio of C to F atoms in the deposit to greater than 1.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: January 31, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Kota Ishiharada, Fumiya Takata, Toshikatsu Tobana, Shinya Morikita
  • Patent number: 11566178
    Abstract: A composition for etching and a method of manufacturing a semiconductor device, the method including an etching process of using the composition for etching, are provided. The composition for etching includes a first inorganic acid; any one first additive selected from the group consisting of phosphorous acid, an organic phosphite, a hypophosphite, and mixtures thereof, and a solvent. The composition for etching is a high-selectivity composition for etching that can selectively remove a nitride film while minimizing the etch rate for an oxide film and does not have a problem such as particle generation, which adversely affects device characteristics.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: January 31, 2023
    Inventors: Jung Hun Lim, Jin Uk Lee, Jae Wan Park
  • Patent number: 11557486
    Abstract: An etching method includes preparing a substrate having an etching target portion formed on a silicon-containing portion, plasma-etching the etching target portion of the substrate into a predetermined pattern by plasma of a processing gas containing a CF-based gas, and removing a damage layer formed due to implantation of C and F into the silicon-containing portion exposed at a bottom of the predetermined pattern by the plasma etching. The removing of the damage layer includes forming an oxide of the damage layer by supplying oxygen-containing radicals and fluorine-containing radicals and oxidizing the damage layer with the oxygen-containing radicals while etching the damage layer with the fluorine-containing radicals, and removing the oxide by a radical treatment or a chemical treatment with a gas.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: January 17, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Akitaka Shimizu
  • Patent number: 11551942
    Abstract: Methods and apparatus for removing substrate contamination are provided herein. In some embodiments, a multi-chamber processing apparatus includes: a processing chamber for processing a substrate; a factory interface (FI) coupled to the processing chamber via a load lock chamber disposed therebetween; and a cleaning chamber coupled to the FI and configured to rinse and to dry the substrate, wherein the cleaning chamber includes a chamber body defining an interior volume and having a first opening at an interface with the FI for transferring the substrate into and out of the interior volume.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: January 10, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Manoj A. Gajendra, Kyle Moran Hanson, Mahadev Joshi, Arvind Thiyagarajan, Jon Christian Farr
  • Patent number: 11551937
    Abstract: An etching method in accordance with the present disclosure includes providing a substrate, which includes a silicon-containing film, in a chamber; and etching the silicon-containing film with a chemical species in plasma generated from a process gas supplied in the chamber. The process gas includes a phosphorus gas component and a fluorine gas component.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: January 10, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takahiro Yokoyama, Maju Tomura, Yoshihide Kihara, Ryutaro Suda, Takatoshi Orui
  • Patent number: 11549034
    Abstract: The present invention provides Chemical Mechanical Planarization Polishing (CMP) compositions for Shallow Trench Isolation (STI) applications. The CMP compositions contain ceria coated inorganic metal oxide particles as abrasives, such as ceria-coated silica particles; chemical additive selected from the first group of non-ionic organic molecules multi hydroxyl functional groups in the same molecule; chemical additives selected from the second group of aromatic organic molecules with sulfonic acid group or sulfonate salt functional groups and combinations thereof; water soluble solvent; and optionally biocide and pH adjuster; wherein the composition has a pH of 2 to 12, preferably 3 to 10, and more preferably 4 to 9.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: January 10, 2023
    Assignee: VERSUM MATERIALS US, LLC
    Inventors: Xiaobo Shi, Krishna P. Murella, Joseph D. Rose, Hongjun Zhou, Mark Leonard O'Neill
  • Patent number: 11545364
    Abstract: A method includes performing a first on phase including applying an SP pulse to an SP electrode to generate plasma, performing a second on phase after the first on phase, performing a corner etch phase after the second on phase, and performing a by-product management phase after the corner etch phase. The SP pulse terminates at the end of the first on phase. The second on phase includes applying a first BP pulse to a BP electrode coupled to a target substrate. The first BP pulse includes a first BP power level and accelerates ions of the plasma toward to target substrate. The corner etch phase includes applying a BP spike including a second BP power level greater than the first BP power level. The duration of the BP spike is less than the duration of the first BP pulse.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: January 3, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Peter Ventzek, Alok Ranjan, Kensuke Taniguchi, Shinya Morikita
  • Patent number: 11538704
    Abstract: A processing method of a workpiece in which the workpiece with a plate shape is processed by using a vacuum chamber is provided. In the processing method of a workpiece, a negative pressure is caused to act on a holding surface from a suction path, and suction holding of the workpiece is executed by a chuck table. Then, the gas pressure in the vacuum chamber is reduced to at least 50 Pa and at most 5000 Pa. Then, while the suction holding of the workpiece is executed, an inert gas in a plasma state is supplied to the workpiece, and voltages are applied to electrodes disposed in the chuck table to execute electrostatic adhesion of the workpiece by the chuck table. Then, a processing gas in a plasma state is supplied, and dry etching of the workpiece is executed.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: December 27, 2022
    Assignee: DISCO CORPORATION
    Inventors: Yoshio Watanabe, Hiroyuki Takahashi, Kentaro Wada
  • Patent number: 11538723
    Abstract: Disclosed are embodiments of an improved apparatus and system, and associated methods for optically diagnosing a semiconductor manufacturing process. A hyperspectral imaging system is used to acquire spectrally-resolved images of emissions from the plasma, in a plasma processing system. Acquired hyperspectral images may be used to determine the chemical composition of the plasma and the plasma process endpoint. Alternatively, a hyperspectral imaging system is used to acquire spectrally-resolved images of a substrate before, during, or after processing, to determine properties of the substrate or layers and features formed on the substrate, including whether a process endpoint has been reached; or before or after processing, for inspecting the substrate condition.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: December 27, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Yan Chen, Xinkang Tian
  • Patent number: 11532484
    Abstract: In order to implement a plasma etching method for improving a tapered shape, a plasma processing apparatus includes: a processing chamber in which a sample is subjected to plasma processing; a first radio frequency power source that supplies radio frequency power for generating a plasma; a sample stage on which the sample is placed; a second radio frequency power source that supplies radio frequency power to the sample stage; and a control unit that controls the first radio frequency power source and the second radio frequency power source so as to etch a stacked film formed by alternately stacking a silicon oxide film and a polycrystalline silicon, or a stacked film formed by alternately stacking a silicon oxide film and a silicon nitride film, by using a plasma generated by a mixed gas of a hydrogen bromide gas, a hydrofluorocarbon gas and a nitrogen element-containing gas.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: December 20, 2022
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Taku Iwase, Takao Arase, Satoshi Terakura, Hayato Watanabe, Masahito Mori
  • Patent number: 11530355
    Abstract: A composition for etching and a method of manufacturing a semiconductor device, the method including an etching process of using the composition for etching, are provided. The composition for etching includes a first inorganic acid; any one first additive selected from the group consisting of phosphorous acid, an organic phosphite, a hypophosphite, and mixtures thereof; and a solvent. The composition for etching is a high-selectivity composition for etching that can selectively remove a nitride film while minimizing the etch rate for an oxide film and does not have a problem such as particle generation, which adversely affects device characteristics.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: December 20, 2022
    Inventors: Jung Hun Lim, Jin Uk Lee, Jae Wan Park
  • Patent number: 11527413
    Abstract: A method for processing a substrate includes performing a cyclic plasma etch process including a plurality of cycles, where each cycle of the plurality of cycles includes: causing chemical reactions with the surface of the substrate by exposing a surface of the substrate to fluorine radicals extracted from a first gas discharge plasma formed using a first gaseous mixture including a non-polymerizing fluorine compound; cooling the substrate and concurrently removing residual gaseous byproducts by flowing a second gaseous mixture over the substrate, and at the same time, suppressing the chemical reactions with the surface of the substrate; and performing a plasma surface modification process by exposing the surface of the substrate to hydrogen radicals extracted from a second gas discharge plasma formed using a third gaseous mixture including gases including nitrogen and hydrogen.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: December 13, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Yun Han, Peter Ventzek, Alok Ranjan
  • Patent number: 11527673
    Abstract: An embodiment includes a method of texturing a semiconductor substrate, a semiconductor substrate manufactured using the method, and a solar cell including the semiconductor substrate, the method including: forming metal nanoparticles on a semiconductor substrate, primarily etching the semiconductor substrate, removing the metal nanoparticles, and secondarily etching the primarily etched semiconductor substrate to form nanostructures.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: December 13, 2022
    Assignee: Korea Institute of Science and Technology
    Inventors: Doh Kwon Lee, In Ho Kim, Won Mok Kim, Jong Keuk Park, Taek Sung Lee, Doo Seok Jeong, Hyeon Seung Lee, Jeung Hyun Jeong
  • Patent number: 11520228
    Abstract: A method of processing a layer structure with a semiconductor layer to form metasurface structures is disclosed. The method relies on a layer structure that includes a substrate, a layer stack, and resist structures. The latter are made of a resist material that includes a semiconductor element. The layer stack is arranged on top of the substrate. The resist structures form a pattern on the layer stack. The layer stack includes: a semiconductor layer (arranged on top of the substrate); a protective layer (arranged on top of the semiconductor layer); and a transfer layer (arranged on top of the protective layer). The layer structure is obtained by forming the layer stack on top of the substrate, wherein the protective layer is deposited using an atomic-layer deposition process.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: December 6, 2022
    Assignee: International Business Machines Corporation
    Inventors: Ute Drechsler, Emanuel Marc Löertscher
  • Patent number: 11515193
    Abstract: An etching apparatus includes a reaction chamber having an internal space; an upper electrode in the reaction chamber; a fixing chuck in the internal space of the reaction chamber and below the upper electrode; an electrostatic chuck above the fixing chuck and on which a wafer is configured to be placed; a focus ring surrounding the electrostatic chuck; and a plurality of sealing members configured to seal cooling gas provided to the focus ring and being in contact with the focus ring. The plurality of sealing members may be formed of a porous material. Each of the plurality of sealing members may include a body portion and an outer surface surrounding the body portion. Only the body portion may include voids and the outer surface may be smooth and free of voids.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: November 29, 2022
    Inventors: Kuihyun Yoon, Jaehak Lee, Yunhwan Kim, Jongkeun Lee, Kyohyeok Kim, Jewoo Han
  • Patent number: 11515167
    Abstract: Provided is a plasma etching method which enables etching with high accuracy while controlling and reducing surface roughness of a transition metal film. The etching is performed for the transition metal film, which is formed on a sample and contains a transition metal element, by a first step of isotropically generating a layer of transition metal oxide on a surface of the transition metal film while a temperature of the sample is maintained at 100° C. or lower, a second step of raising the temperature of the sample to a predetermined temperature of 150° C. or higher and 250° C. or lower while a complexation gas is supplied to the layer of transition metal oxide, a third step of subliming and removing a reactant generated by an reaction between the complexation gas and the transition metal oxide formed in the first step while the temperature of the sample is maintained at 150° C. or higher and 250° C. or lower, and a fourth step of cooling the sample.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: November 29, 2022
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Sumiko Fujisaki, Yoshihide Yamaguchi, Hiroyuki Kobayashi, Kazunori Shinoda, Kohei Kawamura, Yutaka Kouzuma, Masaru Izawa
  • Patent number: 11499099
    Abstract: This disclosure relates to etching compositions containing 1) at least one oxidizing agent; 2) at least one chelating agent; 3) at least one organic solvent; 4) at least one amine compound; and 5) water.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: November 15, 2022
    Assignee: Fujifilm Electronic Materials U.S.A., Inc.
    Inventors: Kazutaka Takahashi, Tomonori Takahashi, William A. Wojtczak
  • Patent number: 11501957
    Abstract: Process chambers and methods for calibrating components of a processing chamber while the chamber volume is under vacuum are described. The process chamber includes a motor shaft connected to the process chamber with a plurality of motor bolts. A support plate is positioned under the chamber floor to accommodate for deflection of the chamber floor due to vacuum conditions within the chamber volume. A bellows assembly extending from the chamber floor to the support plate maintains vacuum conditions within the chamber.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: November 15, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Gopu Krishna, Alexander S. Polyak, Sanjeev Baluja