Abstract: A manufacturing method of a semiconductor device includes etching a film using etching gas that has a first or second molecule which has a C3F4 group and in which the number of carbon atoms is four or five. Further, the first molecule has an R1 group that bonds to a carbon atom in the C3F4 group through a double bond, and the R1 group contains carbon and also chlorine, bromine, iodine, or oxygen. Further, the second molecule has an R2 group that bonds to a carbon atom in the C3F4 group through a single bond and an R3 group that bonds to the carbon atom in the C3F4 group through a single bond, the R2 group or the R3 group or both containing carbon, and both the R2 group and the R3 group containing hydrogen, fluorine, chlorine, bromine, iodine, or oxygen.
Abstract: Provided is a substrate placing table (15) capable of reducing influences of external factors such as the temperature inside a chamber (11). The substrate placing table (15) disposed in the chamber (11) in a plasma processing apparatus (1) includes an electrostatic chuck (61) and a cooling jacket (62), and the electrostatic chuck (61) consists of an upper disk part (61a) having an electrode (71) for electrostatic attraction incorporated therein, and a lower disk part (61b) having a greater diameter than the upper disk part (61a) and having a heater (72) incorporated therein.
Abstract: A technique improves selectivity in etching of a silicon-containing film over etching of a mask in plasma etching. A substrate processing method includes placing a substrate in a chamber in a plasma processing apparatus. The substrate includes a silicon-containing film and a mask on the silicon-containing film. The substrate processing method further includes generating plasma from a first process gas containing a hydrogen fluoride gas in the chamber. The generating plasma includes etching the silicon-containing film with a chemical species contained in the plasma. A flow rate of the hydrogen fluoride gas is at least 25 vol % of a total flow rate of the non-inert components of the first process gas.
Abstract: An apparatus and method of processing a workpiece is disclosed, where a coating is applied to a workpiece and the workpiece is subsequently subjected to an etching process. These processes are performed by one semiconductor processing apparatus while the workpiece is scanned relative to the apparatus. A precursor is applied to the workpiece by the apparatus. The apparatus then uses plasma, heat or ultraviolet radiation to activate the precursor to form a coating. After the coating is applied, the apparatus is configured to perform the etching process. In certain embodiments, the etching process is a directional etching process.
Abstract: An object of the present invention is to provide a plasma processing method capable of removing complex depositions of metal and non-metal deposited in a processing chamber by etching processing of a wafer to reduce generation of particle due to the depositions, in a plasma processing method for plasma-etching the wafer such as a semiconductor substrate. According to the present invention, there is provided a plasma processing method for plasma-etching a sample in a processing chamber and plasma-cleaning the inside of the processing chamber, the method comprising: an etching step for plasma-etching a predetermined number of the samples; a metal removing step of removing a deposited film containing a metal element by using a plasma after the etching step; and a non-metal removing step of removing the deposited film containing the non-metal element by using a plasma different from the plasma in the metal removing step, in which the metal removing step and the non-metal removing step are repeated twice or more.
Abstract: A semiconductor structure includes a base layer with a top surface and a plurality of processed areas. A primary pattern is disposed on the top surface of the base layer, wherein the primary pattern has a pattern top surface, a processed area on the pattern top surface, and a sidewall, and the primary pattern has a first critical dimension, and the processed areas are on the part of the top surface of the base layer exposed by the primary pattern. A secondary pattern is disposed on the sidewall of the primary pattern, wherein the secondary pattern has a second critical dimension, and the second critical dimension is smaller than the first critical dimension.
Abstract: The present invention relates to a method of manufacturing a mold for a diffraction grating light guide plate by using two mask films, the mold having first to fourth pattern portions provided on one surface thereof, and to a method of manufacturing a diffraction grating light guide plate.
Type:
Grant
Filed:
June 18, 2019
Date of Patent:
May 31, 2022
Assignee:
LG CHEM, LTD
Inventors:
Eun Kyu Her, Song Ho Jang, Chung Wan Kim, Bu Gon Shin, Jeong Ho Park, Jung Hwan Yoon, So Young Choo
Abstract: The present invention relates to the field of semiconductor technology and provides a method for forming an MEMS cavity structure, which can improve process yield for MEMS integration and encapsulation for functional stability and reliability of the MEMS structure. The method includes steps of: forming an adhesion material layer on a bottom layer; forming a bottom layer on a substrate; forming a adhesion material layer on the bottom layer; forming a support structure and a sacrificial layer that is filled in a space surrounded by the support structure on the adhesion material layer; forming a capping layer on the support structure and the sacrificial layer, and the bottom layer, the support structure and the capping layer together defining a cavity; and releasing the sacrificial layer and the adhesion material layer to form the cavity structure.
Type:
Grant
Filed:
January 29, 2021
Date of Patent:
May 17, 2022
Assignee:
AAC Technologies Pte. Ltd.
Inventors:
Wooicheang Goh, Shrowthi S. N. Bharadwaja, Kahkeen Lai
Abstract: Apparatuses and methods to manufacture integrated circuits are described. A method of forming film on a substrate is described. The film is formed on a substrate by exposing a substrate to a diamond-like carbon precursor having an sp3 content of greater than 40 percent. Methods of etching a substrate are described. Electronic devices comprising a diamond-like carbon film are also described.
Type:
Grant
Filed:
July 7, 2020
Date of Patent:
May 17, 2022
Assignee:
Applied Materials, Inc.
Inventors:
Eswaranand Venkatasubramanian, Samuel E. Gottheim, Pramit Manna, Abhijit Basu Mallick
Abstract: A plasma processing system includes a radio-frequency (RF) power source unit configured to generate three RF powers; a process chamber to which a process gas supplied and to which the RF powers are applied to generate a plasma; and an impedance matcher between the RF power source unit and the process chamber, the impedance matcher configured to adjust an impedance. The RF power source unit may include a first RF power source connected to a first electrode located in a lower portion of the process chamber to apply a first RF power having a first frequency, a second RF power source connected to the first electrode and to apply a second RF power having a second frequency, and a third RF power source connected to a second electrode located in an upper portion of the process chamber and to apply a third RF power having a third frequency.
Type:
Grant
Filed:
November 16, 2020
Date of Patent:
May 10, 2022
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Jaewon Jeong, Daebeom Lee, Juho Lee, Junghyun Cho
Abstract: Shallow Trench Isolation (STI) chemical mechanical planarization (CMP) polishing compositions, methods and systems of use therefore are provided. The CMP polishing composition comprises abrasives of ceria coated inorganic metal oxide particles, such as ceria-coated silica; and dual chemical additives for providing high oxide film removal rate. The dual chemical additives comprise gelatin compounds possessing negative and positive charges on the same molecule, and non-ionic organic molecules having multi hydroxyl functional groups in the same molecule.
Type:
Grant
Filed:
January 8, 2020
Date of Patent:
May 10, 2022
Assignee:
VERSUM MATERIALS US, LLC
Inventors:
Xiaobo Shi, Krishna P. Murella, Joseph D. Rose, Hongjun Zhou, Mark Leonard O'Neill
Abstract: Embodiments provide a non-plasma etch, such as a gas-phase and/or remote plasma etch, of titanium-containing material layers with tunable selectivity to other material layers. A substrate is received within a process chamber, and the substrate has exposed material layers including a titanium-containing material layer and at least one additional material layer. The additional material layer is selectively etched with respect to the titanium-containing material layer by exposing the substrate to a controlled environment including a halogen-containing gas. For one embodiment, the halogen-containing gas includes a fluorine-based gas. For one embodiment, the titanium-containing material layer is a titanium or a titanium nitride material layer. For one embodiment, the additional material layer includes tungsten, tungsten oxide, hafnium oxide, silicon oxide, silicon-germanium, silicon, silicon nitride, and/or aluminum oxide.
Abstract: Tin oxide film on a semiconductor substrate is etched selectively in a presence of silicon (Si), carbon (C), or a carbon-containing material (e.g., photoresist) by exposing the substrate to a process gas comprising hydrogen (H2) and a hydrocarbon. The hydrocarbon significantly improves the etch selectivity. In some embodiments an apparatus for processing a semiconductor substrate includes a process chamber configured for housing the semiconductor substrate and a controller having program instructions on a non-transitory medium for causing selective etching of a tin oxide layer on a substrate in a presence of silicon, carbon, or a carbon-containing material by exposing the substrate to a plasma formed in a process gas that includes H2 and a hydrocarbon.
Type:
Grant
Filed:
November 18, 2019
Date of Patent:
May 3, 2022
Assignee:
Lam Research Corporation
Inventors:
Jengyi Yu, Samantha S. H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
Abstract: System and method for decapsulation of plastic integrated circuit packages by providing a microwave generator, providing a Beenakker resonant cavity connected to the microwave generator, which cavity comprises a coupling antenna loop, providing the cavity with a tube or tubes for supply of plasma gas and etchant gas or gases and with means for igniting the plasma gas, and providing that the cavity is set at a predefined value of its Q factor by embodying the coupling antenna loop and/or a wire optionally attached to the coupling antenna loop in a metal or metal alloy, or providing that at least at part of its surface area the coupling antenna loop and/or the wire is coated with a metal or metal alloy different than copper and with a higher resistivity than copper.
Abstract: The present disclosure provides a method for transfer and assembly of RGB micro-light-emitting diodes using vacuum suction force whereby the vacuum state of micrometer-sized adsorption holes to which micro-light-emitting diodes formed on a mother substrate or a temporary substrate are bonded is controlled selectively, so that only the micro-light-emitting diode devices desired to be detached from the mother substrate or the temporary substrate are detached from the mother substrate or the temporary substrate using vacuum suction force and then transferred to a target substrate.
Type:
Grant
Filed:
December 26, 2019
Date of Patent:
April 5, 2022
Assignee:
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventors:
Keon Jae Lee, Han Eol Lee, Tae Jin Kim, Jung Ho Shin, Sang Hyun Park
Abstract: In a method of forming pattern, a target layer is formed on a semiconductor substrate, and pluralities of first spacers having cylindrical shapes protruding from the target layer are formed. A second spacer layer is formed to cover the first spacers, provide interstitial spaces between the first spacers, and provide second inner spaces within first inner spaces of the first spacers, respectively. The second spacer layer is etched to form first opening portions in which the second inner spaces and the interstitial spaces extend into the target layer.
Abstract: A method for forming a cutting tool includes masking a metal base with one or more masks, the one or more masks including at least one variable permeability mask, and chemically etching the masked metal base to form a blade of the cutting tool.
Type:
Grant
Filed:
September 27, 2019
Date of Patent:
March 29, 2022
Assignee:
MOUND LASER & PHOTONICS CENTER, INC.
Inventors:
Paul V. Pesavento, Peter F. Ladwig, Michael W. Davis, John A. Theget, Kurt C. Swanson, Joel B. Michaletz, Philip W. Anderson, Timothy A. McDaniel, Patrick R. LaLonde
Abstract: A composition for forming a resist underlayer film for lithography, the resist underlayer film for lithography containing silicon and being dissolved and removed with an alkaline developer in accordance with a resist pattern together with an upper layer resist during development of the upper layer resist, the composition comprising a component, which is a silane compound containing a hydrolyzable silane, a hydrolysate of the silane, a hydrolytic condensate of the silane, or any combination of these, and an element, which is an element of causing dissolution in an alkaline developer. The element, which is an element of causing dissolution in an alkaline developer, is contained in the structure of the compound as the component. The element, which is an element of causing dissolution in an alkaline developer, is a photoacid generator.
Abstract: Systems and methods for processing a workpiece are provided. In one example, a method includes placing a workpiece on a workpiece support in a processing chamber. The workpiece has at least one material layer and at least one structure thereon. The method includes admitting a process gas into a plasma chamber, generating one or more species from the process gas, and filtering the one or more species to create a filtered mixture. The method further includes providing RF power to a bias electrode to generate a second mixture and exposing the workpiece to the second mixture to etch a least a portion of the material layer and to form a film on at least a portion of the material layer.
Abstract: An etching method includes preparing a compound; and etching an etching target in an environment in which the compound is present. The etching of the etching target includes: etching the etching target in an environment in which hydrogen (H) and fluorine (F) are present when the etching target contains silicon nitride (SiN); and etching the etching target in an environment in which nitrogen (N), hydrogen (H) and fluorine (F) are present when the etching target contains silicon (Si). The compound contains an element that forms an anion of an acid stronger than hydrogen fluoride (HF) or contains an element that forms a cation of a base stronger than ammonia (NH3).
Type:
Grant
Filed:
May 31, 2019
Date of Patent:
March 8, 2022
Assignee:
TOKYO ELECTRON LIMITED
Inventors:
Maju Tomura, Yoshihide Kihara, Masanobu Honda