Abstract: A distributed deep neural net (DNN) utilizing a distributed, tile-based architecture includes multiple chips, each with a central processing element, a global memory buffer, and a plurality of additional processing elements. Each additional processing element includes a weight buffer, an activation buffer, and vector multiply-accumulate units to combine, in parallel, the weight values and the activation values using stationary data flows.

Abstract: The present invention provides a polishing composition for use in polishing a material having a Vickers hardness of 1500 Hv or higher. The polishing composition comprises an alumina abrasive and water. The alumina abrasive has an isoelectric point that is below 8.0 and is lower than the pH of the polishing composition.

Abstract: A plasma processing apparatus includes a chamber, a substrate support, a radio-frequency power supply, and a controller. The substrate support includes a lower electrode and is disposed in the chamber to mount a focus ring to surround a disposed substrate on the substrate support. The radio-frequency power supply supplies a bias radio-frequency power to the lower electrode. The controller causes specifying a power level of the bias radio-frequency power corresponding to a specified value of the DC potential of the focus ring by using a table or a function that defines a relationship between the power level of the bias radio-frequency power and the DC potential of the focus ring generated by supplying the bias radio-frequency power to the lower electrode, and controlling the radio-frequency power supply to supply the bias radio-frequency power having the specified power level to the lower electrode during a plasma generation in the chamber.

Abstract: Use of a chemical mechanical polishing (CMP) composition (Q) for chemical mechanical polishing of a substrate (S) comprising (i) cobalt and/or (ii) a cobalt alloy, wherein the CMP composition (Q) comprises (A) Inorganic particles (B) an anionic surfactant of the general formula (I) R-S wherein R is C5-C20-alkyl, C5-C20-alkenyl, C5-C20-alkylacyl or C5-C20-alkenylacyl and S is a sulfonic acid derivative, an amino acid derivative or a phosphoric acid derivative or salts or mixtures thereof (C) at least one amino acid, (D) at least one oxidizer (E) an aqueous medium and wherein the CMP composition (Q) has a pH of from 7 to 10.

Abstract: The present invention relates to a process for manufacturing glass sheets with diffuse finish and the resulting glass sheet by this process. The glass sheet is subjected to a series of alternate immersions in acidic solutions and alkaline solutions to remove impurities and waste and to generate a diffuse finish on both sides of the glass sheet. The process generates in the glass sheet in at least one side, a diffuse surface with a peak to valley roughness (Rt) of between 5.8343 ?m and 9.3790 ?m; an average roughness (Ra) value between 0.8020 ?m and 0.9538 ?m; an RMS roughness between 0.9653 ?m and 1.1917 ?m; a solar transmission between 84.8% and 46.50%; a solar reflection between 7.4 and 4.4%; a light transmission between 88.5% and 67.70%; a reflection of light between 6.50% and 5.20%; and UV transmission between 35.60% and 70.20%.

Abstract: According to one or more embodiments, a method for forming an etching mask includes forming a mask layer including a first organic material on a processing object, processing the mask layer to form a pattern including an opening, exposing the mask layer to a first oxidizing gas containing a first metal material such that the first metal material penetrates into the mask layer, and then exposing the mask layer to a first oxidizing gas including hydrogen peroxide or ozone to oxidize the first metal material.

Abstract: The invention has been made in view of the above problems, and provides a plasma processing method capable of preventing etching shape abnormality in a plasma processing method for forming a mask layer of a polysilicon film. The invention relates to a plasma processing method for plasma-etching a polysilicon film, the plasma processing method comprising plasma-etching the polysilicon film using a mixed gas including a halogen gas, a fluorocarbon gas, an oxygen gas, and a carbonyl sulfide gas.

Abstract: A method comprises: disposing an ashing resistive layer over a multi-layered mask; sequentially disposing a first and second dummy layer on the ashing resistive layer; sequentially forming a first pattern structure and a second pattern structure there-over over the second dummy layer; recessing the second dummy layer, through the first and the second pattern structure, to partially expose the first dummy layer and to form a target pattern structure defining a target pattern; performing an anisotropic etching process, through the target pattern structure, to recess the exposed portions of the first dummy layer such that the target pattern is transferred to the recessed first dummy layer; performing an ashing process to remove the target pattern structure; and performing a pattern transferring process by recessing the ashing resistive layer and the multi-layered mask through the recessed first dummy layer to transfer the target pattern to the multi-layered mask.

Abstract: The present invention discloses STI CMP polishing compositions, methods and systems that significantly reduce oxide trench dishing and improve over-polishing window stability in addition to provide high and tunable silicon oxide removal rates, low silicon nitride removal rates, and tunable high selectivity of SiO2:SiN through the use of an unique combination of ceria inorganic oxide particles, such as ceria coated silica particles as abrasives, and an oxide trench dishing reducing additive of poly(methacrylic acids), its derivatives, its salts, or combinations thereof.

Abstract: A plasma processing method according to an exemplary embodiment includes generating plasma from a film formation gas in a chamber of a plasma processing apparatus by supplying radio frequency power from a radio frequency power source. The plasma processing method further includes forming a protective film on an inner wall surface of a side wall of the chamber by depositing a chemical species from the plasma on the inner wall surface. In the forming a protective film, a pulsed negative direct-current voltage is periodically applied from a direct-current power source device to an upper electrode of the plasma processing apparatus.

Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.

Abstract: Apparatus and methods to process one or more wafers are described. A first processing station has a first gas flow pattern from one or more of a first gas diffuser, a first cooling channel pattern, or a first heater. A second processing station has a second gas flow pattern from one or more of a second gas diffuser, a second cooling channel pattern, or a second heater. The second gas diffuser, the second cooling channel pattern, or the second heater is rotated or translated relative to the first gas diffuser, the first cooling channel pattern, or the first heater to provide the second gas flow pattern complementary to the first gas flow pattern.

Abstract: In a capacitively coupled etch reactor, in which the smaller electrode is etched, the larger electrode is electrically supplied by a very high frequency supply signal and by a high frequency supply signal. The smaller electrode, acting as a substrate carrier, is connected to ground potential.

Abstract: A method for DRIE matched release and/or the mitigation of photo resist pooling, comprising: depositing a first mask layer over a first surface of a silicon substrate; exposing a first portion and second portion of the first mask layer to a first etch process, wherein the exposing forms a first exposed layer; depositing a second mask layer over the first mask layer; exposing a third portion of the second mask layer to a second etch process, wherein the exposing forms a second exposed mask layer, and wherein the third portion overlaps the first portion of the first mask layer; developing the second mask layer and etching the third portion of the second mask layer and developing the first portion of the first mask layer; etching the first portion of the first mask layer to a first depth; and developing the first mask layer to reveal exposed portions of the first mask layer and etching the second portion of the silicon substrate to a second depth.

Abstract: According to one embodiment, a polymer material is disclosed. The polymer material contains a polymer. The polymer contains a first monomer unit having a lone pair and an aromatic ring at a side chain, and a second monomer unit including a crosslinking group at a terminal of the side chain, with its molar ratio of 0.5 mol % to 10 mol % to all monomer units in the polymer. The polymer material can be used for manufacturing a composite film as a mask pattern for processing a target film on a substrate. The composite film can be formed by a process including, forming an organic film on the target film with the polymer material, patterning the organic film, and forming the composite film by impregnating a metal compound into the patterned organic film.

Abstract: Embodiments herein describe a sub-micron 3D diffractive optics element and a method for forming the sub-micron 3D diffractive optics element. In a first embodiment, a method is provided for forming a sub-micron 3D diffractive optics element on a substrate without planarization. The method includes depositing a material stack to be patterned on a substrate, depositing and patterning a thick mask material on a portion of the material stack, etching the material stack down one level, trimming a side portion of the thick mask material, etching the material stack down one more level, repeating trim and etch steps above ‘n’ times, and stripping the thick mask material from the material stack.

Abstract: A method for processing semiconductor wafer is provided. The method includes supplying a processing gas into an etching chamber containing a semiconductor wafer. The method also includes detecting a pressure in the etching chamber. The method further includes regulating an exhaust flow from the etching chamber by adjusting an open ratio of a valve according to a data in relation to a pressure in the etching chamber produced by the pressure sensor. In addition, the method includes determining an etching endpoint based on the open ratio of the valve.

Abstract: A decrease of an etching rate of a substrate can be suppressed, and energy of ions irradiated to an inner wall of a chamber main body can be reduced. A plasma processing apparatus includes a DC power supply configured to generate a negative DC voltage to be applied to a lower electrode of a stage. In a plasma processing performed by using the plasma processing apparatus, a radio frequency power is supplied to generate plasma by exciting a gas within a chamber. Further, the negative DC voltage from the DC power supply is periodically applied to the lower electrode to attract ions in the plasma onto the substrate placed on the stage. A ratio occupied, within each of cycles, by a period during which the DC voltage is applied to the lower electrode is set to be equal to or less than 40%.

Abstract: An apparatus of plasma processing includes a substrate support and a focus ring that are arranged in a chamber. The focus ring surrounds a substrate on the substrate support. The focus ring has a first region and a second region. The first region includes an inner top surface of the focus ring. The second region includes an outer top surface of the focus ring. The inner top surface extends at a position closer to the central axis of the focus ring than the outer top surface. The focus ring is configured such that an absolute value of a negative DC bias potential in the first region becomes greater than an absolute value of a DC potential in the second region during plasma generation in the chamber.

Abstract: Processes for removing photoresist layer(s) from a workpiece, such as a semiconductor are provided. In one example implementation, a method for processing a workpiece can include supporting a workpiece on a workpiece support. The workpiece can have a photoresist layer and a low-k dielectric material layer. The method can include performing a hydrogen radical etch process on the workpiece to remove at least a portion of the photoresist layer. The method can also include exposing the workpiece to an ozone process gas to remove at least a portion of the photoresist layer.