Patents Examined by Latanya N Crawford Eason
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Patent number: 11844288Abstract: An in-plane magnetized spin-orbit magnetic device is provided. The in-plane magnetized spin-orbit magnetic device includes a heavy metal layer, an upper electrode and a magnetic tunnel junction. The magnetic tunnel junction is disposed between the heavy metal layer and the upper electrode. The magnetic tunnel junction includes a free layer and a pinned layer. The free layer is disposed on the heavy metal layer, and the free layer has a first film plane area. The pinned layer is disposed on the free layer, and the pinned layer has a second film plane area. There is a preset angle between a long axis direction of a film plane shape of the free layer and a long axis direction of a film plane shape of the pinned layer, and the first film plane area is larger than the second film plane area.Type: GrantFiled: February 4, 2021Date of Patent: December 12, 2023Assignee: Industrial Technology Research InstituteInventors: Hsin-Han Lee, Jeng-Hua Wei, I-Jung Wang, Shan-Yi Yang, Yao-Jen Chang
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Patent number: 11837523Abstract: A transistor package comprising: a substrate; a first transistor in thermal contact with the substrate, wherein the transistor comprises a gate; the substrate sintered to a heat sink through a sintered layer; an encapsulant that at least partially encapsulates the first transistor; and a Kelvin connection to the transistor gate.Type: GrantFiled: October 14, 2022Date of Patent: December 5, 2023Assignee: Tesla, Inc.Inventors: Wenjun Liu, Robert James Ramm, Alan David Tepe, Colin Kenneth Campbell, Dino Sasaridis
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Patent number: 11832531Abstract: A spin-orbit torque magnetization rotational element includes: a first insulating layer with first and second openings; a first conductive portion formed inside the first opening; a second conductive portion formed inside the second opening; a spin-orbit torque wiring located in a first direction and extends in a second direction over the first and second conductive portions; and a first ferromagnetic layer located on the side opposite to the first insulating layer in the spin-orbit torque wiring, wherein the first conductive portion includes a first surface facing the spin-orbit torque wiring, a second surface facing the first surface and is located at a position farther from the spin-orbit torque wiring than the first surface, and a side surface connecting the first surface and the second surface, and the side surface includes a continuous major surface and a third surface inclined or curved and is discontinuous with respect to the major surface.Type: GrantFiled: January 31, 2019Date of Patent: November 28, 2023Assignee: TDK CORPORATIONInventors: Tomoyuki Sasaki, Yohei Shiokawa
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Patent number: 11810943Abstract: A light-emitting device, includes a substrate, including an upper surface; a first light emitting unit and a second light emitting unit, formed on the upper surface, wherein each of the first light emitting unit and the second light emitting unit includes a lower semiconductor portion and an upper semiconductor portion; and a conductive structure electrically connecting the first light emitting unit and the second light emitting unit; wherein the lower semiconductor portion of the first light emitting unit includes a first sidewall and a first upper surface; and wherein the first side wall includes a first sub-side wall and a second sub-side wall, an obtuse angle is formed between the first sub-side wall and the first upper surface and another obtuse angle is formed between the second sub-side wall and the upper surface.Type: GrantFiled: September 1, 2022Date of Patent: November 7, 2023Assignee: EPISTAR CORPORATIONInventors: Po-Shun Chiu, Tsung-Hsun Chiang, Liang-Sheng Chi, Jing Jiang, Jie Chen, Tzung-Shiun Yeh, Hsin-Ying Wang, Hui-Chun Yeh, Chien-Fu Shen
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Patent number: 11810854Abstract: A semiconductor device includes a first level having a plurality of transistor devices, and a first wiring level positioned over the first level. The first wiring level includes a plurality of conductive lines extending parallel to the first level, a plurality of conductive vertical interconnects extending perpendicular to the first level, and one or more programmable vertical interconnects that extend perpendicular to the first level and include a programmable material having a modifiable resistivity in that the one or more programmable vertical interconnects change between being conductive and being non-conductive according to a current pattern.Type: GrantFiled: August 8, 2019Date of Patent: November 7, 2023Assignee: Tokyo Electron LimitedInventors: Mark I. Gardner, H. Jim Fulford, Anton J. deVilliers
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Patent number: 11805706Abstract: A magnetoresistance effect element includes: a laminate body including a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer located between the first ferromagnetic layer and the second ferromagnetic layer; and a spin-orbit torque wiring connected to the laminate body. A second surface opposite to a first surface of the spin-orbit torque wiring in contact with the laminate body is curved in a first direction orthogonal to a direction in which the laminate body is laminated.Type: GrantFiled: March 4, 2021Date of Patent: October 31, 2023Assignee: TDK CORPORATIONInventor: Eiji Komura
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Patent number: 11805705Abstract: A magnetic memory device includes a spin-orbit torque (SOT) induction structure which may be strained and seedless and formed with a perpendicular magnetic anisotropy. A magnetic tunnel junction (MTJ) stack is disposed over the SOT induction structure. A spacer layer may decouple layers between the SOT induction structure and the MTJ stack or decouple layers within the MTJ stack. One end of the SOT induction structure may be coupled to a first transistor and another end of the SOT induction structure coupled to a second transistor.Type: GrantFiled: January 8, 2021Date of Patent: October 31, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shy-Jay Lin, Chien-Min Lee, MingYuan Song
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Patent number: 11804572Abstract: A solid-state light-emitting device includes: a substrate; an epitaxial layer structure on the substrate and including a first-type area and a second-type area; a first current blocking layer disposed on the epitaxial layer structure and located in the first-type area; a current spreading layer covering the first current blocking layer so that the first current blocking layer is located between the current spreading layer and the epitaxial layer structure; a first adhesive reinforcing layer disposed on a side of the current spreading layer away from the first current blocking layer and including a plurality of first through holes; a first electrode disposed on a side of the first adhesion reinforcing layer away from the current spreading layer and filled into the plurality of first through holes to electrically contact with the current spreading layer. Therefore, the light-emitting efficiency of the solid-state light-emitting device is improved.Type: GrantFiled: December 31, 2020Date of Patent: October 31, 2023Assignee: KAISTAR LIGHTING (XIAMEN) CO., LTD.Inventor: Tsung-Hong Lu
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Patent number: 11804583Abstract: A light emitting device including a substrate, a first pad, a second pad, a light emitting diode, a first connection structure, a second connection structure, and a patterned adhesive layer and a method for manufacturing the same are provided. The first pad and the second pad are located on the substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are respectively connected to the first semiconductor layer and the second semiconductor layer. The first connection structure electrically connects the first electrode to the first pad. The second connection structure electrically connects the second electrode to the second pad. The patterned adhesive layer is located between the substrate and the light emitting diode and does not contact the first connection structure and the second connection structure.Type: GrantFiled: November 20, 2020Date of Patent: October 31, 2023Assignee: Au Optronics CorporationInventors: Fang-Cheng Yu, Cheng-Chieh Chang, Cheng-Yeh Tsai
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Patent number: 11800754Abstract: A display apparatus having an opening ratio that provides a high resolution and improved luminous quality and including: a substrate; a first driving thin-film transistor (TFT) and a first storage capacitor, the first storage capacitor for emitting light of a first color and on the substrate; a data wiring unit including a first data line, a second data line, and a third data line, at a first side of the first storage capacitor, extending along a first direction and spaced apart from one another along a second direction, intersecting the first direction, by a predetermined distance; a driving voltage line at a second side of the first storage capacitor and extending along the first direction; and a first pixel electrode electrically connected to the first driving TFT.Type: GrantFiled: October 9, 2019Date of Patent: October 24, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Sungjae Moon, Dongwoo Kim, Junhyun Park, Ansu Lee, Kangmoon Jo
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Patent number: 11791294Abstract: The present application discloses a method for fabricating semiconductor device with a stress relief structure. The method includes providing a substrate, forming an intrinsically conductive pad above the substrate, and forming a stress relief structure above the substrate and distant from the intrinsically conductive pad.Type: GrantFiled: December 14, 2021Date of Patent: October 17, 2023Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Tse-Yao Huang
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Patent number: 11778925Abstract: A magnetic device includes a stacked body including a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer sandwiched between the first ferromagnetic layer and the second ferromagnetic layer; a first insulating layer which covers side surfaces of the stacked body; and a radiator located outside the first insulating layer with respect to the stacked body, in which a distance between the stacked body and the radiator differs depending on a position of the stacked body in a stacking direction.Type: GrantFiled: February 9, 2021Date of Patent: October 3, 2023Assignee: TDK CORPORATIONInventors: Zhenyao Tang, Yohei Shiokawa, Tomoyuki Sasaki
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Patent number: 11765984Abstract: A memory device is provided. The memory device includes a substrate, a spin-orbit torque layer and a magnetic tunneling junction (MTJ). The MTJ stacks with the spin-orbit torque layer over the substrate and includes a synthetic free layer, a barrier layer and a reference layer. The synthetic free layer includes a synthetic antiferromagnetic structure, a first spacer layer and a free layer, wherein the synthetic antiferromagnetic structure is disposed between the spin-orbit torque layer and the free layer. The barrier layer is disposed beside the synthetic free layer. The reference layer is disposed beside the barrier layer.Type: GrantFiled: June 22, 2021Date of Patent: September 19, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Lin Huang, Ming-Yuan Song, Chien-Min Lee, Shy-Jay Lin
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Patent number: 11756993Abstract: An apparatus comprising an insulated gate bipolar transistor and a super junction metal-oxide semiconductor field effect transistor wherein the insulated gate bipolar transistor and the super-junction metal-oxide semiconductor field effect transistor are electrically and optionally structurally coupled.Type: GrantFiled: May 4, 2022Date of Patent: September 12, 2023Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Madhur Bobde, Lingpeng Guan, Karthik Padmanabhan, Bum-Seok Suh
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Patent number: 11749783Abstract: A light emitting device includes first and second electrodes disposed on a substrate and spaced apart from each other; at least one light emitting diode disposed between the first and second electrodes; an insulating pattern overlapping an upper portion of the at least one light emitting diode and exposing first and second ends of the at least one light emitting diode; a first contact electrode electrically connecting the first end of the at least one light emitting diode to the first electrode; and a second contact electrode electrically connecting the second end of the at least one light emitting diode to the second electrode. The insulating pattern may completely overlap the first and second ends of the at least one light emitting diode in a plan view, and have a width reducing toward a lower portion of the insulating pattern.Type: GrantFiled: January 17, 2019Date of Patent: September 5, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Veidhes Basrur, Xinxing Li, Hee Keun Lee, Chang Il Tae, Tae Jin Kong, Myeong Hee Kim
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Patent number: 11744163Abstract: A spin-orbit-torque type magnetoresistance effect element includes: a first ferromagnetic layer; a second ferromagnetic layer; a non-magnetic layer which is located between the first ferromagnetic layer and the second ferromagnetic layer; and a spin-orbit-torque wiring which has the first ferromagnetic layer laminated thereon, wherein the spin-orbit-torque wiring extends in a second direction intersecting a first direction corresponding to an orthogonal direction of the first ferromagnetic layer, wherein the first ferromagnetic layer includes a first laminated structure and an interface magnetic layer in order from the spin-orbit-torque wiring, wherein the first laminated structure is a structure in which a ferromagnetic conductor layer and an inorganic compound containing layer are disposed in order from the spin-orbit-torque wiring, wherein the ferromagnetic conductor layer contains a ferromagnetic metal element, and wherein the inorganic compound containing layer contains at least one inorganic compound seType: GrantFiled: July 22, 2020Date of Patent: August 29, 2023Assignee: TDK CORPORATIONInventor: Yohei Shiokawa
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Patent number: 11730064Abstract: A magnetic memory device including a lower electrode on a substrate; a conductive line on the lower electrode; and a magnetic tunnel junction pattern on the conductive line, wherein the conductive line includes a first conductive line adjacent to the magnetic tunnel junction pattern; a second conductive line between the lower electrode and the first conductive line; and a high resistance layer at least partially between the first conductive line and the second conductive line, a resistivity of the second conductive line is lower than a resistivity of the first conductive line, and a resistivity of the high resistance layer is higher than the resistivity of the first conductive line and higher than the resistivity of the second conductive line.Type: GrantFiled: November 17, 2020Date of Patent: August 15, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Chul Lee, Whankyun Kim, Joonmyoung Lee, Junho Jeong
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Patent number: 11715817Abstract: Disclosed in an embodiment is a light-emitting element package comprising: a body including a cavity; a light-emitting element arranged on the bottom surface of the cavity and including a first conductive type semiconductor layer, a second conductive type semiconductor layer and an active layer, which is arranged between the first conductive type semiconductor layer and the second conductive type semiconductor layer; and a light-transmitting member arranged on the upper part of the cavity, wherein the body includes: a lower body including the bottom surface of the cavity; an upper body including the lateral surface of the cavity; and a first insulating layer arranged between the lower body and the upper body, the lower body includes a first conductive body and a second conductive body insulated and arranged together with the first conductive body, the first conductive type semiconductor layer is electrically connected with the first conductive body, the second conductive type semiconductor layer is electricalType: GrantFiled: March 4, 2019Date of Patent: August 1, 2023Assignee: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.Inventor: Koh Eun Lee
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Patent number: 11706999Abstract: Semiconductor device includes pair of active devices, composite spin Hall electrode, and a magnetic tunnel junction. Composite spin Hall electrode is electrically connected to pair of active devices. Magnetic tunnel junction is disposed on opposite side of composite spin hall electrode with respect to pair of active devices. Spin Hall electrode includes pair of heavy metal layers, and spacer layer disposed in between pair of heavy metal layers. Pair of heavy metal layers is made of a heavy metal in a metastable state. Spacer layer comprises first material different from the pair of heavy metal layers.Type: GrantFiled: July 7, 2021Date of Patent: July 18, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Min Lee, Shy-Jay Lin, Yen-Lin Huang, MingYuan Song, Tung Ying Lee
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Patent number: 11694957Abstract: In a semiconductor device, a device structure is positioned over a substrate, where the device structure includes devices. A wiring structure of the semiconductor device is positioned over the substrate and coupled to at least one of the devices. The wiring structure includes at least one of programmable lines and programmable vertical interconnects, where the programmable lines extend along a top surface of the substrate and the programmable vertical interconnects extend along a vertical direction perpendicular to the top surface of the substrate. The programmable lines and the programmable vertical interconnects include a programmable material having a modifiable resistivity in that the programmable lines and the programmable vertical interconnects change between being conductive and being non-conductive in responsive to a current pattern delivered to the programmable lines and the programmable vertical interconnects.Type: GrantFiled: May 15, 2020Date of Patent: July 4, 2023Assignee: Tokyo Electron LimitedInventors: Mark I. Gardner, H. Jim Fulford, Anton J. deVilliers