Abstract: Provided is an X-type 3-terminal STT-MRAM (spin orbital torque magnetization reversal component) having a high thermal stability index ? and a low writing current IC in a balanced manner. A magnetoresistance effect element has a configuration of channel layer (1)/barrier layer non adjacent magnetic layer (2b)/barrier layer adjacent magnetic layer (2a)/barrier layer (3).

Abstract: A method includes forming a first redistribution structure by depositing a first dielectric layer and forming first and second conductive features on the first dielectric layer, the second conductive feature being provided with a gap exposing the first dielectric layer. The method further includes depositing a second dielectric layer on the first and second conductive features; forming first and second openings in the second dielectric layer, the first opening exposing the first conductive feature and the second opening exposing the second conductive feature and the gap; forming a first via on the first conductive feature and partially in the first opening; forming a second via on the second conductive feature and partially in the second opening and the gap; attaching a die to the first redistribution structure adjacent the first via and the second via; and encapsulating the die, the first via, and the second via with an encapsulant.

Abstract: A magnetic flux concentrator (MFC) structure comprises a substrate, a first metal layer disposed on or over the substrate, and a second metal layer disposed on or over the first metal layer. Each metal layer comprises (i) a first wire layer comprising first wires conducting electrical signals, and (ii) a first dielectric layer disposed on the first wire layer. A magnetic flux concentrator is disposed at least partially in the first metal layer, in the second metal layer, or in both the first and the second metal layers. The structure can comprise an electronic circuit or a magnetic sensor with sensing plates. The structure can comprise a transformer or an electromagnet with suitable control circuits. The magnetic flux concentrator can comprise a metal stress-reduction layer in the first or second wire layers and a core formed by electroplating the stress-reduction layer.

Abstract: Semiconductor device includes pair of active devices, composite spin Hall electrode, and a magnetic tunnel junction. Composite spin Hall electrode is electrically connected to pair of active devices. Magnetic tunnel junction is disposed on opposite side of composite spin hall electrode with respect to pair of active devices. Spin Hall electrode includes pair of heavy metal layers, and spacer layer disposed in between pair of heavy metal layers. Pair of heavy metal layers is made of a heavy metal in a metastable state. Spacer layer comprises first material different from the pair of heavy metal layers.

Abstract: A spin-orbit torque magnetoresistance effect element according to the present embodiment includes an element part including a first ferromagnetic layer, a second ferromagnetic layer, and a nonmagnetic layer positioned between the first ferromagnetic layer and the second ferromagnetic layer, a spin-orbit torque wiring positioned in a first direction with respect to the element part, facing the first ferromagnetic layer of the element part, and extending in a second direction, a first conductive part and a second conductive part facing the spin-orbit torque wiring at positions sandwiching the element part when viewed from the first direction, and a gate part positioned between the first conductive part and the second conductive part when viewed from the first direction, facing a second surface of the spin-orbit torque wiring on a side opposite to a first surface which faces the element part, and including a gate insulating layer and a gate electrode in order from a position near the spin-orbit torque wiring, in

Abstract: A magnetoresistive memory cell includes an MTJ element including a magnetization free layer and a pure spin injection source. The pure spin injection source includes a BiSb layer coupled to the magnetization free layer. By flowing an in-plane current through the BiSb layer, this arrangement is capable of providing magnetization reversal of the magnetization free layer.

Abstract: A method of forming microelectronic systems on a flexible substrate includes depositing a plurality of layers on one side of the flexible substrate. Each of the plurality of layers is deposited from one of a plurality of sources. A vertical projection of a perimeter of each one of the plurality of sources does not intersect the flexible substrate. The flexible substrate is in motion during the depositing the plurality of layers via a roll to roll feed and retrieval system.

Abstract: A light-emitting diode structure for improving bonding yield is provided, which includes a light-emitting diode, a plurality of contact electrodes, an insulating layer structure, and a plurality of bonding electrodes. One surface of the light-emitting diode includes a mesa structure. The contact electrodes are on the mesa structure. The bonding electrodes are on the insulating layer structure and respectively cover at least one contact electrode. A surface of one of the bonding electrodes facing away from the light-emitting diode has a first platform and a second platform. The second platform is on the first platform. A surface area of a vertical projection of the second platform on the light-emitting diode is smaller than that of the first platform on the light-emitting diode, and said vertical projection of the second platform is within that of the first platform.

Abstract: A light emitting device including a first LED stack, a second LED stack disposed under the first LED stack, a third LED stack disposed under the second LED stack, and a plurality of pillars disposed adjacent to side surfaces of the first, second, and third LED stacks, the pillars including a first pillar commonly electrically connected to the first, second, and third LED stacks, and a second pillar, a third pillar, and a fourth pillar electrically connected to the first, second, and third LED stacks, respectively.

Abstract: A light-emitting apparatus including a circuit substrate and a light-emitting device is provided. The circuit substrate includes a first electrode and a second electrode. The light-emitting device is disposed on a first surface of the circuit substrate. The light-emitting device includes a first conductive terminal and a second conductive terminal. The first conductive terminal and the second conductive terminal are embedded between the first electrode and the second electrode. In a first direction, there is a first distance between an inner edge of the first electrode and an inner edge of the second electrode, there is a second distance between an outer edge of the first conductive terminal and an outer edge of the second conductive terminal, and the first distance is greater than or equal to the second distance.

Abstract: A method of forming a semiconductor device includes providing a semiconductor substrate with a circuit layer, forming a range compensating layer over the semiconductor substrate, the range compensating layer having a plurality of different thicknesses, each of the plurality of different thicknesses being inversely proportional to a stopping power of structures disposed under the respective thickness of the range compensating layer, implanting ions into the semiconductor substrate, the ions traveling through the range compensating layer and the circuit layer to define a cleave plane in the semiconductor substrate, removing the range compensating layer, and cleaving the semiconductor substrate at the cleave plane. The range compensating layer can be used to compensate for variations in ion penetration depth.

Abstract: A display device includes a substrate, a plurality of pixels, a plurality of inorganic light-emitting elements, and a first light-shielding portion. The pixels are arrayed on the substrate. The inorganic light-emitting elements are provided corresponding to the respective pixels and each have a first side surface and a second side surface opposite to the first side surface. The first light-shielding portion is electrically coupled to the cathode of the corresponding inorganic light-emitting element and prevents output of light traveling in a direction intersecting the first side surface of the inorganic light-emitting element.

Abstract: A flip-chip of light emitting diode includes at least one reflective layer, at least one N-type electrode, at least one P-type electrode, at least one distributed Bragg reflector, and an epitaxial unit. The epitaxial unit includes a substrate, an N-type layer, an active layer, and a P-type layer, wherein the substrate, the N-type layer, the active layer, and the P-type are sequentially stacked. The epitaxial unit has at least one N-type layer exposed portion, which is extended from the outer side surface of the P-type layer to the N-type layer via the active layer. The at least one reflective layer is formed on the P-type layer, wherein the at least one distributed Bragg reflector is integrally bonded to the N-type layer, the active layer, the P-type layer, and the at least one reflective layer. The at least one N-type electrode is electrically connected with the N-type layer and the at least one P-type electrode is electrically connected with the P-type layer.

Abstract: A display panel includes a base layer having a display area and a non-display area including a pad area; a plurality of transistors on the base layer; a first protective layer covering the plurality of transistors; a conductive layer on the first protective layer; a second protective layer over the conductive layer; a first electrode and a second electrode on the second protective layer, the first and second electrodes being spaced from each other; a plurality of light emitting elements between the first electrode and the second electrode; a first contact electrode on the first electrode, the first contact electrode being in contact with one end portion of the light emitting element, and a second contact electrode on the second electrode, the second contact electrode being in contact with the other end portion of the at least one light emitting element; and a first pad in the pad area.

Abstract: An interlayer insulating film has via holes. A sidewall conductive layer is arranged along a sidewall surface of one via hole and contains one or more kinds selected from a group including tungsten, titanium, titanium nitride, tantalum and molybdenum. A second metal wiring layer is embedded in one via hole and contains aluminum. A plug layer is embedded in the other via hole and contains one or more kinds selected from the group including tungsten, titanium, titanium nitride, tantalum and molybdenum.

Abstract: A light emitting drive substrate, a manufacturing method of the light emitting drive substrate, a light emitting substrate and a display device. The light emitting drive substrate includes a first light-emitting subregion, a second light-emitting subregion, a periphery area, a first power supply wire and a second power supply wire. A resistance between the first end and the second end of the first power supply wire is equal to a resistance between the first end and the second end of the second power supply wire, and a wire length between the first end and the second end of the first power supply wire is not equal to a wire length between the first end and the second end of the second power supply wire.

Abstract: Embodiments include a resistive random access memory (RRAM) storage cell, having a resistive switching material layer and a semiconductor layer between two electrodes, where the semiconductor layer serves as an OEL. In addition, the RRAM storage cell may be coupled with a transistor to form a RRAM memory cell. The RRAM memory cell may include a semiconductor layer as a channel for the transistor, and also shared with the storage cell as an OEL for the storage cell. A shared electrode may serve as a source electrode of the transistor and an electrode of the storage cell. In some embodiments, a dielectric layer may be shared between the transistor and the storage cell, where the dielectric layer is a resistive switching material layer of the storage cell.

Abstract: An etch back air gap (EBAG) process is provided. The EBAG process includes forming an initial structure that includes a dielectric layer disposed on a substrate and a liner disposed to line a trench defined in the dielectric layer. The process further includes impregnating a metallic interconnect material with dopant materials, filling a remainder of the trench with the impregnated metallic interconnect materials to form an intermediate structure and drive-out annealing of the intermediate structure. The drive-out annealing of the intermediate structure serves to drive the dopant materials out of the impregnated metallic interconnect materials and thereby forms a chemical- and plasma-attack immune material.

Abstract: A display panel is provided, which includes a base substrate, and a light-emitting device and an encapsulation structure sequentially arranged on the base substrate. The encapsulation structure includes at least one first encapsulation film layer, the first encapsulation film layer includes at least two inorganic layers arranged in a stack, and refractive indexes of the at least two inorganic layers sequentially increase in a direction close to the light-emitting device. The first encapsulation film layer is configured to adjust an angle of an ambient light incident on the light-emitting device to reduce the ambient light reflected from the display panel.

Abstract: Oxygen controlled PVD AlN buffers for GaN-based optoelectronic and electronic devices is described. Methods of forming a PVD AlN buffer for GaN-based optoelectronic and electronic devices in an oxygen controlled manner are also described. In an example, a method of forming an aluminum nitride (AlN) buffer layer for GaN-based optoelectronic or electronic devices involves reactive sputtering an AlN layer above a substrate, the reactive sputtering involving reacting an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-containing gas or a plasma based on a nitrogen-containing gas. The method further involves incorporating oxygen into the AlN layer.