Abstract: Disclosed is a method for manufacturing a semiconductor device, for example, an MOSFET. According to this method, an n-well region is formed in a predetermined portion of a p-type semiconductor substrate, after which a field oxide film is formed on that portion of the n-well region which is in contact with the p-type semiconductor substrate. Next, a gate oxide film is formed on the p-type semiconductor substrate and the n-well region, and when a polycrystal silicon film is formed on the field oxide film and the gate oxide film. Thereafter, a polycrystal silicon film containing boron is formed on that portion of the above polycrystal silicon film formed on the p-channel MOSFET forming region, a polycrystal silicon film containing phosphorus being formed on that portion of the polycrystal film formed on the n-channel MOSFET forming region.

Abstract: A metal stud (24) is provided for interconnecting levels of metallization separated by an insulator on a semiconductor slice (10). A lead (12) is coated with a refractory metal (14) and a platable metal cap (16). A photoresist (18) is then applied and a cavity (22) is formed within the photoresist (18). The cavity (22) is plated to form the stud (24). The stud (24) is clad with a corrosion resistant layer (28).

Abstract: A novel method for making complementary semiconductor IC devices is described. The method includes the steps of: preparing a N-type semiconductor substrate; preparing a first mask for forming a P-well in the N-type substrate; forming the P-well in the N-type substrate using the first mask; preparing a second mask for forming a first P-type diffusion regions in the substrate and in the P-well; preparing a third mask for forming N-type diffusion regions in the substrate and in the P-well; preparing a fourth mask for forming a second P-type diffusion regions in the unoccupied areas of the N-type substrate and the P-well by carrying out reversing, AND and OR processing of the first, second and third masks, and forming the P-type diffusion regions in the prescribed areas of the substrate and the P-well by placing the fourth mask on the substrate.

Abstract: A method for making a layer of monocrystalline, semiconducting material on a layer of insulating material is disclosed. For this, epitaxial growth is achieved in a cavity closed by layers of dielectric materials, using seeds of monocrystalline, semiconducting material of a substrate. This method thus enables a 3D integration of semiconductor components.

Abstract: A method for manufacturing semiconductor devices comprising the steps of forming a first wiring pattern including first and second lower layers on a semiconductor body, forming an insulation film which covers the first wiring pattern, forming a first hole of 1.5 .mu.m and a second hole of 3 .mu.m in first and second areas of the insulation film which lie over the first and second lower layers, forming a second wiring pattern having first and second upper layers respectively connected to the first and second lower layers via the first and second holes. In the method, the hole formation step includes the substeps of forming a resist film which covers the insulation film, forming a resist pattern by effecting the photolithographic process of exposing the insulation film to light by using a mask pattern having a first hole defining area of 1.5 .mu.m and a second hole defining area of 2.4 .mu.m, and etching the insulation film with the resist pattern used as a mask.

Abstract: The instant invention relates to a process for forming protruding contacts on an integrated circuit aluminum pad, comprising the following steps: providing beneath the aluminum pad (21) a conductive polycrystalline silicone layer (23); locally removing the aluminum layer for uncovering a portion of the surface of the polycrystalline silicon layer; establishing a connection with the polycrystalline silicon layer by means of a drop of conductive adhesive (30).