Abstract: A process for fabricating an improved semiconductor device is disclosed wherein a protective layer of Al.sub.2 O.sub.3 is selectively formed to encapsulate a refractory-metal conductor. To form the Al.sub.2 O.sub.3 layer, first an Al/refractory-metal alloy is selectively formed on the surface of the refractory-metal conductor, then the Al/refractory-metal alloy is reacted with O.sub.2. The resulting Al.sub.2 O.sub.3 encapsulation layer acts as an O.sub.2 diffusion barrier preventing the oxidation of the refractory-metal during subsequent process steps used to fabricate the semiconductor device. In addition, the Al.sub.2 O.sub.3 layer improves the mechanical compatibility of the refractory-metal conductor with other materials used to construct the semiconductor device, such as, for example, improving the adhesion of an overlying layer of passivation glass to the refractory-metal conductor.

Abstract: A method of manufacturing by autoalignment an integrated semiconductor device is set forth comprising the realization on respective semiconductor layers of a first encapsulated electrode contact E provided with spacers and of a second autoaligned electrode contact B on the first contact thus equipped, which process comprises at least: a.sub.0) the formation of a first and a second semiconductor layer for receiving the first and the second electrode contact, respectively; b.sub.0) the formation by a so-called image reversal method of an opening B.sub.o with overhanging sides in a photoresist layer deposited on the first semiconductor layer; c.sub.0) the deposition of a first metal layer forming the first electrode contact E in this opening, which contact has sides F.sub.2 of a lower height than those F.sub.1 of the photoresist layer, these sides F.sub.2 having upper edges which are situated laterally at a small distance from the overhanging sides F.sub.

Abstract: Disclosed is a method for forming a silicon dioxide layer on a substrate by radio-frequency deposition from a plasma comprising oxygen, argon, and tetraethyl orthosilicate (TEOS) or tetramethyl cyclotetrasiloxane (TMCTS). A negative bias is imparted to the substrate. The resulting ion bombardment induces surface migration. Because TEOS and TMCTS have a relatively high mean free path for surface migration, the filling of soft spots and key holes is promoted.

Abstract: A method of forming a planar ITO gate electrode structure with sub-micron spacing includes forming L-shaped nitride spacer portions.

Abstract: In a conductive plug forming method, a conductor layer is formed on the main surface of an insulator layer, only in the vicinity of a plurality of adjacent via holes in which plugs are to be formed, the conductor layer having a periphery defining a boundary encompassing the plurality of adjacent via holes. The volume of the material of the conductor layer within the boundary is of a predetermined amount, ranging from a minimum volume approximately equal to, to a maximum volume approximately equal to two times the total interior volume of the via holes. An energy beam is irradiated on the conductor layer to melt the conductor layer, so that the melted conductor material of the conductor layer flows toward and into the via holes, thereby forming a conductive plug in each of the via holes and without leaving any conductor layer material on the main surface of the substrate.

Abstract: A method of manufacturing a semiconductor device, in particular a contact portion of the wiring of the device. An insulating layer is formed on a semiconductor substrate, a contact hole is formed on the insulating layer by etching, and a first conductive layer having hollows is formed on the insulating layer and in the contact hole. Next, a flattening layer is formed to flatten the surface of device structure, and a part of the first conductive layer is exposed by etching the flattening layer to permit a part of the flattening layer to remain in hollows of device structure. Next, a second conductive layer is formed on the remaining flattening layer and the exposed part of the first conductive layer, and is connected to the semiconductor substrate.

Abstract: In a method of depositing a tungsten film on a gate oxide by means of laser CVD, using WF.sub.6 and H.sub.2 as raw material gases, the H.sub.2 /WF.sub.6 flow ratio lies within the range 10-100, and the volumeric flow rate of the WF.sub.6, which is defined as the ratio of the flow rate of WF.sub.6 to the total pressure, lies within the range 0.04-0.01 sccm/Pa, so that the supply of WF.sub.6 determines the deposition rate of the W film, whereby a low stress W film is obtained. Accordingly, peeling of the W film at the interface with the SiO.sub.2 film and cracks can be avoided.

Abstract: A method for fabricating a semiconductive device is described, wherein a semiconductive substrate having a thermally shrinkable, refractory metal silicide thin film is provided, on which an insulating film on the metal silicide thin film is formed. The metal silicide thin film is thermally treated in an atmosphere containing hydrogen. By this, no morphological degradation is observed in the silicide thin film without an increase of the resistance.

Abstract: A novel process is disclosed for fabricating semiconductor devices with self-aligned contacts. Characteristic of the resulting structure is a digitated electrode and a contiguous conductive region that contact first semiconductor regions and second semiconductor regions, respectively. The first semiconductor regions and the second semiconductor regions are formed in a semiconductor substrate, with each second semiconductor region underlying a finger of the digitated electrode. Advantageously, by forming a contiguous conductive region over the first semiconductor regions located between the fingers of the digitated electrode, it is not only possible to contact second semiconductor regions with a common electrode, but also to self-align the common electrode with the digitated electrode. Ohmic shorting between the digitated electrode and the contiguous conductive region is prevented by interposing an insulating region therebetween.

Abstract: In a CVD contact formed on a shallow junction having a depth of 0.2 micron or less, the presence of aluminum generates a leakage current at the junction after heat treatment. In order to restrain the leakage current, a barrier metal is formed below the aluminum electrode to form an Al/barrier metal/CVDW (tungsten) structure. A contact free from junction leakage and having a high aspect ratio is thereby realized.

Abstract: Electrical connections to specified semiconductor or electrically conductive portions (18, 26, and 30) of a structure created from a semiconductive body (10) are created by a process in which a titanium contact layer (34) is deposited on the structure over the specified portions. An electrically conductive barrier material layer (36) which consists principally of non-titanium refractory material is formed over the contact layer. The resulting structure is then annealed at a temperature above 550.degree. C. in order to lower the contact resistance. The anneal is preferably done at 600.degree. C. or more for 10-120 seconds in a gas whose principal constituent is nitrogen. An electrically conductive primary interconnect layer is formed over the barrier material layer after which all three layers are patterned to create a composite interconnect layer.

Abstract: A thin, electrically insulating film is formed on a crystalline substrate and a multiplicity of holes are densely formed in the film. Conductive crystals are epitaxially grown on the substrate exposed in the holes, thereby forming on said substrate densely populated probes having sharp apices.

Abstract: A multilevel resist process for fine line e-beam lithography, or, alternatively, deep ultraviolet (DUV) optical lithography with a clear field mask involving the use of a plated transfer layer for image reversal. The process preferably uses a high brightness, quarter-micron diameter electron beam and a high speed negative resist to fabricate microwave MESFETs, MODFETs, and integrated circuits with gate lengths of 0.25 micron and below. This is achieved by producing a line of negative resist which can be developed to 0.25 micron or below. A plated transfer layer is then applied which provides image reversal, converting the line of resist into an opening suitable for conventional gate recess etching, gate metal deposition, and lift-off. A positive resist can be substituted for the negative e-beam resist and exposed with DUV through a clear field mask instead of an electron beam for the fabrication of MESFETs.

Abstract: A method for fabricating a lightly doped drain MOSFET integrated circuit device which overcomes the problems in prior ICs. The method begins by forming a pattern of gate electrode structures upon a semiconductor substrate which structures each includes a gate oxide, a polysilicon layer and an amorphous refractory metal silicide. The resulting structure may be annealed in oxygen at this time to change the refractory metal silicide from it deposited amorphous phase into its crystalline phase. A pattern of lightly doped regions in the substrate is formed by ion implantation using the polycide gate structures as the mask. A dielectric layer is blanket deposited over the surfaces. This layer is planned to form both the spacers and a cover layer for the refractory metal silicide layer. This is done by forming a lithography mask by conventional lithography and etching on the blanket layer and over the pattern of polycide gate electrode structures.

Abstract: A method is described for forming metal silicide contacts to polycrystalline silicon regions and nonmetal silicide contacts to monocrystalline silicon regions of an integrated circuit device. Polycrystalline silicon regions are formed and pattered. A dielectric masking layer is formed over the polycrystalline and monocrystalline silicon regions. The surfaces of the masking layer are covered and the irregularities of the surfaces filled with an organic material to thereby planarize the surfaces. The organic material is blanket etched until the masking layer which covers the polycrystalline silicon regions is exposed and allowing the masking layer which covers the monocrystalline silicon regions to remain covered with organic material. The exposed masking layer is removed from the polycrystalline regions. The remaining organic material is removed. A layer of metal film is blanket deposited over the wafer. The metal silicide contacts to polycrystalline regions are formed.

Abstract: A method of etching a semiconductor device having multi-layered wiring by an ion beam is disclosed which method comprises the steps of: extracting a high-intensity ion beam from a high-density ion source; focusing the extracted ion beam; causing the focused ion beam to perform a scanning operation by a voltage applied to a deflection electrode; forming a first hole in the semiconductor device by the focused ion beam to a depth capable of reaching an insulating film formed between upper and lower wiring conductors so that the first hole has a curved bottom corresponding to the undulation of the upper wiring conductor, and the upper wiring conductor is absent at the bottom of the first hole; and scanning a portion of the bottom of the first hole with the focused ion beam to form a second hole in the insulating film to a depth capable of reaching the lower wiring conductor, thereby preventing the shorting between the upper and lower wiring conductors.

Abstract: A method of forming a semiconductor device. An insulating film is formed on a semiconductor region including an impurity. A first contact hole which reaches the semiconductor region is formed in the insulating film. A monocrystalline semiconductor film is formed on the portion of the semiconductor region which is exposed by the first contact hole, and on the insulating film. A monocrystalline aluminum film is formed on the monocrystalline semiconductor film. The portion of the aluminum film in the first contact hole is removed, thereby forming in the aluminum film a second contact hole, which overlaps the first contact hole. Thereafter, a tungsten film is formed in the second contact hole.

Abstract: According to this invention, there is provided to a semiconductor device comprising a semiconductor substrate on which an element is formed, an insulating interlayer formed on the semiconductor substrate, and a wiring layer having a structure in which a surface of a copper layer in a crystal state is covered with a nitride of a metal not forming an intermetallic compound with copper and the metal and/or the metal nitride is present at grain boundaries of the copper layer.

Abstract: The invention is intended to form a recess large in the opening width at the contact hole forming position of the insulator film before opening contact holes in the insulator film, and to open contact holes smaller in opening width at the bottom of the recess.According to the manufacturing method of the invention, since the opening size of the recess in the upper portion of the contact hole may be set larger and by decreasing the shadowing effect when covering the aluminum alloy wiring layer, the degree of covering of the aluminum alloy wiring layer on the side wall of the contact hole is improved, so that reduction of contact resistance and enhancement of reliability may be achieved.

Abstract: This is a method for making an ohmic connection between a semiconductor and oxide superconductor, the connection being such that current can pass between the semiconductor and the superconductor without going through a degraded portion which is greater than the coherence length of the superconductor. The method can comprise depositing a buffer layer (which is essentially inert to the oxide superconductor) on a first portion of a semiconductor substrate, and depositing oxide superconductor on the barrier layer, and depositing a superconductor contact layer (e.g. of gold or silver) on the oxide superconductor, and depositing a semiconductor contact layer on a second portion of the semiconductor substrate (the semiconductor contact layer being, for example, of aluminum, or a refractory metal silicide); and depositing a layr (e.g.