Patents Examined by Lauren R Bell
  • Patent number: 12125941
    Abstract: A light emitting device for a display including a first LED stack, a second LED stack disposed under the first LED stack, a third LED stack disposed under the second LED stack, and including a first conductivity type semiconductor layer and a second conductivity type semiconductor layer, a surface protection layer at least partially covering side surfaces of the first LED stack, the second LED stack, or the third LED stack, a first bonding layer interposed between the second LED stack and the third LED stack, a second bonding layer interposed between the first LED stack and the second LED stack, lower buried vias passing through the second LED stack and the first bonding layer, and electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer of the third LED stack, respectively, and upper buried vias passing through the first LED stack.
    Type: Grant
    Filed: November 29, 2020
    Date of Patent: October 22, 2024
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Hyeon Chae, Seom Geun Lee, Seong Kyu Jang
  • Patent number: 12022653
    Abstract: A semiconductor device may include a cell gate conductive pattern in a cell array area that extends to a step area, a cell vertical structure in the cell array area that extends through the cell gate conductive pattern, a cell gate contact structure on the cell gate conductive pattern in the step area, a cell gate contact region in the cell gate conductive pattern and aligned with the cell gate contact structure, a first peripheral contact structure spaced apart from the cell gate conductive pattern, a second peripheral contact structure spaced apart from the first peripheral contact structure, a first peripheral contact region under the first peripheral contact structure, and a second peripheral contact region under the second peripheral contact structure. The cell gate contact region may include a first element and a remainder of the cell gate conductive pattern may not substantially include the first element.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: June 25, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang-Gn Yun, Sunghoi Hur, Jaesun Yun, Joon-Sung Lim
  • Patent number: 11903238
    Abstract: Provided is a display device. The display device includes a flexible substrate comprising an active area, and a non-active area surrounding a border of the active area; a thin-film transistor and a light-emitting element on the active area; an encapsulation unit over the thin-film transistor and the light-emitting element; a hole formed in the active area by removing a portion of the flexible substrate; a first common layer disposed on a side surface of the hole, extended from the light-emitting element and comprising same elements with the light-emitting element; and a tip protruding from the side surface of the hole. The first common layer disposed adjacent to the tip is disconnected from the light-emitting element.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: February 13, 2024
    Assignee: LG Display Co., Ltd.
    Inventors: Chan Park, MoonGoo Kim, HyunWoo Cho, Wooseok Roh, HeungJu Jo, JeongKweon Park, SangGul Lee
  • Patent number: 11894380
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: February 6, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11842988
    Abstract: A display device includes: a pixel circuit layer including a plurality of transistors; first partition wall and a second partition wall on the pixel circuit layer, each of the first and second partition walls having a shape protruding in a thickness direction; a first electrode and a second electrode on the same layer and respectively on the first partition wall and the second partition wall; a light emitting element between the first electrode and the second electrode; and a semiconductor pattern directly on the first electrode.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: December 12, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae Gyun Kim, Jun Hong Park, Jun Chun, Eui Suk Jung, Hyun Young Jung
  • Patent number: 11830880
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: November 28, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11784236
    Abstract: Methods of fabricating a semiconductor device include providing a semiconductor substrate that includes a plurality of epitaxial layers, including a channel layer and a permanent cap over the channel layer, where the permanent cap defines an upper surface of the semiconductor substrate, and forming a sacrificial cap over the permanent cap in an active region of the device, where the sacrificial cap comprises a semiconductor material that includes aluminum. The method also includes forming one or more current carrying regions (e.g., source and drain regions) in the semiconductor substrate in the active region of the device by performing an ion implantation process to implant ions through the sacrificial cap, and into the semiconductor substrate, completely removing the sacrificial cap in the active region of the device, while refraining from removing the permanent cap, and forming one or more current carrying contacts over the one or more current carrying regions.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: October 10, 2023
    Assignee: NXP USA, Inc.
    Inventors: Jenn Hwa Huang, Yuanzheng Yue, Bruce Mcrae Green, Karen Elizabeth Moore, James Allen Teplik
  • Patent number: 11776964
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: October 3, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11710793
    Abstract: A thin film transistor (TFT) substrate includes a TFT on the substrate. The TFT includes an active patterned layer which is made of a polycrystalline silicon, which includes a channel portion, a source portion and a drain portion, and in which protrusions are formed at boundaries between grains and recess spaces are formed between the protrusions. A barrier pattern film fills the recess spaces and forms a flat surface with the protrusions. A gate electrode is on a gate insulating layer located on the barrier pattern film and the protrusions and overlays or corresponds to the channel portion. A source electrode and a drain electrode are on the gate electrode and respectively contact the source portion and the drain portion.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: July 25, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Dong-Chae Shin, Won-Sang Ryu, Kyung-Mo Son
  • Patent number: 11706950
    Abstract: An organic light-emitting display apparatus includes a pixel-defining layer configured to surround a plurality of pixels while exposing an emission area of the plurality of pixels on a substrate; and a spacer provided on the pixel-defining layer and configured to allow a mask to be placed on the spacer, the mask being arranged for deposition of an emission layer in the emission area, wherein a distance in a plane direction between the spacer and each of the plurality of pixels is within 1 ?m. A color mixture between pixels may be prevented by suppressing the shadow phenomenon in deposition of an emission layer such that performance and reliability of the organic light-emitting display apparatus may be significantly improved.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: July 18, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Waljun Kim, Jinyeong Kim, Kiwan Ahn, Joosun Yoon
  • Patent number: 11676816
    Abstract: A method of forming a semiconductor device includes forming first sacrificial patterns on a lower structure, forming first remaining mask layers having a ā€œUā€ shape between the first sacrificial patterns to be in contact with the first sacrificial patterns, forming first remaining mask patterns by pattering the first remaining mask layers, each of the first remaining mask patterns including a horizontal portion, parallel to an upper surface of the lower structure, and a vertical portion, perpendicular to the upper surface of the lower structure, forming second mask patterns spaced apart from the vertical portions of the first remaining mask patterns, removing the first sacrificial patterns remaining after forming the second mask patterns, and forming first mask patterns by etching the horizontal portions of the first remaining mask patterns.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: June 13, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Min Park, Se Myeong Jang, Bong Soo Kim, Je Min Park
  • Patent number: 11678557
    Abstract: A display substrate has a display area and a non-display area. The non-display area includes a dummy pixel area located in a periphery of the display area. The display substrate includes a substrate; a first pixel defining layer disposed on the substrate and located in the display area, the first pixel defining layer having a plurality of first openings; and a second pixel defining layer disposed on the substrate and located in the dummy pixel area, the second pixel defining layer having a plurality of second openings. A capacity of a second opening is greater than a capacity of a first opening, and an open area of a second opening is less than or equal to an open area of a first opening.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: June 13, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunjing Hu, Wenjun Hou
  • Patent number: 11665921
    Abstract: An organic light-emitting apparatus includes a lower substrate comprising a display area and a peripheral area around the display area; a first insulating layer on the display area and the peripheral area of the lower substrate, wherein a plurality of penetration holes are formed in the first insulating layer in the peripheral area; an upper substrate on the lower substrate; and a sealant in the plurality of penetration holes bonding the lower substrate to the upper substrate.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: May 30, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung-Ho Cho, Hyun-Young Kim, Il-Ryong Cho
  • Patent number: 11646395
    Abstract: A method of growing an AlGaN semiconductor material utilizes an excess of Ga above the stoichiometric amount typically used. The excess Ga results in the formation of band structure potential fluctuations that improve the efficiency of radiative recombination and increase light generation of optoelectronic devices, in particular ultraviolet light emitting diodes, made using the method. Several improvements in UV LED design and performance are also provided for use together with the excess Ga growth method. Devices made with the method can be used for water purification, surface sterilization, communications, and data storage and retrieval.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: May 9, 2023
    Assignee: Trustees of Boston University
    Inventors: Yitao Liao, Theodore D. Moustakas
  • Patent number: 11600751
    Abstract: A light-emitting semiconductor component may include a semiconductor body having an active region configured to emit a primary radiation, a first conversion element to convert the primary radiation to a first secondary radiation, a second conversion element to convert the primary radiation to a second secondary radiation, and a mask. The first conversion element and the second conversion element may be arranged at a top side of the semiconductor body, may be configured as bodies that partly cover the semiconductor body, and may be connected to the semiconductor body. The mask may be arranged between the first conversion element, the second conversion element, and the semiconductor body. The mask may have an opening in the region of each conversion element.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: March 7, 2023
    Assignee: OSRAM OLED GMBH
    Inventors: Adrian Stefan Avramescu, Siegfried Herrmann, Alexander Behres
  • Patent number: 11588128
    Abstract: The disclosure relates to an electrode exhaust structure, an electrode, a display panel and a fabrication method thereof, a display device. The electrode exhaust structure includes first exhaust holes arrayed in a matrix and arranged on an electrode, and second exhaust holes arrayed in a matrix and arranged on the electrode. A column of the second exhaust holes are arranged between adjacent columns of the first exhaust holes, and a row of the second exhaust holes are arranged between adjacent rows of the first exhaust holes; the length of the second exhaust hole in the row direction is greater than or equal to the distance between the adjacent columns of the first exhaust holes; and the length of the second exhaust hole in the column direction is greater than or equal to the distance between the adjacent rows of the first exhaust holes.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: February 21, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Pan Zhao, Zhiliang Jiang
  • Patent number: 11581439
    Abstract: To provide a semiconductor device in which a large current can flow. To provide a semiconductor device which can be driven stably at a high driving voltage. The semiconductor device includes a semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer and apart from each other in a region overlapping with the semiconductor layer, a first gate electrode and a second gate electrode with the semiconductor layer therebetween, a first gate insulating layer between the semiconductor layer and the first gate electrode, and a second gate insulating layer between the semiconductor layer and the second gate electrode. The first gate electrode overlaps with part of the first electrode, the semiconductor layer, and part of the second electrode. The second gate electrode overlaps with the semiconductor layer and part of the first electrode, and does not overlap with the second electrode.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: February 14, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yoshiyuki Kobayashi, Daisuke Matsubayashi, Akihisa Shimomura, Daigo Ito
  • Patent number: 11563139
    Abstract: A deep ultraviolet light emitting device includes: an electron block layer of a p-type AlGaN-based semiconductor material or a p-type AlN-based semiconductor material provided on a support substrate; an active layer of an AlGaN-based semiconductor material provided on the electron block layer; an n-type clad layer of an n-type AlGaN-based semiconductor material provided on the active layer; an n-type contact layer provided on a partial region of the n-type clad layer and made of an n-type semiconductor material containing gallium nitride (GaN); and an n-side electrode formed on the n-type contact layer. The n-type contact layer has a band gap smaller than that of the n-type clad layer.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: January 24, 2023
    Assignee: NIKKISO CO., LTD.
    Inventors: Tetsuhiko Inazu, Cyril Pernot
  • Patent number: 11538972
    Abstract: A light transmissive first insulating film having light transmissive property to visible light, a second insulating film arranged opposite to the first insulating film, a plurality of conductor patterns formed of, for example, mesh patterns having the light transmissive property to the visible light and formed on a surface of at least one of the first insulating film and the second insulating film, a plurality of first light-emitting devices connected to any two conductor patterns of the plurality of conductor patterns, and a resin layer arranged between the first insulating film and the second insulating film to hold the first light-emitting devices are included.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: December 27, 2022
    Assignee: Nichia Corporation
    Inventor: Keiichi Maki
  • Patent number: 11532737
    Abstract: A semiconductor device is provided, wherein a semiconductor substrate includes: a first trench portion provided from a front surface of the semiconductor substrate to a predetermined depth, and having a longer portion and a shorter portion as seen from above; and a first conductivity-type floating semiconductor region at least partially exposed on the front surface and surrounded by the first trench portion, an interlayer insulating film has openings to electrically connect an emitter electrode and the floating semiconductor region, the openings include: a first opening closest to an outer end of the floating semiconductor region in a direction parallel to the longer portion; and a second opening second closest to the outer end in the direction parallel to the longer portion, and a distance between the first opening and the second opening is shorter than a distance between any adjacent two of the openings other than the first opening.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: December 20, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yoshiharu Kato, Hidenori Takahashi, Tatsuya Naito