Abstract: System for generating a pseudo-repository. The system scans a directory to detect compiled binary files, and assembles an index of the compiled binary files based on metadata describing the compiled binary files. Then the system generates a pseudo-repository based on the index that maps each compiled binary file with at least one associated artifact, wherein the pseudo-repository responds to client requests for one of the binary files.

Abstract: A processor includes a memory hierarchy, buffer, and a compression module. The compression module includes logic to evaluate a stream of data to be compressed according to a compression scheme, selectively modify a format of the compression scheme based upon a number of literals received, compress a sequence of the data to produce the output data sequence, and send the output data sequence to the memory hierarchy.

Abstract: Methods and apparatus are described by for compressing data using LZ77 compression. Embodiments determine an initial run from input data. The initial run includes repeating data at a first location and has a first length. A hash chain is updated with a proper set of hashes from prefixes from the initial run. A first search engine determines a second run that includes the repeating data at a second location. The second run has a second length less than the first length. A first matching location is determined within the input data having the repeating data using the hash chain and the second run. The first matching location is the first location. The first matching location, the second location, and the second length are written to an output buffer. The output buffer includes a compressed version of the input data.

Abstract: A system for synonym generation and/or identification can be utilized to make a search engine more effective in finding relevant search results. In embodiments, a synonym generation system includes a phrase vector module, a vector similarity module, and a vector filter module. Candidate synonym phrase pairs are selected from data sources for analysis. Data sources may include a log of search queries, a corpus of web text, and a set of merchant descriptions of products. The data sources may be analyzed with respect to the phrase pairs to generate vector representations of the phrase pairs. The vector representations may then be analyzed to determine a similarity vector. The similarity vector allows the synonym generation system to filter synonyms from the candidate phrase pairs.

Abstract: Embodiments of the present disclosure include a microcontroller with a processor, memory, and peripheral devices including a differential digital delay line analog-to-digital converter (ADC). The ADC includes differential digital delay lines, a circuit including a set of delay elements included in the differential digital delay lines, and another circuit including another set of delay elements included in the differential digital delay lines. The first circuit is configured to generate data representing an analog to digital conversion of an input. The second circuit is configured to calibrate a source to the differential digital delay lines.

Abstract: Aspects of the subject disclosure may include, for example, an antenna system that includes a plurality of dielectric members configured to propagate first guided electromagnetic waves. A dielectric antenna array is configured to receive the first guided electromagnetic waves and to transmit a controllable beam in response thereto. Other embodiments are disclosed.

Abstract: Embodiments effect the combination of data from different tables (e.g., of an underlying database), and the visualization of that combined table data in an incremental manner. Columns from a second table may be selectively combined with those of a first table, manually by user selection and/or automatically by best guess matching. Such matching may be based upon commonalities between table column headers. A menu may allow user selection of specific table(s)/table column(s) to be combined with a first table, as well as a manner of that combination (e.g., particular types of SQL join operations). The table data combination process is visualized step-by-step (e.g., allowing toggling and forward/backward navigation between interface screens), ensuring the user is able to follow data migration in the combined workflow, and appreciate/recognize changing values resulting therefrom.

Abstract: In some examples, a system includes a first transistor comprising a first source terminal coupled to a first input terminal, a first drain terminal coupled to a first top plate sampling capacitor, and a first gate terminal. The system also includes a first input-dependent dual clock boost circuit coupled to the first input terminal via a first boost circuit input and to the first gate terminal via a first boost circuit output. The system further includes a second transistor comprising a second source terminal coupled to a second input terminal, a second drain terminal coupled to a second top plate sampling capacitor, and a second gate terminal. The system also includes a second input-dependent dual clock boost circuit coupled to the second input terminal via a second boost circuit input and to the second gate terminal of the second transistor via a second boost circuit output.

Abstract: A semiconductor device in which variations are controlled is provided. The semiconductor device has a function of converting a digital signal into an analog signal, and includes a digital-analog converter circuit, an amplifier circuit, first to fourth switches, a first output terminal, a second output terminal, and a power source. The amplifier circuit is configured to perform feedback control when the first switch and the fourth switch are on and the second switch and the third switch are off. The amplifier circuit is configured to perform comparison control when the first switch and the fourth switch are off and the second switch and the third switch are on; utilizing this, variations in the digital-analog converter circuit and the amplifier circuit are controlled.

Abstract: In one embodiment, a set of lock and unlock instructions in a read phase of a computer-readable program is replaced with a first set of tracking instructions, wherein the first set of tracking instructions track a set of locked objects identifying objects that would have been locked by executing the set of lock and unlock instructions. A second set of tracking instructions is inserted into the read phase of the computer-readable program, wherein the second set of tracking instructions track a set of read objects indicating versions of objects that are read. Validation instructions are inserted into the computer-readable program, wherein the validation instructions validate that the versions of objects in the set of read objects have not changed since they were last read and lock the set of locked objects that would have been locked upon completing execution of the set of lock and unlock instructions.

Abstract: An approach for parallel deduplication using automatic chunk sizing. A dynamic chunk deduplicator receives a request to perform data deduplication where the request includes an identification of a dataset. The dynamic chunk deduplicator analyzes file level usage for one or more data files including the dataset to associate a deduplication chunk size with the one or more data files. The dynamic chunk deduplicator creates a collection of data segments from the dataset, based on the deduplication chunk size associated with the one or more data files. The dynamic chunk deduplicator creates a deduplication data chunk size plan where the deduplication data chunk size plan includes deduplication actions for the collection of data segments and outputs the deduplication data chunk size plan.

Abstract: The disclosure provides a circuit. The circuit includes an amplifier and a digital to analog converter (DAC). The amplifier receives a reference voltage at an input node of the amplifier. The DAC is coupled to the amplifier through a refresh switch. The DAC includes one or more current elements. Each current element of the one or more current elements receives a clock. The DAC includes one or more switches corresponding to the one or more current elements. A feedback switch is coupled between the one or more switches and a feedback node of the amplifier. The DAC provides a feedback voltage at the feedback node of the amplifier.

Abstract: A semiconductor device according to the present invention has a capacitance DAC (Digital-to-Analog Converter) circuit and a comparator. The capacitance DAC circuit includes: first capacitors to which input signals are given and each of which has a capacitance value corresponding to a weight of a bit to be converted; and second capacitors to which common voltages are given and whose sum of capacitance values is equivalent to that of the first capacitors. Further, the second capacitors include: a redundant bit capacitor having a capacitance value corresponding to a weight of a redundant bit; and adjustment capacitors each having a capacitance value obtained by subtracting the capacitance value of the redundant bit capacitor from the sum of the capacitance values of the second capacitors.

Abstract: A method to implement circuits and circuit elements having one or more ports may include digitizing, using analog-to-digital converters, continuous-time input signals received from one or more ports of a circuit to form discrete-time input signals. At a digital signal processor, the discrete-time input signals are received and the discrete-time input signals are processed to calculate a desired discrete-time output signals. Using digital-to-analog converters, the calculated desired discrete-time output signal are calculated to form outputs of continuous-time output signals at the one or more ports of the circuit. The continuous-time output signals are output to the same one or more ports that receive the continuous-time input signals; and producing, thereby, a desired relationship between the continuous-time output signals and the continuous-time input signals at the one or more ports.

Abstract: According to at least one aspect, a delta sigma modulator circuit is provided. The delta sigma modulator circuit includes a first signal processor circuit configured to receive an input signal and a feedback signal and generate a processed signal using the input signal and the feedback signal, a quantizer configured to generate a digital code using the processed signal, a second signal processor circuit configured to receive the digital code, segment the digital code to form a segmented digital code that is smaller in size than the digital code, and generate a rotated digital code using the segmented digital code at least in part by rotating the segmented digital code to compensate for an excess loop delay in the circuit, and an digital-to-analog converter (DAC) configured to receive the rotated digital code and generate the feedback signal using the rotated digital code.

Abstract: In one embodiment, a method includes receiving a search query for multimedia objects of an online social network from a user of the online social network; searching an index of multimedia objects to identify multimedia objects indexed with keywords that match n-grams of the search query, the keywords having been extracted from reshares associated with the multimedia objects; calculating an object-score for each identified multimedia object based on social signals; generating search results with references to the identified multimedia objects that have an object-score greater than a threshold object-score; and sending to the user one or more of the search results as part of a search-results page.

Abstract: A computer-implemented method includes receiving a transaction, where the transaction includes a plurality of operations and is applicable to a graph database. The transaction is represented by a transaction graph, which is a dependency graph representing dependencies among the plurality of operations of the transaction. The transaction graph is partitioned, by a computer processor, into two or more transaction subgraphs. Each of the two or more transaction subgraphs includes two or more operations of the transaction, and each of the two or more transaction subgraphs is a dependency graph representing dependencies among the two or more operations of the transaction subgraph. The two or more transaction subgraphs are independent of one another. The two or more transaction subgraphs are applied to the graph database in parallel, where applying each transaction subgraph to the graph database includes applying the two or more operations of the transaction subgraph to the graph database.

Abstract: In some examples, a device includes an integrated circuit comprising a computational unit configured to process at least two input bit streams that each include a sequential set of data bits or two or more sets of data bits in parallel that is deterministically encoded to represent numerical values based on a probability that any data bit in the bit stream is high. In some examples, the computational unit includes a convolver configured to generate pair-wise bit combinations of the data bits of the input bit streams. In some examples, e computational unit further includes a stochastic computational unit configured to perform a computational operation on the pair-wise bit combinations and produce an output bit stream having a set of data bits indicating a result of the computational operation based on a probability that any data bit in the set of data bits of the output bit stream is high.

Abstract: Text clustering includes: identifying, for a set of non-stop words in a text, a corresponding set of related topic clusters relating to the set of non-stop words, the identification being based at least in part on a plurality of topic clusters each comprising a corresponding plurality of topically related words and a corresponding cluster identifier; for non-stop words in the set of non-stop words that are identified to have corresponding related topic clusters, replacing the non-stop words with corresponding cluster identifiers of the corresponding related topic clusters to generate a clustered version of the text; and providing the clustered version of the text to be further analyzed.

Abstract: Techniques for improving rankings of search results generated by a search engine are described. A set of member profiles is identified. The identifying is based on keywords specified in a search query matching search index entries corresponding to the set of member profiles. A subset of the member profiles is selected. The selecting is based on a matching of the keywords to special index entries associated with the subset of the member profiles. The special index entries represent values of data fields specified in each of the subset of the set of member profiles. The special index entries also represent relationships between the values of the data fields. Ranking scores associated with each of the subset of the member profiles are boosted. A portion of each of the set of member profiles is communicated for presentation in user interface in order of the ranking scores.