Patents Examined by Lucien U. Toplu
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Patent number: 6029206Abstract: In an object-oriented or object-based computer system, object methods are routed to users (e.g., client programs) after automatically performing supervisory functions. Examples of suitable supervisory functions include authorization checking and locking. One suitable way to automatically perform the supervisory functions is to provide a call method instruction in the operating system that automatically performs these supervisory functions when a user invokes the object method using the instruction. In this manner, the operating system can assure that the user calling the object method has sufficient authority and lock to access the object method. In addition, the method routing mechanism has the ability to forego authorization checking and locking for objects that are unprotected, and may perform abbreviated authorization checking and locking if the operating system determines from local knowledge that a user is currently authorized to and locked on the called object.Type: GrantFiled: January 31, 1996Date of Patent: February 22, 2000Assignee: International Business Machines CorporationInventors: John C. Endicott, Steven L. Halter, Steven J. Munroe, Erik Edward Voldal
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Patent number: 6012080Abstract: A method and an apparatus are disclosed for providing enhanced pay per view in a video server. Specifically, the present invention periodically schedules a group of non pre-emptible tasks corresponding to videos in a video server having a predetermined number of processors, wherein each task is defined by a computation time and a period. To schedule the group of tasks, the present invention divides the tasks into two groups according to whether they may be scheduled on less than one processor. The present invention schedules each group separately. For the group of tasks scheduleable on less than one processor, the present invention conducts a first determination of scheduleability. If the first determination of scheduleability deems the group of tasks not scheduleable, then the present invention conducts a second determination of scheduleability.Type: GrantFiled: March 27, 1996Date of Patent: January 4, 2000Assignee: Lucent Technologies Inc.Inventors: Banu Ozden, Rajeev Rastogi, Abraham Silberschatz
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Patent number: 5995750Abstract: A memory protection system in a multi-tasking system for preventing a currently running application from writing data to a memory segment storing data for a second application. The memory protection system transmits m upper address defining a memory segment of the currently running application to the memory from a memory register. The memory protection system detects when a currently running application generates an invalid address and disables the data operation to prevent the corruption of data in a memory segment storing data for the currently running application. The system verifies that the m upper address bits in the memory register after the application is completed are equal to m upper address bits of the memory segment of the completed application.Type: GrantFiled: December 16, 1997Date of Patent: November 30, 1999Assignee: Micro Motion, Inc.Inventors: Allan L. Samson, Thomas C. Green
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Patent number: 5987527Abstract: Binding data sinks and sources across ring levels of a computer. A new binding channel is created and attached to a comm channel. A unique name is created for the binding channel, and a handle to the unique name is obtained at a relatively low priority ring level. The handle is passed to an unbound relatively high priority ring level code module.Type: GrantFiled: December 21, 1995Date of Patent: November 16, 1999Assignee: Intel CorporationInventor: Benjamin M. Cahill, III
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Patent number: 5974439Abstract: The present invention provides a method, system, and program product for sharing resources between real-time and non-real-time (or general purpose) programs in a computer system which utilizes Slotted Priority Architecture. Non-pre-emptable, internally triggered resources are shared using the method of the present invention. The real-time scheduler anticipates upcoming realtime minor cycles and, using knowledge of which resources are to be used by the next scheduled real-time task and of the latency times of the resources to be used, signals the device drivers for the resources to be used to stop accepting requests from general purpose tasks far enough in advance to the beginning of the real-time minor cycles that will utilize them to ensure that the resources will be idle and available for the real-time tasks to use without delay.Type: GrantFiled: November 21, 1997Date of Patent: October 26, 1999Assignee: International Business Machines CorporationInventor: Gregory Bollella
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Patent number: 5974440Abstract: In a microprocessor embodiment (26), the microprocessor is operable to multi-task a plurality of programs, wherein the plurality of programs include a virtual program (38, 40) operable in a virtual mode and a monitor program (36) in a protected mode. The microprocessor includes an interrupt handling circuit (30) for executing an interrupt handler in response to a hardware interrupt request signal (HIM.cndot.INTR). The microprocessor further includes an interrupt flag bit (IF) set in a like manner in both the virtual mode and the protected mode. The interrupt flag bit is set in a first state to inhibit receipt of the hardware interrupt request signal by the interrupt handling circuit, and the interrupt flag bit is set in a second state to enable receipt of the hardware interrupt request signal by the interrupt handling circuit. The microprocessor further includes a virtual mode control signal (VM.cndot.Type: GrantFiled: March 25, 1997Date of Patent: October 26, 1999Assignee: Texas Instruments IncorporatedInventors: James E. Brooks, Robert R. Collins, Jonathan H. Shiell
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Patent number: 5970250Abstract: Scoping operating system semantics in a computing environment, wherein a process comprising at least one enclave is executing in the computing environment, is disclosed. Such scoping is performed by determining whether an operating system semantic is explicitly directed to the process, or whether the operating system semantic is implicitly directed to the process. If the operating system semantic is explicitly directed to the process, then the operating system semantic is scoped to the process. If the operating system semantic is implicitly directed to the process, then the operating system semantic is scoped to an enclave of the process in which the operating system semantic occurs.Type: GrantFiled: June 1, 1995Date of Patent: October 19, 1999Assignee: International Business Machines CorporationInventors: Laurence Edward England, Tsuneo Horiguchi
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Patent number: 5968115Abstract: The system concept of the C3M2 System is to have the capability of providing a Process for each major processing step of automated data processing, i.e. if you have four steps then you need a minimum of four but it could be 8 or 12 or 16 processes. The four major complementary functions encompass the four major functions of data processing (Input/Output, Data Computation, Storage and User I/F). The system shall be Multi-tasking for each step. Source headers, link lists and entity or object identifiers are the methods that shall be used for identity of the different classes, types and objects for the variety of data in the system. The source and data type are contained in the source header. The class and type identity are contained in the object identifiers. The multi-tasking would be by schedule (interleaved by priority). This was selected instead of cycle sharing for improved concurrency.Type: GrantFiled: February 3, 1997Date of Patent: October 19, 1999Assignee: Complementary Systems, Inc.Inventor: Ray C. Trout
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Patent number: 5964829Abstract: A method and apparatus are disclosed for providing enhanced pay per view in a video server. Specifically, the present invention periodically schedules a group of non pre-emptible tasks corresponding to videos in a video server having a predetermined number of processors, wherein each task begins at predetermined periods and has a set of sub-tasks separated by predetermined intervals. To schedule the group of tasks, the present invention divides the tasks into two groups according to whether they may be scheduled on a single processor. The present invention schedules each group separately. For the group of tasks not scheduleable on a single processor, the present invention determines a number of processors required to schedule such group and schedules such tasks to start at a predetermined time. For the group of tasks scheduleable on a single processor, the present invention determines whether such tasks are scheduleable on the available processors using an array of time slots.Type: GrantFiled: March 27, 1996Date of Patent: October 12, 1999Assignee: Lucent Technologies Inc.Inventors: Banu Ozden, Rajeev Rastogi, Abraham Silberschatz
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Patent number: 5946490Abstract: A compiler which generates object-oriented code from high level models is disclosed. The compiler uses a class graph to construct a finite intermediate automaton which is used in conjunction with an adaptive program to generate an object-oriented program in a target language. The intermediate automaton enables general case compilation of most combinations of adaptive programs and class graphs. The automaton also enables use of standard minimization techniques which reduce the size of the generated object-oriented code.Type: GrantFiled: March 22, 1996Date of Patent: August 31, 1999Assignee: Northeastern UniversityInventors: Karl Lieberherr, Jens Palsberg, Boaz Patt-Shamir
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Patent number: 5940869Abstract: A method and system for allowing multiple tasks to share virtual memory areas, in a memory management system for a computer, uses a data structure which maintains a list of address spaces shared by more than one task. For each entry in this list, a list of slots in virtual address space is maintained in the data structure, where each slot contains indications that said shared memory was mapped into a task. An offset table of directory pages is also maintained, and each entry in this directory points to a directory page for a task. The directory page entries for all of such directory pages points to a page table entry. An entry in each of the offset tables points to the entry in the list of shared address spaces for this set.Type: GrantFiled: June 7, 1995Date of Patent: August 17, 1999Assignee: International Business Machines CorporationInventor: William H. Schwartz
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Patent number: 5933624Abstract: There is disclosed a multi-processor system arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories. The individual processors can, on a cycle by cycle basis, be grouped in any configuration to run in synchronism (but from different instruction streams) with the other processors in that group. More than one such synchronized group can be formed concurrently. A crossbar switch serves to establish the processor memory links and the entire image processor, including the individual processors, the crossbar switch and the memories are contained on a single silicon chip.Type: GrantFiled: September 2, 1997Date of Patent: August 3, 1999Assignee: Texas Instruments IncorporatedInventor: Keith Balmer
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Patent number: 5930503Abstract: A registration manager implemented as a task registration manager for dynamically registering management task descriptions on demand. The task registration manager includes a static registration mechanism, a static registry, and a runtime registration mechanism. At installation of a management application, the static registration mechanism stores a relatively small amount of information regarding each task provided with that application in the static registry for use at runtime. At runtime, the runtime registration mechanism registers a task the first time a specific task is requested by consulting the information contained in the runtime registration mechanism and then parsing the task description and placing it in a description object. A pointer to the description object is returned. Subsequent executions are performed using the pointer to the description object already in memory.Type: GrantFiled: December 29, 1995Date of Patent: July 27, 1999Assignee: Hewlett-Packard CoInventor: Douglas P. Drees
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Patent number: 5923876Abstract: A layered block device driver for accessing a storage device coupled to a computer system having a platform on which a disk fault prediction application operates. The layered block device driver includes a file system driver coupled to the computer system, at least one upper level driver coupled to the file system driver, an intermediate driver having a first coupling with the upper level driver for the exchange of messages between the intermediate driver and the upper level driver and a second coupling with the application which controls the exchange of messages between the application and the storage device, and a port driver coupled to the intermediate driver and the storage device.Type: GrantFiled: August 24, 1995Date of Patent: July 13, 1999Assignee: Compaq Computer Corp.Inventor: Gaines C. Teague
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Patent number: 5920872Abstract: A method and apparatus for managing access to resources is provided. When a process requires access to a resource, the process requests a lock on the resource from a lock manager unit that resides on the same node as the process. If a resource object for the resource does not exist, one is created in the lock manager unit, but not on lock manager units on other nodes. Because each lock manager unit does not have to store all resource objects, and resource objects are only created for resources that are actually used, the overhead of the lock management system is significantly reduced. Resources are grouped in recovery domains. When a lock manager unit that supported a recovery domain fails, the recovery domain is marked invalid. All resources in the recovery domain are considered invalid unless it would have been impossible for a failed instance to have held an exclusive lock on the resource. A snapshot of lock information is made before cleanup is performed on invalid resources.Type: GrantFiled: June 25, 1996Date of Patent: July 6, 1999Assignee: Oracle CorporationInventors: Patricia Grewell, Terry N. Hayes, William Bridge, Hans Karten
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Patent number: 5911076Abstract: An emitter framework including several classes of support objects and a generic emitter class that can be subclassed to produce a new emitter for a compiler. The input to the framework is a first intermediate data structure called an abstract syntax graph which is produced by a parser within the compiler from an interface definition file. The new emitter converts the first intermediate data structure to the desired output file. The first intermediate data structure and a set of entry classes which correspond to elements in the interface definition file are input to an object graph builder. The object graph builder translates the first intermediate data structure to a second intermediate data structure called the object graph by creating instances from the set of entry classes. Typically, a new instance of a user-defined subclass of the emitter class is created by subclassing, the new emitter object instance translates the second intermediate data structure to the desired output file.Type: GrantFiled: June 14, 1993Date of Patent: June 8, 1999Assignee: International Business Machines CorporationInventors: Liane Elizabeth Acker, Michael Haden Conner, Andrew Richard Martin
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Patent number: 5907703Abstract: A computer device driver for accessing compressed files held in archives in a memory device, the device driver comprising: means for reading a compressed file from an archive in the memory device, decompressing the file in RAM and retaining the decompressed file in RAM in whole or in part so that operations to the memory device can be performed on the decompressed file by the operating system without having first to write the decompressed file to the memory device. The device driver also comprises means for accessing the file in said RAM and changing the contents of the file; and for returning the file to the archive in said memory device.Type: GrantFiled: May 8, 1996Date of Patent: May 25, 1999Assignee: Mijenix CorporationInventors: Pierre-Michel Kronenberg, Derek T. Zahn
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Patent number: 5907675Abstract: A number of methods and apparatus for managing clients of a computer server. In particular, the usher implements an orderly and predictable server deactivation and/or shut down strategy in generally the following manner. The usher continuously maintains a transaction counter indicative of the number of clients actively utilizing services. For example, the usher may increment the transaction counter when a service is requested and then decrement the transaction counter when a service is completed or terminated. However, at some point in the server operation, the usher may receive a lock up request. This may occur because a client has invoked a deactivation and/or shut down operation, or the server may decide to shut down itself. In any event, upon receiving the lock up request, the usher will not perform any new client requests. Thus the usher controls the accessibility of the server to external clients by preventing new client requests for service in preparation for shut down.Type: GrantFiled: March 22, 1995Date of Patent: May 25, 1999Assignee: Sun Microsystems, Inc.Inventor: Yeturu Aahlad
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Patent number: 5898855Abstract: A virtual machine system capable of considerably improving its performance by preventing a variation of time slice values of logical processors and strictly ensuring the concurrent running of a plurality of logical processors belonging to the same virtual machine, in the configuration and management of virtual machines of a multi-processor structure having a plurality of logical processors. A method of controlling a virtual machine running time in the virtual machine system includes collectively storing time slice values of logical processors in a virtual machine to which the logical processors belong, and making a virtual machine control program for supervising and controlling the logical processors to store and manage the time slice values.Type: GrantFiled: September 20, 1994Date of Patent: April 27, 1999Assignee: Hitachi, Ltd.Inventors: Osamu Onodera, Ken Uehara
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Patent number: 5889992Abstract: The method of the present invention is useful in a computer system having a user interface, a CPU, a memory, at least one disk drive, and an object-oriented repository, a program operating in the computer system for accessing the object-oriented repository. The program executes a method for mapping types in a model stored in the repository to language constructs for a C binding to the repository. The method first processes each type in the model, then the program processes each data type in the model. Function declarations and C to C++ wrapper functions are generated for each type and data type.Type: GrantFiled: March 28, 1996Date of Patent: March 30, 1999Assignee: Unisys Corp.Inventor: Paul Donald Koerber