Abstract: A method for handling cache misses in a computer system. A prefetch unit fetches an instruction for execution by one of a plurality of coprocessors. When the preferred embodiment of the present invention experiences a cache miss in a prefetch unit, the process for which an instruction is being fetched is passed off to a memory processor which executes a read of the missing cache line in memory. While the process is executing in memory processor, or queued by the scheduler for execution of the same instruction, the prefetch unit continues to dispatch other processes from the its queue to the other processors. Thus, the computer system, including the processors, do not stall. Processors continue to execute processes. The prefetch unit continues to dispatch processes. When the memory read is completed, the process in which the cache miss occurred is rescheduled by the scheduler. The prefetch again attempts to fetch and decode the instruction and arguments.

Abstract: A file defragmentation utility for a computer system is disclosed that enables multithreaded preemptive multi-tasking during file defragmentation. The utility includes a defragmentor routine that defragments clusters or portions of a file on a storage media and then updates one or more file system structures to indicate the new locations of the defragmented clusters of the file. An alias driver is provided that traps accesses to the file and that maintains coherent access to the file while the file system structures are updated.

Abstract: A data processing apparatus is constructed of a plurality of processors constituting a multiprocessor and couples of dual disk devices. One specific processor among the plurality of processors includes a copy executing section. All the processors are provided with data processing sections for issuing I/O write requests to the disk devices and managing sections for setting exclusive environments in some of the disk devices in accordance with indications of the copy executing sections. The copy executing section, after causing the managing section of each processor to set the exclusive area in a specific area of the disk device, effects the copy processing between the disk devices with respect to this area. When issuing the I/O write request having a high degree of importance for this exclusive area from the data processing section, however, the processing to this I/O write request is immediately executed, and, thereafter, exclusive area resetting relative to this exclusive area is carried out.

Abstract: An information processing system including a device (41) for generating a first table (33) indicating relationships between conditional items and operations, on the basis of identification symbols inserted into lists in a document, a device (42) for generating a second table (34) indicating relationships between variables in the list and external parameters, and a device (46) for generating source codes by sequentially picking up operations from the list on the basis of the first table, by using the second table. A program executing operations designated by the lists in the document is automatically generated by inputting the identification symbols.

Abstract: A data processing system including a data-memory storing data words having a first data size, and a data processor having an address generator generating addresses pointing to data of a second data size smaller than the first data size. The data processing system enables a data transfer by supplying an address to the data memory with zeros substituted for a predetermined number of least significant bits. The data processor receives a data word of the first data size corresponding to the altered address. The data processor stores data of a selected processor data size into a selected data register. If the processor data size is smaller than the first data size, then the date register stores a selected a subset of bits of the data word dependent upon the processor data size and the predetermined number of least significant address bits of said address.

Abstract: A method and system are provided for executing a service processor request within a data processing system having one or more processors within a central processing complex, each of the processors within the central processing complex including allocatable processor resources. Each of the processors within the central processing complex is provided with the capability of processing selected service processor requests by reserving a portion of the allocatable processor resources within each of the processors for such purpose. A service processor request within the central processing complex is initially processed utilizing at least one of the processors in response to receiving a service processor request, if sufficient processor resources are available to process the service processor request within the reserved portion of the allocatable resources.

Abstract: An asynchronous transport mechanism is provided for use between two or more MVS/ESA tasks on the same or different platforms using the IBM XCF facility, a global directory and a message queuing if tasks are not currently waiting for the messages arrival.A message sending task specifies a named task, which is the name of a group comprised of one or more interested message receiving tasks, that can have access to the message. The sending task is not aware of the number of receiving tasks and is only responsible for registering with a global directory and sending a single message. The message receiving task is not aware of the number of sending tasks and is only responsible for registering with a global directory and receiving a message.Two messaging options are provided to allow the task to emulate two popular types of functions. The first option allows messages to be mirrored to two or more tasks for reliability.

Abstract: A method for designing and operating a multi-processor computer system, in which data required for performing a task is determined by a first processor and then downloaded to a second processor that will execute the task. The data is associated with regions whose uses are expected by the second processor but whose actual contents are determined by the first processor. The method accommodates mutually exclusive access by both processors to memory of the second processor, while providing all data required for the task in a single read operation.

Abstract: A method and system for scheduling the execution of a plurality of threads in a computer system to control the concurrency level. Operating system data structures, called "queue objects," control the number of threads that are concurrently active processing incoming requests to an application program, a server or other processor of requests. The queue objects keep track of how many threads are currently active, and ensure that the number of active threads is at or near a predetermined target level of concurrency. By ensuring that new threads are not added to the pool of active threads if the system is operating at or above the target level of concurrency, the queue objects minimize the number of superfluous context switches that the operating system must perform and thus increases system efficiency and throughput.

Abstract: A method and apparatus for distributing data in a multiprocessing system having a plurality of nodes. Each node has a user application for issuing a blocking or a non-blocking command. A request handle identifies each non-blocking command, while being set to a null value when in blocking mode.For each requested command issued by any of the user applications, a report is generated comprising of data structures, for recording the sequence of functions to be executed asynchronously given a non-blocking command. Blocking commands are processed synchronously. Once the report is generated the sequence of functions recorded in the report are executed in the sequence presented in the report. However, whenever an internal dependency is encountered the control is returned to user application until the internal dependency is resolved. Upon completion of requested command, the user application is notified.

Abstract: The present invention is a set of common utilities, implemented as object classes, that provide common channels of communications among applications that run on a distributed platform. An application developer can program communications interfaces to other applications by creating a single application interface using these utilities. Creating this single interface simply involves abstracting an object class from a base class, and defining a few key methods. The invention allows an application developer to focus efforts on the application itself and rapidly prototype the application, by removing the need to develop communication interfaces with other applications. All requirements for inter-application communications are contained within the common utilities.

Abstract: A method and system for aggregating objects within a computer system are provided. In a preferred embodiment, the method aggregates an enclosed object within an enclosing object. The enclosed object has an object management interface and an external interface, while the enclosing object has a controlling object management interface. The controlling object management interface and the external interface of the enclosed object have query function members for receiving an identifier of an interface and for returning a reference to the identified interface. A preferred embodiment creates an instance of an enclosing object and an object to be enclosed. In static aggregation, the controlling object management interface of the enclosing object knows in advance how to return an identifier to the external interface of the enclosed object. In dynamic aggregation, an object to be enclosed is added to the enclosing object after the enclosing object is instantiated.

Abstract: In accordance with the principles of the invention, a multiprocessor scheduling and execution system and method is disclosed for signal processing tasks on P processors using a computer to schedule the execution. The method comprises representing the signal processing tasks in a manner stored within the computer so as to determine flow equations and timing constraints for the processor scheduling, performing corrected gradient descents on the stored representation of the signal processing tasks using the determined timing constraints and an error criterion until substantial convergence to a processor schedule occurs, and executing the signal processing tasks on the P processors substantially in accordance with the processor schedule.

Abstract: A program control system in a multitask environment to execute a plurality of programs in parallel. The system includes a program execution control device for controlling an execution of a plurality of programs, a first program and a second program which are mutually related, a subtask execution recognition device for recognizing a subtask execution command in the first program, and a resumption control device for resuming the first program in response to both a wait command in the first program and an end command in the second program of the task associated with the task of the first program. When the subtask execution command is recognized by the subtask execution recognition device while the first program is being executed, the second program is also executed. When the end command in the second program is detected while the first program is in a wait state under the wait command, the resumption control means allows the program execution control means to resume the first program.

Abstract: In accordance with the invention, a processing system and method are provided which use assembly line procedures and substantially fixed or limited function process elements, as well as total object treatment of all data and elements of the system, so as to provide a system which produces certifiably correct results. All objects have specifications and account entries and are managed by specification identification and by date-time or instance identification for a single member of a particular specification class. All data carry this information as "co-values." According to another aspect of the invention, a processor system and process structure are configured to execute a particular job or process specified in a process network structure or directed graph, and the process continues according to the invention as a direct flow of data between processor elements, without interruption or intervention by control elements, until job completion or the occurrence of some error condition.

Abstract: Work units are identified, managed and reported on as a group or enclave. The dispatching priorities of the work units are separated from the address spaces executing the work units. Instead, the dispatching priorities are tied to the priority of the enclave allowing work units to be executed within an address space at a priority independent from the address space. Additionally, resources used by the work units are accumulated and allocated to the requestor of the work.

Abstract: A program interpreter for computer programs written in a bytecode language, which uses a restricted set of data type specific bytecodes. The interpreter, prior to executing any bytecode program, executes a bytecode program verifier procedure that verifies the integrity of a specified program by identifying any bytecode instruction that would process data of the wrong type for such a bytecode and any bytecode instruction sequences in the specified program that would cause underflow or overflow of the operand stack. If the program verifier finds any instructions that violate predefined stack usage and data type usage restrictions, execution of the program by the interpreter is prevented. After pre-processing of the program by the verifier, if no program faults were found, the interpreter executes the program without performing operand stack overflow and underflow checks and without performing data type checks on operands stored in operand stack. As a result, program execution speed is greatly improved.

Abstract: The present invention provides a computer system and method of controlling such a system, where the system includes an operating system and memory controlled by the operating system. An allocation means is provided which is accessible by a first process and is used to create an object in a first portion of the memory. The system is characterized by a means for designating the first portion of memory as memory to be shared between a plurality of processes and an identification means for indicating to a second process the location of the object in the first portion of memory. Using this technique, instances of objects can be shared between a plurality of processes.

Abstract: The present invention relates to a firmware maintenance system, which reduces the size of the hardware and increases reliability. The firmware maintenance system maintains a station to be maintained having firmware, from a remote location. The system has a microcomputer in the station to be maintained; a non-volatile memory which includes an area for storing the firmware and managing the storing location; and a memory management unit for converting the logical address of the microcomputer and the physical (real) address of the non-volatile memory. The memory management unit transfers the firmware required to be updated as an undivided whole to the station to be maintained from the remote location, and updates and stores the transferred firmware in the non-volatile memory.

Abstract: A system for object oriented message filtering for selectively transferring a message between a client task and one or more server tasks for preprocessing, processing, and postprocessing comprises an object database having a filter object memory, an object management unit, a message transaction unit, and a locking unit. The object management unit creates a port object and one or more associated target message objects. The object management unit selectively creates one or more filter objects associated with a target message object, and selectively associates a preprocessor message object, a postprocessor message object, or both a preprocessor message object and a postprocessor message object with each filter object. The message transaction unit selectively routes a message sent by a client task and directed to a target message object to one or more associated preprocessor message objects prior to delivering the message to the target message object.