Patents Examined by Ly Hua
  • Patent number: 6021511
    Abstract: This invention discloses a processor with a plurality of execution units integrated into a chip. The execution unit has an initial failure signal output device which provides an initial failure signal when there is an initial failure in its own execution unit. Further, the execution unit has an operating failure detection device which detects and provides an operating failure signal when there is a passage-of-time failure in its own execution unit. A count device for counting the number of normally operable execution units is provided which receives initial failure signals or passage-of-time failures, as fault information, from faulty execution units if any and which finds, based on the fault information, the number of normally operable execution units. An operable execution unit selection allocation device is provided which allocates, according to the fault information, instructions, only to normally operable execution units.
    Type: Grant
    Filed: February 27, 1997
    Date of Patent: February 1, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hiraku Nakano
  • Patent number: 5991517
    Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement individually verifies the states of a plurality of cells that are being programmed in parallel in order to terminate the programming, as a result of the verification, on a cell-by-cell basis as the cells reach their programmed states.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: November 23, 1999
    Assignee: SanDisk Corporation
    Inventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
  • Patent number: 5974548
    Abstract: A method and apparatus for providing media-independent security for a document may be programmed to create a document file having two or more components. In one embodiment, a document may include a background object, an image object (e.g. text, graphic, both, or the like), and a watermark object. When output, the image object is directly interpretable by a user. Meanwhile, in the background object, watermark object, or both, a high-resolution pattern may be stored to be output with all copies of the document. Encoded in some binary symbol in the pattern is security data. Resolution is high enough that the binary symbols are undetectable by a human eye. A processor may be programmed to recognize (e.g. read) the pattern, decode the pattern into binary data, and decode the binary data to characters directly interpretable by a user. Information relating to creation and control of a document, signature, or the like, may all be encoded independent from the principal image (e.g.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: October 26, 1999
    Assignee: Novell, Inc.
    Inventor: Phillip M. Adams
  • Patent number: 5963718
    Abstract: A control field in a store-in cache memory in a multi-processor system includes a valid bit, an exclusive bit, and a clean bit. An error in the control field is not only detectable but also correctable by a control field correction circuit. The control field correction circuit includes a mode register holding inhibit correction flags, inhibit correction-in-part flags, and detect inconsistency flags.
    Type: Grant
    Filed: June 19, 1996
    Date of Patent: October 5, 1999
    Assignee: NEC Corporation
    Inventor: Midori Muramatsu
  • Patent number: 5958065
    Abstract: A method of storing data to a defective memory device includes first receiving a memory address and a plurality of data bits. Next, a content addressable memory is interrogated with the memory address. Then, at least one data bit of the plurality of data bits is stored in the defective memory device. If the memory address is found in the content addressable memory, then at least one data bit of the plurality of data bits is stored in the content addressable memory.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: September 28, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Dean A. Klein
  • Patent number: 5956481
    Abstract: Protection of data files on a computer system from infection or damage by a computer virus. A virus protection system can detect either an external or internal open file event for a file maintained on a local or remote computer. Typically, the protection system is implemented as an internal component of the program module that processes the files protected by the protection system. Prior to responding to a detected open file event, an inquiry is conducted to determine whether the file is likely to contain a virus. If so, a notice is generated to indicate that the file may contain a virus, thereby advising of the possible danger of spreading the virus to other files if the file opening is completed. If the file is not likely to contain the virus, the response to the detected open file event is completed by opening the file for processing by the program module.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: September 21, 1999
    Assignee: Microsoft Corporation
    Inventors: James E. Walsh, Ebbe H. A. Altberg
  • Patent number: 5956479
    Abstract: A human oriented object programming system (HOOPS) and its debugger provide an interactive and dynamic modeling system to assist in the incremental generation of symbolic information of computer programs which facilitates the development of complex computer programs such as operating systems and large applications with graphic user interfaces (GUIs). A program is modeled as a collection of units called components. A component represents a single compilable language element such as a class or a function. One major functionality built on HOOPS is the debugger, using symbolic properties. The database stores the components and properties. The debugger, using a GUI, displays to the user the execution state of the program. To display the execution state in terms of the programmer's source code, the debugger demands retrieval and/or generation of the symbolic properties of the program.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: September 21, 1999
    Assignee: Object Technology Licensing Corporation
    Inventors: Peter J. McInerney, Lawrence L. You, Michael D. Wimble
  • Patent number: 5926620
    Abstract: A method of storing data to a defective memory device includes first receiving a memory address and a plurality of data bits. Next, a content addressable memory is interrogated with the memory address. Then, at least one data bit of the plurality of data bits is stored in the defective memory device. If the memory address is found in the content addressable memory, then at least one data bit of the plurality of data bits is stored in the content addressable memory.
    Type: Grant
    Filed: August 21, 1997
    Date of Patent: July 20, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Dean A. Klein
  • Patent number: 5911779
    Abstract: A fault-tolerant storage device array using a copyback cache storage unit for temporary storage. When a Write occurs to the RAID system, the data is immediately written to the first available location in the copyback cache storage unit. Upon completion of the Write to the copyback cache storage unit, the host CPU is immediately informed that the Write was successful. Thereafter, further storage unit accesses by the CPU can continue without waiting for an error-correction block update for the data just written. In a first embodiment of the invention, Read-Modify-Write operations are performed during idle time. In a second embodiment of the invention, normal Read-Modify-Write operation by the RAID system controller continue use Write data in the controller's buffer memory. In a third embodiment, at least two controllers, each associated with one copyback cache storage unit, copy Write data from controller buffers to the associated copyback cache storage unit.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: June 15, 1999
    Assignee: EMC Corporation
    Inventors: David C. Stallmo, William A. Brant
  • Patent number: 5908469
    Abstract: The present invention provides a system and method of performing user authentication on web based applications, such as IBM's Network Station Configuration Preference Manager. In particular, the system and method saves and continuously passes user information back and forth between a web client and a web server. The user information can then be used by CGI programs being executed on the web server for authentication purposes. Specifically, each CGI program will examine the user information, determine the authority privileges of the user, run the CGI program under a non-default user mode, return user information back to the web client, and return the CGI job to run in a default user mode.
    Type: Grant
    Filed: February 14, 1997
    Date of Patent: June 1, 1999
    Assignee: International Business Machines Corporation
    Inventors: Patrick Samuel Botz, Thomas Michael Moskalik, Devon Daniel Snyder, Carol Jean Woodbury
  • Patent number: 5907670
    Abstract: An electronic switching system having a plurality of processors connected to an internal switching network in a chain structure of a linked list form and a maintenance processor for checking status of each individual processor connected to the internal switching network. The status of the processors is checked through a mutual status checking process between unit processors, and if any processor contains any abnormality, such abnormal status of the processor is notified to the maintenance processor.
    Type: Grant
    Filed: July 24, 1996
    Date of Patent: May 25, 1999
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Kwang-Bae Lee
  • Patent number: 5905738
    Abstract: A digital bus monitor used to observe data on a bus (14, 16, 18) connecting multiple integrated circuits (10, 12) comprises a memory buffer (30), bypass register (34), test port (38) and output control circuits (42, 46) controlled by an event qualifying module (EQM) (32). In response to a matching condition the EQM (32) may perform a variety of tests on incoming data while the integrated circuits (10, 12) continue to operate at speed. A plurality of digital bus monitors (20, 22) may be cascaded for observation and test of variable width data buses and variable width signature analysis.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: May 18, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Lee Doyle Whetsel
  • Patent number: 5905860
    Abstract: A licensing system provides enhanced flexibility for licensing applications in a network. The licensing system includes a directory services database which stores all license information. The directory services database is accessed by providing a request to a license service provider associated with a server. The license service provider generates an executable entity based on the request parameters, which searches the database and, if the appropriate units are available, assembles a license. The license and the application are then transmitted to the requesting client. All aspects of the transaction are also stored in a database organized according to a transaction's relation to a particular license.
    Type: Grant
    Filed: February 24, 1997
    Date of Patent: May 18, 1999
    Assignee: Novell, Inc.
    Inventors: James E. Olsen, Adam L. Bringhurst
  • Patent number: 5894549
    Abstract: A method for fault detection in microcontroller program memory includes a new move instruction. An address of program instruction data is placed in a word register and a mode register. The new address points to a new instruction in a program memory. The program instruction data is read from the program memory into an instruction register and then transferred from the instruction register to the word register and the mode register. The contents of the word register and the mode register are then written to a data memory. With the program instruction data now available in the data memory, the new instruction can be tested for data integrity and validity using, for example, fault detection mechanisms or processes. A system for fault detection to check instructions or data in the program memory for data integrity and validity in a program memory also is disclosed.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: April 13, 1999
    Assignee: Scenix Semiconductor, Inc.
    Inventor: Chuck Cheuk-wing Cheng
  • Patent number: 5892905
    Abstract: The present invention provides the capability to easily access many different application programs over the WWW via a common user interface. By providing standard procedures, routines, tools, and software "hooks" for accessing software applications over the WWW, software developers can concentrate on the functionality of the application program and easily use HTML to provide a GUI interface for the application program. HTML is a well-known language which can be used by almost any computer system on the market today. In addition, since HTML is a fairly well controlled and standardized language, new software application features can be added as they are developed and supported by HTML. In addition, since HTML is a widely adopted, non-proprietary technology, the present invention can provide open access to a large market for even very small software developers.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: April 6, 1999
    Assignee: International Business Machines Corporation
    Inventors: Marcia Lynn Brandt, Kenneth Edgar Brown, Pernell James Dykes, Erik Duane Lindberg, Diane Elaine Olson, Jeffrey Edward Selden, Devon Daniel Snyder, James Orrin Walts
  • Patent number: 5889933
    Abstract: A RAID system that uses non-volatile random access memory (NVRAM) to greatly reduce the chance of loss of data due to an AC power failure. This RAID system has two write modes. In a normal write mode, a host computer receives a write confirmation once an array controller receives data from the host computer. In a safe write mode, however, the array controller copies to NVRAM all data received from the host computer for writing to disk drives. In this safe write mode, the array controller sends the write confirmation to the host computer only after storing the data in NVRAM. To switch appropriately between the normal and safe write modes, the array controller polls a power-out flag provided by a UPS (uninterruptable power supply) to determine whether there has been an AC power failure. The array controller switches between the two write modes depending on the status of the power-out flag.
    Type: Grant
    Filed: January 30, 1997
    Date of Patent: March 30, 1999
    Assignee: AIWA Co., Ltd.
    Inventor: Gerald E. Smith
  • Patent number: 5881225
    Abstract: Security functions for a computer system are controlled by a security monitor. A user desiring access to the system inputs a user identification and password combination, and a role the user to assume is selected from among one or more roles defined in the system. Upon being validated as an authorized user performing a particular role, the user is then authorized to perform certain functions and tasks specifically and to see information associated with that role (and optimally the work group the user is assigned). For some users, no role or a "null" roll is chosen, and authorization for certain functions and tasks is accomplished due to that particular user having been predefined by an administrator as being allowed to perform those functions and tasks, usually due to the predefined privileges associated with the work group(s) to which the user belongs.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: March 9, 1999
    Assignee: Araxsys, Inc.
    Inventor: Erik K. Worth
  • Patent number: 5872909
    Abstract: The present invention logs events which occur in the target software, and stores these in a buffer for periodic uploading to a host computer. Such events include the context switching of particular software tasks, and task status at such context switch times, along with events triggering such a context switch, or other events. The host computer reconstructs the real-time status of the target software from the limited event data uploaded to it. The status information is then displayed in a user-friendly manner. This provides the ability to perform a logic analyzer function on real-time software. A display having multiple rows, with one for each task or interrupt level, is provided. Along a time line, an indicator shows the status of each program, with icons indicating events and any change in status.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 16, 1999
    Assignee: Wind River Systems, Inc.
    Inventors: David N. Wilner, Colin Smith, Robert D. Cohen, Dana Burd, John C. Fogelin, Mark A. Fox, Kent D. Long, Stella M. Burns
  • Patent number: 5872913
    Abstract: The present invention is directed to a system and method of measuring performance data utilizing state transitions within a computer system. A number of system states are defined, and the transitions from one state to another are tracked. At each state transition, performance properties related to the computer system may be checked or calculated, and performance data added to a table or tables. The present invention allows performance data to be measured in a way that is highly precise and has minimal effects on the system performance being measured. The act of measuring performance data utilizing state transitions does not create a misleading measure of performance nor does it adversely impact system performance. Furthermore, the present invention requires minimal changes to the operating system and no changes to application code.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: February 16, 1999
    Assignee: International Business Machines Corporation
    Inventors: Robert F. Berry, Maurice P. Franklin, Weiming Gu, William Henry Hartner
  • Patent number: 5870539
    Abstract: A computer implemented method and computer system for testing a target software product is presented. The method includes constructing a finite state machine in which portions of the target product are ascribed to states of the state machine. The state machine may correspond to a predetermined test case for the target software product. A number of state functions are provided, each of the state functions performing at least one verification on the target software product. The state functions also may include transitioning from one state to the next, for example, by a "next window" a "previous window" action if the target software program is a windows based program. The state functions may also verify that a current state in which the state machine exists is a correct state, may verify information that is supposed to have been written to a memory is written in fact to the memory, and may verify that the path to the information is correct.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: February 9, 1999
    Assignee: Sun Microsystems, Inc.
    Inventor: Daniel H. Schaffer