Abstract: A semiconductor device is disclosed. One embodiment includes a first semiconductor die having a normally-off transistor. In a second semiconductor die a plurality of transistor cells of a normally-on transistor are formed, wherein one of a source terminal/drain terminal of the normally-on transistor is electrically coupled to a gate terminal of the normally-on transistor and the other one the source terminal/drain terminal of the normally-off transistor is electrically coupled to one of a source terminal/drain terminal of the normally-on transistor. The second semiconductor die includes a gate resistor electrically coupled between the gate terminal of the normally-off transistor and respective gates of the plurality of transistor cells. A voltage clamping element is electrically coupled between the gate terminal and the one of the source terminal/drain terminal of the normally-on transistor.

Abstract: A method of fabricating a memory device is provided that may begin with forming a layered gate stack overlying a semiconductor substrate and patterning a metal electrode layer stopping on the high-k gate dielectric layer of the layered gate stack to provide a first metal gate electrode and a second metal gate electrode on the semiconductor substrate. In a next process sequence, at least one spacer is formed on the first metal gate electrode overlying a portion of the high-k gate dielectric layer, wherein a remaining portion of the high-k gate dielectric is exposed. The remaining portion of the high-k gate dielectric layer is etched to provide a first high-k gate dielectric having a portion that extends beyond a sidewall of the first metal gate electrode and a second high-k gate dielectric having an edge that is aligned to a sidewall of the second metal gate electrode.

Abstract: Provided is a light-emitting device which has a simple structure and can be manufactured in a simple process, has increased light coupling efficiency and brightness, and can reduce adverse effects of optical resonance on a view angle and emission spectrum. The light-emitting device includes a substrate; a light-emitting diode formed on the substrate; and an optical resonance layer formed outside the light-emitting diode that induces resonance of light emitted from the light-emitting diode.

Abstract: A head-related transfer function measurement method includes the steps of: first measuring, including placing an acousto-electric conversion unit nearby both ears of a listener where placement of an electro-acoustic conversion unit is assumed, picking up sound waves emitted at a perceived sound source position with the acousto-electric conversion unit in a state with a dummy head or a human at the listener position, and measuring a head-related transfer function from only the sound waves directly reaching the acousto-electric conversion unit; second measuring, including picking up sound waves emitted at a perceived sound source position with the acousto-electric conversion unit, with no dummy head or human at the listener position, and measuring a natural-state transfer property from only the sound waves directly reaching the acousto-electric conversion unit; normalizing the head-related transfer function with the natural-state transfer property to obtain a normalized head-related transfer function; which is

Abstract: In order to form a plurality of semiconductor elements over an insulating surface, in one continuous semiconductor layer, an element region serving as a semiconductor element and an element isolation region having a function to electrically isolate element regions from each other by repetition of PN junctions. The element isolation region is formed by selective addition of an impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and an impurity element that imparts an opposite conductivity type to that of the adjacent element region in order to electrically isolate elements from each other in one continuous semiconductor layer.

Abstract: A semiconductor device includes a bonding pad, and an area designation marking, wherein the bonding pad includes a first region, a second region, and a third region placed between the first region and the second region, wherein the area designation marking includes a first area designation mark configured to designate a first boundary between the first region and the third region and a second area designation mark configured to designate a second boundary between the second region and the third region, wherein the first region and the second region are configured to be contacted with a test probe. The first area designation mark includes a first notch or a first protrusion. The second area designation mark includes a second notch or a second protrusion. The first area designation mark includes a first pair of notches that is linearly spaced apart from each other to designate the first boundary line.

Abstract: An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.

Abstract: A mask-defined read-only memory array is formed on a substrate, and includes a first ROM bit and a second ROM bit of opposite polarities. The first ROM bit has a first MOS transistor and a first block layer formed over a first region of the substrate. A second source/drain region of the first MOS transistor and a first diffusion region are formed in a first region of the substrate on opposite sides of the first block layer. The second ROM bit includes a second MOS transistor.

Abstract: A solder-top enhanced semiconductor device is proposed for packaging. The solder-top device includes a device die with a top metal layer patterned into contact zones and contact enhancement zones. At least one contact zone is electrically connected to at least one contact enhancement zone. Atop each contact enhancement zone is a solder layer for an increased composite thickness thus lowered parasitic impedance. Where the top metal material can not form a uniform good electrical bond with the solder material, the device die further includes an intermediary layer sandwiched between and forming a uniform electrical bond with the top metal layer and the solder layer. A method for making the solder-top device includes lithographically patterning the top metal layer into the contact zones and the contact enhancement zones; then forming a solder layer atop each of the contact enhancement zones using a stencil process for an increased composite thickness.

Abstract: A vertical heterojunction bipolar transistor (HBT) includes doped polysilicon having a doping of a first conductivity type as a wide-gap-emitter with an energy bandgap of about 1.12 eV and doped single crystalline Ge having a doping of the second conductivity type as the base having the energy bandgap of about 0.66 eV. Doped single crystalline Ge having of doping of the first conductivity type is employed as the collector. Because the base and the collector include the same semiconductor material, i.e., Ge, having the same lattice constant, there is no lattice mismatch issue between the collector and the base. Further, because the emitter is polycrystalline and the base is single crystalline, there is no lattice mismatch issue between the base and the emitter.

Abstract: An electronic circuit on a semiconductor substrate having isolated multiple field effect transistor circuit blocks is disclosed. In some embodiment, an apparatus includes a substrate, a first semiconductor circuit formed above the substrate, a second semiconductor circuit formed above the substrate, and a MuGFET device overlying the substrate and electrically coupled to the first semiconductor circuit and the second semiconductor circuit, wherein the MuGFET device provides a signal path between the first semiconductor circuit and the second semiconductor circuit in response to an input signal.

Abstract: One of the objects of the present invention is to provide a thin film transistor using an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn), in which the contact resistance between the oxide semiconductor layer and a source and drain electrodes is reduced, and to provide a method for manufacturing the thin film transistor. An ohmic contact is formed by intentionally providing a buffer layer having a higher carrier concentration than the IGZO semiconductor layer between the IGZO semiconductor layer and the source and drain electrode layers.

Abstract: A process for manufacturing a semiconductor device, in which a current flows in a deflected part that includes a semiconductor, includes forming a straight beam having a doubly-clamped beam structure that includes the semiconductor by forming a void under the beam, filling the void with a liquid, and contacting a center of the beam with a bottom of the void by drying the liquid to form the deflected part.

Abstract: We describe the use of a high-quality-factor torsional resonator of microscale dimensions. The resonator has a paddle that is supported by two nanoscale torsion rods made of a very low thermal conductivity material, such as amorphous (“a-”) silicon. The body of the torsion paddle is coated with an infrared-absorbing material that is thin and light weight, but provides sufficient IR absorption for the applications. It may be placed above a reflecting material of similar dimensions to form a quarter wave cavity. Sensing of the response of the paddle to applied electromagnetic radiation provides a measure of the intensity of the radiation as detected by absorption, and the resulting temperature change, in the paddle.

Abstract: Provided are sound field reproducing apparatus and method. The sound field reproducing apparatus includes an input unit for receiving reflection reproducing information, a signal processor for selecting loudspeakers and calculating reflection signal for applying a panning algorithm based on the reflection reproducing information, a signal treatment unit for localizing the calculated reflection signal on a virtual sound image according to the panning algorithm; and a reproducer for reproducing the localized reflection signals through the selected loudspeakers.

Abstract: A semiconductor device includes an NMOS transistor and a PMOS transistor. The NMOS transistor includes a channel area formed in a silicon substrate, a gate electrode formed on a gate insulating film in correspondence with the channel area, and a source area and a drain area formed in the silicon substrate having the channel area situated therebetween. The PMOS transistor includes another channel area formed in the silicon substrate, another gate electrode formed on another gate insulating film in correspondence with the other channel area, and another source area and another drain area formed in the silicon substrate having the other channel area situated therebetween. The gate electrode has first sidewall insulating films. The other gate electrode has second sidewall insulating films. The distance between the second sidewall insulating films and the silicon substrate is greater than the distance between the first sidewall insulating films and the silicon substrate.

Abstract: Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.

Abstract: A circuit board for a light emitting diode package improved in heat radiation efficiency and a manufacturing method thereof. In a simple manufacturing process, insulating layers are formed by anodizing on a portion of a thermally conductive board body and plated with a conductive material. In the light emitting diode package, a board body is made of a thermally conductive metal. Insulating oxidation layers are formed at a pair of opposing edges of the board body. First conductive patterns are formed on the insulating oxidation layers, respectively. Also, second conductive patterns are formed in contact with the board body at a predetermined distance from the first conductive patterns, respectively. The light emitting diode package ensures heat generated from the light emitting diode to radiate faster and more effectively. Additionally, the insulating layers are formed integral with the board body by anodizing, thus enhancing productivity and durance.

Abstract: A solid-state imaging device includes an imaging element, an external terminal, an insulating film, a through-electrode and a first electrode. The imaging element is formed on a first major surface of a semiconductor substrate. The external terminal is formed on a second major surface opposing the first major surface of the semiconductor substrate. The insulating film is formed in a through-hole formed in the semiconductor substrate. The through-electrode is formed on the insulating film in the through-hole and electrically connected to the external terminal. The first electrode is formed on the through-electrode on the first major surface of the semiconductor substrate. When viewed from a direction perpendicular to the first major surface of the semiconductor substrate, an outer shape with which the insulating film and the semiconductor substrate are in contact is larger than an outer shape of the first electrode.

Abstract: Various structures of a programmable semiconductor interposer for electronic packaging are described. An array of semiconductor devices having various values is formed in the interposer. A user can program the interposer and form a “virtual” device having a desired value by selectively connecting various one of the array of devices to contact pads formed on the surface of the interposer. An inventive electronic package structure includes a standard interposer having an array of unconnected devices of various values and a device selection unit, which selectively connects various one of the array of devices in the standard interposer to an integrated circuit die encapsulated in the electronic package. Methods of forming the programmable semiconductor interposer and the electronic package are also illustrated.