Abstract: A digital signal processor for performing phase or frequency signal processes, for example, demodulating processes of modulation signals such as PSK signals. This processor is provided with amplitude-to-phase converting means which receives two digital input signal series that are respectively expressed by a plurality of bits and that have a quadrature phase relation with each other, and which outputs the digital phase information signal corresponding to a combination of the digital values of those input signal series, this combination being amplitude information. This processor then supplies the phase information signal which is outputted from the amplitude-to-phase converting means to signal processing means, thereby digitally processing the phase information signal.

Abstract: An FM data receiver of the offset type, in which the local oscillator frequency is located between the two frequency-shift-keyed signalling frequencies. To counter the effects of drift in the local oscillator, a simple AFC system mixes the signalling tone signals with delayed signals to provide a frequency control signal.

Abstract: A receiver for bandspread signals having a pseudo-random code stored in the receiver for synchronization with a pseudo-random code (PRC) of a received and modulated signal for recovering the modulation utilizing control loops. The modulated carrier signal is frequency converted, digitized and then multiplied by the stored PRC. The signal provided is sampled at twice the rate at which the PRC is read out of memory and provided to a counter forming I and Q signals from the counter output values in the control loops for determining a plurality of controlled variables required for synchronization and demodulation.

Abstract: An adaptive bit synchronizer is operable to extract digital data and its associated clock from a transmitted digital signal, and includes a tunable matched filter set for modifying the input signal to correct for deviations in offset and gain, which filter set includes data, transition and derivative matched filters. A sampling device samples the output of the data matched filter for making bit decision and for estimating the reliability thereof. A clock-producing device is connected with the matched filter set for producing at least two clocks, use being made of an optimum phase detector for estimating the time error between the proper clock edge and the actual clock edges. A loop filter circuit smooths the estimates of the proper clock time to generate clock signals, and a device responsive to the average square error of the clock signals varies the loop parameters of the loop filter means to minimize average square phase error.

Abstract: A radio pager for receiving FSK signals has optimally narrow gaussian bandpass filters (F1, F2) and a phase lock loop (11, 12, 13, 14) for preventing local oscillator drift controlled in dependence of the derivation frequency (.+-.4.5 KHz) which is accurately controlled at the transmitter and which is derived from the decoder logic circuit (20).A significant increase in sensitivity is achieved over existing pagers.

Abstract: For use in cancelling a distortion caused by multipath transmission to an original radio frequency pulse of an original pulse shape, a multipath canceller comprises a priliminary circuit for producing a distortionless pulse of the original pulse shape and a distortion cancelling circuit responsive to the distortionless pulse and each distorted pulse having the distortion for producing a distortion cancelled pulse at a correct pulse position which the original pulse would have if received through a direct path alone. The preliminary circuit may comprise a memory for the distortionless pulse.

Abstract: A method by which substations in a multiple access communication system, such as a mobile radio system, may access the base station. Access is determined by the base station in accordance with any of a plurality of operating modes during successive message time frames, the particular mode being determined by the base station from an estimate of prevailing traffic conditions. The selected operating mode during any frame is signified by a code and parameters transmitted by the base station in an Aloha invitation message which establishes such mode and the dynamic operation of the substations in that mode. The operating modes include a light traffic mode, a dynamic frame-length mode, a hybrid mode in which subsets of the population of the substations are formed, and a polling mode.

Abstract: A multipoint radio system has a single node which communicates with a plurality of outstations on one frequency. The outstations using a different single frequency to communicate with the node. The node controls the transmission frequency at the outstations, e.g. by transmitting error signals which adjust the set points of frequency control loops in the outstations. In a preferred embodiment the node allows for residual errors by adjusting the decision threshold of its regenerator to the outstation on transmission.

Abstract: The specification discloses a method and apparatus for encoding and decoding a variable length augmented code for use in the transmission of sequential information as an indefinite length string of data. Both binary and alternate character code sets are discussed for transmitting and translating information. The variable length code symbols are self synchronizing, and will automatically reestablish synchronization within two characters if a bit or number of bits is lost through noise or faulty transmission. The resynchronization is automatic and occurs by virtue of the construction of the variable length augmented codes. In addition, a method and means of creating a fixed length depleted code for use in digital processors and digital storage media is also disclosed.

Abstract: The circuit comprises two registers (SR12, SR8) which temporarily memorize uncompressed and compressed PCM words, respectively. The uncompressed word is sequentially read and a counter (CNT) counts the number of zeroes present in the most significant positions of the absolute value of the word. The compressed word is composed, in the corresponding register, of the sign bit of the uncompressed word, followed by the counting bits of the counter and by the bits of the positions of the uncompressed word following those of the counted zeroes.

Abstract: An electronic switching circuit for providing solid state switching of a plurality of incoming radio frequency information channels, with the circuit providing a pulse processor for altering the timing of the incoming channels, comparator/integrator circuitry for redefining the pulse width of the incoming channels with reference to a standard voltage level, level translator circuitry for further redefining the input channel level, and radio frequency selection gates for error-free discrimination and selection among the incoming channels.

Abstract: A radio system broadcasts binary data packets that can be received in mob receivers. The initial parts of the packets are transmitted periodically. The prefix of each packet includes synchronizing information. The synchronization processing includes seeking a phase and a tracking phase. The transition from the seeking to the tracking phases occurs when the synchronization pattern has been received two consecutive times with a null Hamming distance.

Abstract: A diversity system of the selection type for correcting phase ambiguities among a plurality of differentially encoded digital signals while retaining the digital encoding of those signals. With this system, no differential decoding/encoding means are needed in relay units of the system. Thus, differentially encoded digital signals may be sent through relay systems containing error correcting MODEMs without the additional complication of differential decoding/encoding circuitry.

Abstract: A clock acquisition indicator circuit for NRZ "data", "which requires" two clock signals advanced and retarded by 90-degrees from the recovered clock. The circuit partitions each cycle of recovered clock into a half-cycle in which transitions should occur and a half-cycle in which transitions should not occur. The transitions ideally occur at only one instant in each cycle (when the clock goes positive), but the widening of the window to an entire half-cycle centered on this instant allows for phase noise on the NRZ data transitions and phase jitter in the recovered clock. The remaining half-cycle (which is centered on the instant when the clock goes negative) is a window during which transitions should not occur. The density of transitions in each of these windows is output as analog voltages which may be processed to determine the prevailing state from among three possible conditions.

Abstract: A timing recovery circuit for recovering timing signals out of split phase or Manchester coded data, comprising dotting (DOT), frame synchronization (FS) and information (DATA) in digital form. A digital voltage controlled oscillator (VCO) provides a signal whose frequency is twice that of the timing signal of the split phase signal and a frequency divider generates a signal whose frequency is equal that of the timing signal. The outputs of the VCO and the frequency divider are selectively applied to a phase detector, also having as an input the split phase signal, for the generation of a feedback control signal, depending on whether the split phase signal is advanced or delayed. The higher-frequency VCO signal is applied during the DATA segment of the incoming signal while the frequency divider signal is applied during the DOT and FS segments.

Abstract: A technique for reducing the average fade duration of signals in a radio system by simulating motion of a plurality of transmitting antennas is disclosed. This simulation is accomplished by slowly and continuously varying a characteristic of the modulated carrier signal supplied to the antennas. The altered characteristic can either be the power of the modulated carrier signal supplied to each of the antennas or the phase between modulated carrier signals coupled to the antennas. This technique can also be applied at a receiver to reduce the average fade duration of signals arriving thereat by simulating motion of a plurality of receiving antennas.

Abstract: A digital transmission system using standard FM broadcast stations employs an SCA subcarrier which is amplitude modulated with a second subcarrier modulated to have different phase orientations representative of digital data. Bits are separated from a digital data stream in groups and are differentially encoded into one of at least four phase orientations of the second subcarrier. The amplitude modulated SCA subcarrier is combined with the stereo signal output of a stereo multiplexer to form the modulating signal for the station FM modulator. The receiver includes a differential phase detector for reconstruction of the differentially encoded digital data.A system which additionally includes means for modulating the SCA subcarrier with a composite signal having an audio signal in addition to the differentially encoded second subcarrier is disclosed.

Abstract: A short pulse of a small leading phase angle deviation of the carrier frequency at the start of a clock period and a short pulse of a small lagging phase angle deviation of the carrier frequency at the middle of a clock period encodes a digital one, while a short pulse of a lagging phase angle deviation of the carrier frequency at the middle of a clock period encodes a digital zero. Resistances are switched to directly deviate a low level carrier. The digital phase lock loop demodulator has an output digital one pulse derived from the negative pulse response of its phase comparator to the leading phase angle and has coherent clock pulses derived from its positive pulse response to the lagging phase angle at the middle of every bit. Information is contained in the abrupt pulses of phase transitions from an average constant phase carrier frequency. No reference carrier is needed for demodulation.

Abstract: The present invention relates to a process for the noncoherent demodulation of a linearly modulated digital signal with energy by constant symbol and a demodulator for performing this process. The process consists of demodulating a linearly modulated signal by a sequence of information symbols .alpha..sub.0, . . . , .alpha..sub.N-1 to which has been added a Gaussian white noise. The signal received is processed by the demodulator in order to obtain sequences of blocks of L data, containing all the information of the received signal. By means of a recursive algorithm, from said data is deduced a sequence of symbols .alpha..sub.0, . . . , .alpha..sub.N-1, maximizing an approximate probability function. The invention more particularly applies to satellite links and to vehicle radio communications.

Abstract: A sinusoidal test signal of a given frequency is applied by the generator 12 to the transmission channel 10. The output signal from the channel is sampled at 16 and fed to a Hilbert transformer 20 through an ADC 18. The sampled outputs from the Hilbert transformer are fed to a device 26 which derives therefrom the phase of the received signal. The phase of the test signal generated at 30-34 is subtracted from that of the output signal from device 26 and the resultant signal is fed to a phase filter 36, which removes therefrom the phase intercept and frequency shift components. The output from filter 36 is fed to a predictive filter 40 which removes the residual noise therefrom. A detector 42 measures the variations of the phase jitter values provided by predictive filter 40.