Patents Examined by Maki Angadi
  • Patent number: 9308153
    Abstract: A method for the surface preparation of devices made of titanium or titanium alloys, zirconium, zirconia, alumina or zirconia/alumina compounds, stainless steels and cobalt-base superalloys for medical use; the devices being implantable in the human body or in animals and attached extracorporeal parts made with the same materials, particularly for dental and orthopedic implantology. The implantable device is treated by exposing at least one portion of the surface of the device to a solution including hydrofluoric acid, phosphoric acid, at least one surfactant substance and water; for a time period and in conditions sufficient to provide the surface of the implant with the desired surface roughness and the formation of self-induced surface titanium dioxide, maintaining the structural integrity of the device and without altering the centesimal measurement size. The surface thus is rinsed with demineralized water and ultrasounds in order to prevent metalosis phenomena.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: April 12, 2016
    Inventor: Cristiano Ugo Ciranni
  • Patent number: 9312064
    Abstract: A first layered structure includes a magnetic layer, a first hard mask layer, a second hard mask layer, and a first stepping layer. The first stepping layer is etched through to create a sidewall. A mask-width definition layer is deposited on and adjacent to the sidewall, until a mask-width definition layer thickness is achieved adjacent to the sidewall. The mask-width definition layer is removed except on the sidewall. The first stepping layer is removed. The second hard mask layer is etched away, except for a remainder of the second hard mask layer beneath the mask-width definition layer. The first hard mask layer is etched away around the remainder of the second hard mask layer, to form a dual layer hard mask comprising the remainder of the second hard mask layer and the remainder of the first hard mask layer. The magnetic layer is ion milled around the dual hard mask.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: April 12, 2016
    Assignee: Western Digital (Fremont), LLC
    Inventors: Miao Wang, Wei Gao, Lingyun Miao, Hai Sun, Ming Mao
  • Patent number: 9309598
    Abstract: Methods are described herein for etching metal films which are difficult to volatize. The methods include exposing a metal film to a chlorine-containing precursor (e.g. Cl2). Chlorine is then removed from the substrate processing region. A carbon-and-nitrogen-containing precursor (e.g. TMEDA) is delivered to the substrate processing region to form volatile metal complexes which desorb from the surface of the metal film. The methods presented remove metal while very slowly removing the other exposed materials. A thin metal oxide layer may be present on the surface of the metal layer, in which case a local plasma from hydrogen may be used to remove the oxygen or amorphize the near surface region, which has been found to increase the overall etch rate.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: April 12, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Jie Liu, Anchuan Wang, Nitin K. Ingle, Jeffrey W. Anthis, Benjamin Schmiege
  • Patent number: 9305771
    Abstract: An embodiment includes a method comprising: etching a material to expose a metal component in a metal layer, which is located on a substrate, while the substrate is in an etch chamber that is under vacuum; and performing an ash process on the metal component while the substrate is still in the etch chamber that is still under vacuum; wherein the material includes at least one of a dielectric and a mask and the metal component includes at least one of an interconnect, a via, and a contact. Other embodiments are described herein.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: April 5, 2016
    Assignee: Intel Corporation
    Inventors: Shakuntala Sundararajan, Nadia M. Rahhal-Orabi
  • Patent number: 9305793
    Abstract: A wafer processing method for forming a via hole in a wafer. The wafer processing method includes a filament forming step of applying a pulsed laser beam to the wafer, the pulsed laser beam having a transmission wavelength to the wafer, in the condition where the focal point of the pulsed laser beam is set inside the wafer in a subject area where the via hole is to be formed, thereby forming an amorphous filament inside the wafer in the subject area, and an etching step of etching the amorphous filament formed inside the wafer by using an etching agent to thereby form the via hole inside the wafer.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: April 5, 2016
    Assignee: Disco Corporation
    Inventors: Hiroshi Morikazu, Noboru Takeda
  • Patent number: 9299575
    Abstract: Methods of evenly etching tungsten liners from high aspect ratio trenches are described. The methods include a remote plasma etch using plasma effluents formed from a fluorine-containing precursor and a high flow of helium. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with tungsten coating a patterned substrate having high aspect ratio trenches. The plasmas effluents react with exposed surfaces and evenly remove tungsten from outside the trenches and on the sidewalls of the trenches. The plasma effluents pass through an ion suppression element positioned between the remote plasma and the substrate processing region. Optionally, the methods may include concurrent ion bombardment of the patterned substrate to help remove potentially thicker horizontal tungsten regions, e.g., at the bottom of the trenches or between trenches.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: March 29, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Seung Park, Xikun Wang, Jie Liu, Anchuan Wang, Sang-jin Kim
  • Patent number: 9299579
    Abstract: An etching method of selectively etching a first region formed of silicon oxide with respect to a second region formed of silicon nitride includes: a process (a) and a process (b). In the process (a), a target object is exposed to plasma of a fluorocarbon gas and a thickness of a protective film on the second region is larger than a thickness of a protective film formed on the first region. In the process (b), the first region is etched by plasma of a fluorocarbon gas. In the process (a), a temperature of the target object is set to 60° C. or more to 250° C. or less.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: March 29, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Maju Tomura, Hikaru Watanabe, Takahiko Kato, Masanobu Honda
  • Patent number: 9293346
    Abstract: In a method for etching an organic film according to an embodiment, a target object that has an organic film is set in a processing chamber. Then, a processing gas containing COS gas and O2 gas is supplied to the processing chamber and a microwave for plasma excitation is supplied to the inside of the processing chamber to etch the organic film.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: March 22, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroyuki Takaba, Hironori Matsuoka
  • Patent number: 9290848
    Abstract: A method for anisotropically etching a feature in a Cu-containing layer includes providing a substrate having a Cu-containing layer and a patterned etch mask formed on the Cu-containing layer such that on exposed Cu-containing layer is exposed to processing through the patterned etch mask, passivating a first surface of the exposed Cu-containing layer, and inhibiting passivation of a second surface of the Cu-containing layer. A Cu compound is formed on said second surface of the Cu-containing layer, and the Cu compound is removed from the second surface of the Cu-containing layer to anisotropically etch a feature in the Cu-containing layer.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: March 22, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Lee Chen, Ying Zhang
  • Patent number: 9284472
    Abstract: A method is disclosed for polishing a wafer with a slurry. In the method, the wafer comprises at least one of silicon carbonitride (SiCN) and silicon nitride (SiN), and further comprises one or both of silicon dioxide (SiO2) and poly silicon, and a removal rate of SiCN is greater than a removal rate of poly silicon, and the removal rate of poly silicon is greater than a removal rate of SiO2, and where the slurry comprises up to about 15 wt % of surface-modified colloidal silica particles which have a primary particle size of less than about 35 nm, and the surface-modified colloidal silica particles comprise a plurality of acid moieties or salts thereof.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: March 15, 2016
    Assignee: FUJIMI INCORPORATED
    Inventors: Fusayo Saeki, Hooi-Sung Kim
  • Patent number: 9287134
    Abstract: Methods of selectively etching titanium oxide relative to silicon oxide, silicon nitride and/or other dielectrics are described. The methods include a remote plasma etch using plasma effluents formed from a fluorine-containing precursor and/or a chlorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium oxide. The plasmas effluents react with exposed surfaces and selectively remove titanium oxide while very slowly removing other exposed materials. A direction sputtering pretreatment is performed prior to the remote plasma etch and enables an increased selectivity as well as a directional selectivity. In some embodiments, the titanium oxide etch selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: March 15, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Lin Xu, Anchuan Wang, Nitin K. Ingle
  • Patent number: 9279184
    Abstract: A method of forming a pattern is provided. The method includes an etching step of forming a predetermined pattern in a silicon-containing film by etching the silicon-containing film deposited on a substrate through a mask by plasma generated from an etching gas containing a fluorocarbon gas, and a film deposition step of depositing a silicon oxide film or a silicon nitride film on a surface of the predetermined pattern by oxidizing or nitriding a silicon-containing layer adsorbed on the surface of the predetermined pattern by supplying a silicon compound gas, by using plasma generated from an oxidation gas or a nitriding gas.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: March 8, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhiro Kubota, Ryukichi Shimizu
  • Patent number: 9281251
    Abstract: Embodiments described relate to a method and apparatus for reducing lithographic distortion. A backside of a semiconductor substrate may be texturized. Then a lithographic process may be performed on the semiconductor substrate having the texturized backside.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: March 8, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Carlos A Fonseca, Anton Devilliers, Benjamen M Rathsack, Jeffrey T Smith, Lior Huli
  • Patent number: 9280990
    Abstract: A method and system provide a magnetic transducer having an air-bearing surface (ABS) location. The method includes forming a trench in the intermediate layer using a plurality of etches. A first etch substantially provides a first portion of the trench having a first sidewall angle. The second etch substantially provides a second portion of the trench having a second sidewall angle. The second sidewall angle is greater than the first sidewall angle. The second portion of the trench includes the ABS location. The method also includes providing a main pole in the trench. The main pole has a plurality of sidewalls. The sidewalls having the first sidewall angle in the first portion of the trench and the second sidewall angle in the second portion of the trench.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 8, 2016
    Assignee: Western Digital (Fremont), LLC
    Inventors: Jinqiu Zhang, Feng Liu, Hongmei Han, Ming Sun, Xiaotian Zhou
  • Patent number: 9276382
    Abstract: Quantum-size-controlled photoelectrochemical (QSC-PEC) etching provides a new route to the precision fabrication of epitaxial semiconductor nanostructures in the sub-10-nm size regime. For example, quantum dots (QDs) can be QSC-PEC-etched from epitaxial InGaN thin films using narrowband laser photoexcitation, and the QD sizes (and hence bandgaps and photoluminescence wavelengths) are determined by the photoexcitation wavelength.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: March 1, 2016
    Assignee: Sandia Corporation
    Inventors: Arthur J. Fischer, Jeffrey Y. Tsao, Jonathan J. Wierer, Jr., Xiaoyin Xiao, George T. Wang
  • Patent number: 9263162
    Abstract: A method is provided for producing a microstructure. The method includes the first step of forming a supporting layer on a base substrate including a silicon substrate provided with recessed sections at a first surface thereof and a metal structure filling the recessed sections so as to come in contact with the metal structure at the first surface, the second step of forming a structure including the metal structure and the supporting layer by selectively etching the silicon substrate to expose at least the surface of the metal structure opposite the surface in contact with the supporting layer from the silicon substrate, and the third step of selectively etching the supporting layer of the metal structure.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: February 16, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takayuki Teshima
  • Patent number: 9254660
    Abstract: A process for producing a liquid ejection head including a silicon substrate having a supply port to supply a liquid to a flow path, and an ejection-orifice-forming member forming the flow path between the ejection-orifice-forming member and the silicon substrate and having an ejection orifice to eject the liquid in the flow path. The process includes forming an etching protection film so as to cover the ejection-orifice-forming member; forming the supply port passing through the silicon substrate by anisotropic etching using an alkaline aqueous solution; and removing the etching protection film. The etching protection film includes an organic polymer material having a storage modulus at 80° C. of 1.0×106 Pa or higher.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: February 9, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroaki Mihara, Etsuko Sawada, Shoji Shiba
  • Patent number: 9257301
    Abstract: Provided is a method of etching a silicon oxide film. The method includes exposing a workpiece including the silicon oxide film and a mask formed on the silicon oxide film to plasma of a processing gas to etch the silicon oxide film. The mask includes a first film formed on the silicon oxide film and a second film formed on the first film, and the second film is constituted by a film having an etching rate lower than that of the first film with respect to active species in the plasma.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: February 9, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masahiro Ogasawara, Masafumi Urakawa, Yoshinobu Hayakawa, Kazuhiro Kubota, Hikaru Watanabe
  • Patent number: 9250514
    Abstract: An apparatus and methods utilized a DC or AC power to supply through a conductive substrate support pedestal to a conductive photomask substrate during a photomask substrate manufacturing process for EUV or other advanced lithography applications are provided. In one embodiment, an apparatus for processing a photomask includes a substrate support pedestal configured to receive a conductive photomask, wherein the conductive photomask is fabricated from a dielectric material substrate with a conductive coating, and at least a conductive path formed in the substrate support pedestal in contact with the photomask substrate configured to be conductive.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: February 2, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Banqiu Wu, Ajay Kumar
  • Patent number: 9245544
    Abstract: A surface forming method for electronic component includes: forming a body that has at least one waveguide, with two ends of the waveguide exposed on a front end surface and a back end surface of the body; forming a photoresist film to cover on the front end surface of the body; irradiating a light from the back end surface of the body to remove a part, of the photoresist film, that covers at least a part of an end surface of the waveguide, thereby forming an exposed area on the end surface of the waveguide; etching the exposed area of the waveguide to form a recess; and removing the photoresist film. The position and size of the pattern could be controlled accurately and efficiently, instead of inefficient complex procedures of alignment.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: January 26, 2016
    Assignee: SAE MAGNETICS (H.K.) LTD.
    Inventors: Natsuo Nishijima, Jian Hui Huang, Hong Tao Ma, Huan Chao Liang