Patents Examined by Maki Angadi
  • Patent number: 8900478
    Abstract: Disclosed are an etchant which is used for redistribution of a semiconductor substrate having an electrode and which is capable of selectively etching copper without etching nickel; and a method for manufacturing a semiconductor device using the same. Specifically disclosed are an etchant which is used for redistribution of a semiconductor substrate and which contains hydrogen peroxide and citric acid and has a content of hydrogen peroxide of from 0.75 to 12% by mass and a content of citric acid of from 1 to 20% by mass, with a molar ratio of hydrogen peroxide and citric acid being in the range of from 0.3 to 5; an etchant for selective etching of copper which is used for redistribution of a semiconductor substrate and which contains hydrogen peroxide and malic acid and has a content of hydrogen peroxide of from 0.75 to 12% by mass and a content of malic acid of from 1.5 to 25% by mass, with a molar ratio of hydrogen peroxide and malic acid being in the range of from 0.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: December 2, 2014
    Assignee: Mitsubishi Gas Chemical Company, Inc.
    Inventors: Akira Hosomi, Kensuke Ohmae
  • Patent number: 8895444
    Abstract: An approach for polishing-based hard mask removal during FinFET device formation is provided. In a typical embodiment, an initial device will be provided with a set of fins (e.g., silicon (Si)), a set of fin caps (e.g., silicon nitride (SiN)), and an oxide layer. A post-oxide planarizing and thinning polishing will first be performed (e.g., using a Silica-based slurry) to thin/reduce the oxide layer. A stop-on-nitride polishing will then be performed (e.g., using a Ceria-based slurry) to reduce the oxide layer to a top surface of the fin caps. Still yet, a stop-on-silicon polishing will be performed (e.g., using a Ceria-based slurry) to remove the set of fin caps and to reduce the oxide layer to a top surface to the set of fins.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: November 25, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventor: Michael D. Wedlake
  • Patent number: 8895454
    Abstract: In an etching method of a multilayer film including a first oxide film and a second oxide film, a high frequency power in etching an organic film is set to be higher than those in etching a first and second oxide films, and high frequency bias powers in the etching of the first and second oxide films are set to be higher than that in the etching of the organic film. In the etching of the first and second oxide films and the organic film, a magnetic field is generated such that horizontal magnetic field components in a radial direction with respect to a central axis line of a target object have an intensity distribution having a peak value at a position far from the central axis line, and a position of the peak value in the etching of the organic film is closer to the central axis line.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: November 25, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Shinji Himori, Etsuji Ito, Akihiro Yokota, Shu Kusano, Hiroaki Ishizuka, Kazuya Nagaseki
  • Patent number: 8889022
    Abstract: One illustrative method disclosed herein includes forming a structure above a semiconductor substrate, performing a conformal deposition process to form a layer of undoped spacer material above the structure, performing an angled ion implant process to form a region of doped spacer material in the layer of undoped spacer material while leaving other portions of the layer of undoped spacer material undoped, and, after performing the angled ion implant process, performing at least one etching process that removes the undoped portions of the layer of undoped spacer material and thereby results in a sidewall spacer comprised of the doped spacer material positioned adjacent at least one side, but not all sides, of the structure.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: November 18, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Hans-Peter Moll, Joachim Patzer
  • Patent number: 8889025
    Abstract: This disclosure relates to a method for manufacturing a semiconductor device. The method includes etching a metal film on a semiconductor substrate with an etching composition; and rinsing the etched metal film with a rinse solvent. The etching composition includes at least one acid; at least one compound containing a halide anion, the halide anion being chloride or bromide; at least one compound containing a nitrate or nitrosyl ion; and water.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: November 18, 2014
    Assignees: Fujifilm Electronic Materials U.S.A., Inc., FujiFilm Corporation
    Inventors: Tomonori Takahashi, Tadashi Inaba, Atsushi Mizutani, Bing Du, William A. Wojtczak, Kazutaka Takahashi, Tetsuya Kamimura
  • Patent number: 8883023
    Abstract: A method for forming a pattern includes providing a composition to form a resist underlayer film on a surface of a substrate to be processed. The composition contains a calixarene based compound having a group represented by a following formula (i) bound to at least a part of an aromatic ring or at least a part of a heteroaromatic ring of the calixarene based compound. The resist underlayer film on the surface of the substrate is treated with heat or an acid. A resist pattern is formed on a surface of the resist underlayer film. The resist underlayer film and the substrate are etched using the resist pattern as a mask to form the pattern on the substrate. The dry-etched resist underlayer film is removed from the substrate with a basic solution.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: November 11, 2014
    Assignee: JSR Corporation
    Inventors: Goji Wakamatsu, Hayato Namai, Syun Aoki
  • Patent number: 8883018
    Abstract: A method for fabricating a grating coupler having a bottom mirror in a semiconductor wafer including etching a trench from a top surface of a wafer and around a grating coupler formed in the wafer; etching a void underneath the grating coupler; etching a via into the void from the backside of the wafer; and depositing a mirror on the bottom of the grating coupler. Alternatively, additional oxide may be deposited on the bottom of the grating coupler prior to the deposition of the mirror such that a desirable oxide thickness on the bottom is achieved.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: November 11, 2014
    Assignee: Acacia Communications Inc.
    Inventor: Christopher Doerr
  • Patent number: 8883032
    Abstract: A method of surface treatment for zirconium oxide implants and the etching formula for the same are disclosed. The processes are carried out at room temperature. The average surface roughness Ra and the standard deviation of the implant are measured showing significant improvement while comparing with the un-treated sample and the hydrofluoric acid treated samples. The average contact angle is provided showing an almost hydrophilic surface after etched by the formula according to the present invention.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: November 11, 2014
    Inventors: Sea-Fue Wang, Chung-Kuang Yang, Jen-Chang Yang, Sheng-Yang Lee
  • Patent number: 8883642
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a concave portion on a surface of a substrate to be processed. The method further includes forming a coating film on the substrate to embed the coating film in the concave portion. The method further includes performing a first heat treatment in an atmosphere including an oxidant which contains polar molecules. The method further includes performing a second heat treatment after the first heat treatment by irradiating the coating film with a microwave after or while exposing the coating film to a liquid or a gas containing polar molecules.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: November 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wakana Kai, Tomonori Aoyama
  • Patent number: 8883026
    Abstract: A substrate processing method includes a water removing step of removing water from a substrate, a silylating step of supplying a silylating agent to the substrate after the water removing step, and an etching step of supplying an etching agent to the substrate after the silylating step. The substrate may have a surface on which a nitride film and an oxide film are exposed and in this case, the etching step may be a selective etching step of selectively etching the nitride film by the etching agent. The etching agent may be supplied in a form of a vapor having an etching component.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: November 11, 2014
    Assignee: SCREEN Holdings Co., Ltd.
    Inventors: Takashi Ota, Yuya Akanishi, Akio Hashizume
  • Patent number: 8877072
    Abstract: A method to fabricate a hierarchical graduated-branched structure that grows in a three-dimensional pattern down to fractal-branching, nano-size level is detailed. The fractal patterning is accomplished on a three-dimensional (i.e., non-planar) surface, by exposing the surface to a properly focused particle beam, which causes the spontaneous growth of graduated branches all over the surface. The structure can be fabricated with a single material and the fractal-patterning is done in a one step process. No addition of material is required for the formation of each branch. The fractal graduated branching structure can then be molded in order to produce replicas.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: November 4, 2014
    Inventors: Ranjana Sahai, Paolo Corradi
  • Patent number: 8877076
    Abstract: A substrate treatment apparatus is used for treating a major surface of a substrate with a chemical liquid. The substrate treatment apparatus includes: a substrate holding unit which holds the substrate; a chemical liquid supplying unit having a chemical liquid nozzle which supplies the chemical liquid onto the major surface of the substrate held by the substrate holding unit; a heater having an infrared lamp to be located in opposed relation to the major surface of the substrate held by the substrate holding unit to heat the chemical liquid supplied onto the major surface of the substrate by irradiation with infrared radiation emitted from the infrared lamp, the heater having a smaller diameter than the substrate; and a heater moving unit which moves the heater along the major surface of the substrate held by the substrate holding unit.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: November 4, 2014
    Assignee: SCREEN Holdings Co., Ltd.
    Inventors: Sei Negoro, Ryo Muramoto, Toyohide Hayashi, Koji Hashimoto, Yasuhiko Nagai
  • Patent number: 8877650
    Abstract: Methods of manufacturing semiconductor devices and methods of optical proximity correction methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes determining an amount of reactive ion etch (RIE) lag of a RIE process for a material layer of the semiconductor device, and adjusting a size of at least one pattern for a feature of the material layer by an adjustment amount to partially compensate for the amount of RIE lag determined.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: November 4, 2014
    Assignees: International Business Machines Corporation, Infineon Technologies AG
    Inventors: O Seo Park, Wai-Kin Li
  • Patent number: 8877641
    Abstract: A method for mitigating line-edge roughness on a semiconductor device. The method includes line-edge roughness mitigation techniques in accordance with embodiments of the present invention. The techniques include: reducing the SiON film thickness below a conventional thickness; increasing the photoresist thickness above a conventional thickness; etching the SiON film with an etch bias power less than a conventional wattage amount with an overetch percentage less than a conventional overetch percentage; removing the SiON film layer immediately after completion of the amorphous carbon film layer etching; and lowering the lower electrode temperature below a conventional temperature.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: November 4, 2014
    Assignee: Spansion LLC
    Inventor: Calvin T Gabriel
  • Patent number: 8877082
    Abstract: Disclosed is a processing method which can achieve a high processing rate, and is capable of making a surface smooth. In order to achieve this an SiC substrate is arranged in a potassium hydroxide solution containing hydrogen peroxide, and ultraviolent radiation is irradiated on the surface of the SiC substrate. An SiO2 layer is formed on the surface of the SiC substrate due to the irradiation of ultraviolet radiation, and this SiO2 layer is chemically removed by means of the potassium hydroxide solution, and also removed by a synthetic quartz surface plate.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: November 4, 2014
    Assignee: National University Corporation Kumamoto University
    Inventors: Akihisa Kubota, Mutsumi Touge
  • Patent number: 8871643
    Abstract: A manufacturing method for manufacturing a lateral semiconductor device having an SOI (Silicon on Insulator) substrate, the lateral semiconductor device comprising a semiconductor layer that includes a buried oxide layer and a drift region, the manufacturing method comprising an etching process of etching, by a predetermined depth, a LOCOS oxide that projects from a surface of the semiconductor layer by a predetermined thickness and is embedded in the semiconductor layer by a predetermined thickness, and a trench forming process of simultaneously forming a first trench extending from the drift region toward the buried oxide layer, and a second trench extending from a portion obtained by the etching in the etching process toward the buried oxide layer, at a same etching rate, and stopping forming the first trench and the second trench at a time when the second trench reaches the buried oxide layer.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: October 28, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hiroomi Eguchi, Takashi Okawa, Atsushi Onogi
  • Patent number: 8871650
    Abstract: Post etch treatments (PETs) of low-k dielectric films are described. For example, a method of patterning a low-k dielectric film includes etching a low-k dielectric layer disposed above a substrate with a first plasma process. The etching involves forming a fluorocarbon polymer on the low-k dielectric layer. The low-k dielectric layer is surface-conditioned with a second plasma process. The surface-conditioning removes the fluorocarbon polymer and forms an Si—O-containing protecting layer on the low-k dielectric layer. The Si—O-containing protecting layer is removed with a third plasma process.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: October 28, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Srinivas D. Nemani, Nicolas J. Bright, Thorsten B. Lill, Yifeng Zhou, Jamie Saephan, Ellie Yieh
  • Patent number: 8865011
    Abstract: The invention provides a method for optimizing the spectroscopy performance of a spectroscopy scintillator by surrounding the scintillator by a reflector material, performing a scan measuring resolution and light output at three or more axial locations on the crystal, where at least one location is close to the PMT or below the crystal (near the PMT) at least one location is at the end away from the PMT of the scintillator), and adjusting the surface finish of the crystal and/or the reflector to obtain equal light output and optimal resolution over the length and different azimuth of the crystal.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: October 21, 2014
    Assignee: Schlumberger Technology Corporation
    Inventors: Olivier G. Philip, Markus Berheide
  • Patent number: 8858819
    Abstract: The titled method affords low dishing levels in the polished substrate while simultaneously affording high metal removal rates. The method utilizes an associated polishing composition. Components in the composition include a poly(alkyleneimine) such as polyethyleneimine, an abrasive, an acid, and an oxidizing agent, such as a per-compound.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: October 14, 2014
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Rachel Dianne McConnell, Ann Marie Hurst, Xiaobo Shi
  • Patent number: 8858812
    Abstract: Provided is a processing method for an ink jet head substrate, including: forming a barrier layer on a substrate and forming a seed layer on the barrier layer; forming a resist film on the seed layer and patterning the resist film so that the patterned resist film corresponds to a pad portion for electrically connecting an ink jet head to an outside of the ink jet head; forming the pad portion in an opening of the patterned resist film; removing the resist film; subjecting the substrate to anisotropic etching to form an ink supply port; removing the barrier layer and the seed layer; and performing laser processing from a surface of the substrate.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: October 14, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenta Furusawa, Keiji Matsumoto, Keisuke Kishimoto, Kazuhiro Asai, Shuji Koyama