Patents Examined by Marianne Huseman
  • Patent number: 4876698
    Abstract: A system for transmitting sequences of digital samples encoded by variable-length binary words is formed on the one hand by a transmitter device comprising a statistic encoding circuit for encoding in said variable-length words words of a fixed length appearing at its input in the shape of sample sequences, a synchronizing circuit for forming synchronizing words which define the position of the variable-length words in the sequences and a multiplexer circuit for combining, in view of their transmission, the synchronizing words with the variable-length words, and, on the other hand, a receiver device comprising a demultiplexer circuit for applying from one of its two outputs the variable-length words received to a statistic decoding circuit for recovering the fixed-length words and for applying from the other output the synchronizing word to a processing circuit for restituting, in the event of a transmission error, the position of the samples in the sequence.
    Type: Grant
    Filed: June 24, 1988
    Date of Patent: October 24, 1989
    Assignee: Telecommunications Radioelectriques et Telephoniques
    Inventors: Jean-Yves Boisson, Jean-Paul Bastien
  • Patent number: 4876696
    Abstract: A transmission system for transmitting modem signals or multifrequency (MF) signals together with speech signals over the same digital transmission line. The system includes a transmitter which has a first coder that efficiently encodes a speech signal to produce a first coded output, a detector for detecting a multifrequency signal or modem signal, a second encoder which produces a second coded output from the multifrequency signal or modem signal, and a selector for selecting either the first or second coded output in response to the output of the detector. The transmission system also includes a receiver which has a separator for separating a signal transmitted from the transmitting means into the first and second coded outputs, a first decoder for decoding the first coded output and a second decoder for decoding the second coded output.
    Type: Grant
    Filed: July 20, 1987
    Date of Patent: October 24, 1989
    Assignee: NEC Corporation
    Inventor: Toshio Yoshikawa
  • Patent number: 4875222
    Abstract: An information signal transmission system for transmitting a code sequence in which mutually adjoining codes are correlated with each other. The information signal transmission system is arranged to compute a predictive code for each code sequence by using "n" number (n.gtoreq.2) of codes included in the same code sequence; to compute a difference code relative to a difference between the predictive code and the code corresponding to the predictive code. The system to thus obtains a group of difference codes corresponding to "m" number (m.gtoreq.n) of consecutive codes included in the code sequence and transmits codes by adding the predictive code corresponding to one of the "m" number of the consecutive code to the difference code group.
    Type: Grant
    Filed: October 15, 1986
    Date of Patent: October 17, 1989
    Assignee: Canon Kabushiki Kaisha
    Inventors: Motokazu Kashida, Toshiyuki Masui
  • Patent number: 4875224
    Abstract: An asynchronous communication system writes data from an input (I) to an output (O) via region of shared memory. The region of shared memory is divided into four slots (S1-S4). The system includes means to write data (1, 5, 6) which select a pair of slots S1, S2; S3, S4) not currently selected for reading and one of the slots of the selected pair which is not the slot last written to. Means to read date (2, 3, 4) select the slot last written to and route data from that slot to the output (O) so that fresh coherent data is communicated fully asynchronously from the input (I) to the output (O).
    Type: Grant
    Filed: May 18, 1988
    Date of Patent: October 17, 1989
    Assignee: British Aerospace plc
    Inventor: Hugo R. Simpson
  • Patent number: 4873702
    Abstract: A technique for eliminating unwanted dc offset voltages in a receiver for decoding a plurality of multilevel digitally modulated signals. The data transmission system is arranged to send a particular preamble signal each time a different data source begins transmission of its data. The preamble signal produces at the receiver output multiple cycles of maximum level excursions. During the period of time that the preamble signal is received, a signal processor in the receiver determines an initial dc offset value by averaging the level of the received digitally modulated signal. After the transmission of the preamble, the signal processor continually generates updated dc offset voltages which are equal to the sum of the previously generated dc offset voltage and the difference between the amplitude level represented by the received digitally modulated signal and the amplitude level of the closest "coding" amplitude level; the difference being multiplied by a scaling factor.
    Type: Grant
    Filed: October 20, 1988
    Date of Patent: October 10, 1989
    Inventor: Ran-Fun Chiu
  • Patent number: 4873701
    Abstract: A modem and method for modulation-demodulation of a received analog signal. The modem receives sixteen bits at four bits per baud. The 8 D Block Encoder encodes nine of the sixteen bits into 12 Z-bits which are used to specify a sequence of four 2 D constellation points. These 2 D constellation points correspond to a sequence of four 2 D subsets of a 8 D subtype selected. The differential encoder differentially encodes two of the sixteen bits to make the code transparent to a 90 degree rotation. The rate 3/4 convolutional encoder generates a check bit and a bit converter converts the check bit, the differential encoded bits and the remaining five bits into 8 Z-bits. The result is an 8 D trellis with a 20-point 2 D constellation.
    Type: Grant
    Filed: September 16, 1987
    Date of Patent: October 10, 1989
    Assignee: Penril Corporation
    Inventor: Steven A. Tretter
  • Patent number: 4870661
    Abstract: A first digital data processing system outputs digital data obtained by sampling, in response to a clock signal of a first frequency, original data having a characteristic enabling interpolation thereof. A second digital data processing system obtaines output data by sampling input data in response to a clock signal of a second frequency. A sample rate conversion circuit receives the digital data from the first digital data processing system, converts the sample rate thereof into a sample rate suitable for the second digital data processing system, and supplies the sample rate as the input data to the second digital data processing system.
    Type: Grant
    Filed: September 29, 1987
    Date of Patent: September 26, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Yamada, Kiyoyuki Kawai
  • Patent number: 4870662
    Abstract: Disclosed is a system and method for compressing data that ranks received data characters according to their frequency of occurrence in the preceding data stream. Each time a character is input to the system, the table of rankings of each character is updated through use of a bubbler system, which does a simple exchange between the input character and a character. After a significant portion of data has been read, the table will substantially reflect the relative ranks of the various characters. A set of probability pointers divides the various ranks into several ranges, and each time a new character is input and the rank of that character is altered, the probability pointers are also updated. In this fashion, the system can readily adapt to change in the type of data in the input stream. On the decompression side, similar tables are set up, with the ranks and the probability pointers constantly being updated after the receipt of each coded symbols.
    Type: Grant
    Filed: December 1, 1987
    Date of Patent: September 26, 1989
    Assignee: Concord Data Systems, Inc.
    Inventors: David Lindbergh, Brant M. Helf
  • Patent number: 4868854
    Abstract: The present invention relates to bit synchronization required for a data transmitting/receiving system. An average phase error between edges of an input waveform and edges of an ideal bit synchronous pattern generated internally is taken and the ideal bit synchronous pattern is shifted by the amount corresponding to the average error, so that a sampling signal is generated on the basis of that pattern. Thus, bit synchronization is established by means of software on microcomputor.
    Type: Grant
    Filed: November 10, 1987
    Date of Patent: September 19, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Imai, Yoshio Horiike, Masahiro Yamamoto
  • Patent number: 4868851
    Abstract: Apparatus and method for processing a common digital signal received at plural receivers in which each received signal is validated and aligned in time with the other signals. A single output signal is generated from the received signals using a voting scheme such as one in which the logic state of the majority of corresponding bits in the received signals determines the logic state of the bits in the generated signal. If there is no majority, the logic state of the best performing signal is used without revoting, or the vote is retaken without the poorest performing signal.
    Type: Grant
    Filed: January 26, 1988
    Date of Patent: September 19, 1989
    Assignee: Harris Corporation
    Inventors: John M. Trinidad, Hendrik J. Keesom, C. Wayne Buhrman, Dedina M. Heinrich
  • Patent number: 4868853
    Abstract: A demodulation circuit for demodulating a modulated digital including a unit for detecting a specific pattern contained in a series of data before modulation, a unit for judging the phase relation between the specific pattern and a clock pulse used for demodulation, a unit for performing a counting operation on the basis of the result of said judgment, and a unit for controlling the phase of said clock pulse for demodulation on the basis of the count.
    Type: Grant
    Filed: April 14, 1988
    Date of Patent: September 19, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Morishi Izumita, Seiichi Mita, Nobukazu Doi, Masuo Umemoto, Hiroto Yamauchi, Shigeaki Fujino, Nobuo Murata
  • Patent number: 4868852
    Abstract: A facsimile machine includes a MODEM, an attenuator, an NCU and a controller. A signal from the MODEM is adjusted in level by the attenuator under the control of the controller and then output to a transmission line through the NCU. In this case, the adjustment of the level of the signal to be transmitted is carried out in accordance with a predetermined characteristic, such as frequency, of the signal to be transmitted. Also provided is a push phone having a DTMF signal generating circuit and a DTMF signal is also adjusted in level before being output to the transmission line in a manner similar to the signal from the MODEM.
    Type: Grant
    Filed: January 21, 1988
    Date of Patent: September 19, 1989
    Assignee: Ricoh Company, Ltd.
    Inventor: Naoki Tsumura
  • Patent number: 4866737
    Abstract: ASCII characters are coded in the form of 8, 16 or longer digital words. Signal pulses with durations proportional to such digital words are generated and filtered so that the filtered signal has substantially the same duration as the unfiltered signal. The filtered signal fits within the voiceband so that it can be transmitted through a voiceband medium such as a telephone network. At the receiver, zero-crossings of the received signal are detected and from the duration between consecutive zero-crossings, the particular ASCII represented by the duration of such signal may be recovered.
    Type: Grant
    Filed: July 21, 1987
    Date of Patent: September 12, 1989
    Inventor: Bruce Seifried
  • Patent number: 4864591
    Abstract: Electronic apparatus for receiving amplitude or frequency modulated facsimile signals detects the instantaneous value ( i.e., the amplitude or frequency) of the modulation by a circuit including means detecting the modulation value in each cycle of the signal and producing a gating signal corresponding in duration to the detected modulation value, a generator of clock pulses higher in frequency than the signal, and a modulator responsive to the clock pulse and gating signal to pass a number of clock pulses commensurate with the modulation value to a counter which generates a marking signal commensurate in amplitude to the modulation value for application to a facsimile recorder.
    Type: Grant
    Filed: January 22, 1988
    Date of Patent: September 5, 1989
    Assignee: Alden Electronics, Inc.
    Inventor: Scott Nowell
  • Patent number: 4864590
    Abstract: Apparatus for suppressing intersymbol interference and improving the signal-to-noise ratio in a digital line amplifier includes a filter with a fixed transfer function that couples equalized digital signals to a first differential input of a difference amplifier and substantially filters out high frequency random noise present in the signals to achieve signal-to-noise enhancement with consequent degradation of the signals by intersymbol interference. Subsequently, an output from the amplifier is sampled by a quantizer that produces a bit stream output of portions of the enhanced signals, excluding the intersymbol interference.
    Type: Grant
    Filed: June 30, 1988
    Date of Patent: September 5, 1989
    Assignee: Northern Telecom Limited
    Inventors: Ephraim Arnon, Sami Aly
  • Patent number: 4862484
    Abstract: A clock recovery circuit for producing a clock signal from a baseband information signal that has a data rate R. The information signal is frequency converted to a predetermined intermediate frequency by mixing the information signal with a tunable local oscillator signal having a frequency f. The resulting converted signal is bandpass filtered to extract the clock spectral line at f+R/2. The resulting signal is then frequency doubled, producing a signal of 2f+R. After passing through another narrowband filter (in one embodiment a phase-locked loop) the doubled signal is reconverted to produce the spectral line at R (the recovered clock), filtered to remove the unwanted products produced in the reconversion process, and passed through a comparator to sharpen the signal edges. Using this technique, the clock signal can be recovered from information signals of different data rates without having to switch from one bandpass filter to another when the frequency of the information signal changes.
    Type: Grant
    Filed: January 21, 1988
    Date of Patent: August 29, 1989
    Assignee: Harris Corporation
    Inventor: Richard D. Roberts
  • Patent number: 4860319
    Abstract: In a receiver for data transmission, an apparatus for compensating for phase hits and, thereby, reducing transmission errors ascribable thereto is operated to modulate the phase of a delayed signal by a phase component signal so as to reduce the phase change of an output signal of a phase modulator.
    Type: Grant
    Filed: July 27, 1987
    Date of Patent: August 22, 1989
    Assignee: NEC Corporation
    Inventor: Atsushi Yoshida
  • Patent number: 4860320
    Abstract: Reliable phase synchronicity between a local carrier signal and the carrier signal of an amplitude and/or phase shift keyed received signal is produced as quickly as possible by employing a phase detector characteristic whose root means square outside of the synchronization point is as large as possible and whose synchronization point, i.e., zero passage, is situated such that it also considers a phase deviation of the received signal component from its quadrature position.
    Type: Grant
    Filed: December 21, 1988
    Date of Patent: August 22, 1989
    Assignee: ANT Nachrichtentechnik GmbH
    Inventor: Michael Hoffmann
  • Patent number: 4860324
    Abstract: An information data recovering apparatus which recovers the original information data from transmitted data of (2, 7, 1, 2, 3) Run Length Limited code to which the original data is converted. When 7 successive "0"-bits of a train of transmitted data are input to the apparatus, bit data at a position spaced by a predetermined number of bits from that time is converted as the head of original data and the input transmitted data subsequent to the bit data is converted to the original data.
    Type: Grant
    Filed: June 30, 1987
    Date of Patent: August 22, 1989
    Assignee: Canon Kabushiki Kaisha
    Inventor: Seiichiro Satomura
  • Patent number: 4860321
    Abstract: A receiver is disclosed for acquiring and tracking a data signal in a highly stressed environment. The receiver comprises first and second I.F. sections, a mixer for translation from the first I.F. frequency to the second I.F. frequency, a 2 kHz bandpass filter at the second I.F. frequency, signal translator for synchronous translation of the signal at the second I.F. frequency to baseband, a digitizer for complex sampling operation on the baseband signal, a microprocessor for processing the digital samples, and a numerically controlled oscillator coupled to the mixer and controlled by the microprocessor. The microprocessor formulates matched digital discrete Fourier transform filters which drive frequency, phase and symbol lock loops at the symbol rate. Each of the loop filters is formed by symbol-rate recursive, first-order equations.
    Type: Grant
    Filed: September 13, 1985
    Date of Patent: August 22, 1989
    Assignee: Hughes Aircraft Company
    Inventor: U. A. von der Embse