Abstract: A light emitting element ink comprises a light emitting element solvent, a light emitting element dispersed in the light emitting element solvent, the light emitting element including a plurality of semiconductor layers, and an insulating film surrounding outer surfaces of the plurality of semiconductor layers, and a thickener dispersed in the light emitting element solvent, wherein the thickener includes a compound represented by Chemical Structural Formula 1 as a polyol-based compound capable of forming a hydrogen bond with the light emitting element solvent or another thickener, and the thickener has a boiling point in a range of about 200° C. to about 450° C.
Type:
Grant
Filed:
May 13, 2021
Date of Patent:
March 4, 2025
Assignee:
SAMSUNG DISPLAY CO., LTD.
Inventors:
Hyo Jin Ko, Duk Ki Kim, Jun Bo Sim, Na Mi Hong, Yong Hwi Kim, Chang Hee Lee, Jae Kook Ha
Abstract: A display device and a manufacturing method thereof are disclosed. The display device may include a pixel circuit layer including a plurality of transistors, a first partition wall and a second partition wall on the pixel circuit layer, and each protruding in a thickness direction, a first electrode and a second electrode formed on the same layer, and on the first partition wall and the second partition wall, respectively; a light emitting element between the first electrode and the second electrode; and a first organic pattern directly on the light emitting element.
Type:
Grant
Filed:
July 19, 2023
Date of Patent:
February 18, 2025
Assignee:
Samsung Display Co., Ltd.
Inventors:
Jun Hong Park, Tae Gyun Kim, Jun Chun, Eui Suk Jung, Hyun Young Jung
Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
Abstract: Bipolar junction transistor (BJT) structures are provided. A BJT structure includes a semiconductor substrate, a collector region formed in the semiconductor substrate, a base region formed over the collector region, an emitter region formed over the collector region, a ring-shaped shallow trench isolation (STI) region formed in the collector region, and a base dielectric layer formed over the collector region and on opposite sides of the base region. The base dielectric layer is surrounded by an inner side wall of the ring-shaped STI region.
Abstract: A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.
Type:
Grant
Filed:
October 9, 2023
Date of Patent:
January 28, 2025
Assignee:
SAMSUNG ELECTRONICS CO., LTD.
Inventors:
Willibrordus Gerardus Maria Van Den Hoek, Tsun Yin Lau, Cameron Danesh, Fariba Danesh
Abstract: There is provided a photoelectric conversion film including a quinacridone derivative represented by the following General formula and a subphthalocyanine derivative represented by the following General formula.
Type:
Grant
Filed:
June 6, 2023
Date of Patent:
January 28, 2025
Assignee:
Sony Semiconductor Solutions Corporation
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Abstract: A light emitting device including first, second, and third light emitting stacks each including first and second conductivity type semiconductor layers, a first lower contact electrode in ohmic contact with the first light emitting stack, and second and third lower contact electrodes respectively in ohmic contact with the second conductivity type semiconductor layers of the second and third light emitting stacks, in which the first lower contact electrode is disposed between the first and second light emitting stacks, the second and third lower contact electrodes are disposed between the second and third light emitting stacks, and the first, second, and third lower contact electrodes include transparent conductive oxide layers.
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Type:
Grant
Filed:
October 29, 2021
Date of Patent:
January 14, 2025
Assignee:
OSRAM Opto Semiconductors GmbH
Inventors:
Andreas Biebersdorf, Stefan Illek, Ines Pietzonka, Petrus Sundgren, Christoph Klemp, Felix Feix, Christian Berger, Ana Kanevce
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Type:
Grant
Filed:
May 25, 2022
Date of Patent:
January 14, 2025
Assignee:
OSRAM Opto Semiconductors GmbH
Inventors:
Xue Wang, Petrus Sundgren, Laura Kreiner
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Type:
Grant
Filed:
December 22, 2021
Date of Patent:
January 14, 2025
Assignee:
OSRAM Opto Semiconductors GmbH
Inventors:
Andreas Biebersdorf, Stefan Illek, Ines Pietzonka, Petrus Sundgren, Christoph Klemp, Felix Feix, Christian Berger, Ana Kanevce
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Abstract: An array substrate, a method of manufacturing the array substrate, and a display device are provided. The array substrate includes: a transparent rigid base; light-emitting chips on the transparent rigid base, each light-emitting chip including a chip body and a pin coupled to the chip body, a light-exiting surface of the chip body facing towards the transparent rigid base, and the pin being on a side of the chip body facing away from the transparent rigid base; a driving wire layer on a side of the pin facing away from the transparent rigid base; and a driving chip structure on a side of the driving wire layer facing away from the transparent rigid base. The driving chip structure is coupled to pins of the plurality of light-emitting chips through the driving wire layer, and is used for provide driving signals for the light-emitting chips.
Abstract: A manufacturing method for an integrated chip is used for forming and processing an electrode structure of the integrated chip. The method includes step S1 and step S2. In step S1, a light-emitting portion is manufactured, and the light-emitting portion includes multiple light-emitting unit groups distributed in the form of a matrix. In step S2, conductive terminals multiple first electrodes and conductive terminals of multiple second electrodes of the light-emitting portion are electrically led out to form multiple first pin electrodes and multiple second pin electrodes. The first pin electrodes and the second pin electrodes are used for being electrically connected to a circuit substrate.
Abstract: A semiconductor structure, and a method of making the same includes a fin extending upward from a substrate, an epitaxially grown bottom source/drain region in direct contact with the substrate and a bottom portion of the fin. A bottom surface and sidewalls of a metal silicide layer are in direct contact with the epitaxially grown bottom source/drain region. A bottom spacer is located above and in direct contact with the metal silicide layer and a portion of the epitaxially grown bottom source/drain region not covered by the metal silicide layer, the bottom spacer surrounding the fin.
Type:
Grant
Filed:
May 18, 2021
Date of Patent:
December 31, 2024
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Choonghyun Lee, Soon-Cheon Seo, Injo Ok, Alexander Reznicek
Abstract: An image sensor includes a substrate including a first surface and a second surface facing the first surface, a first photodiode located in a first region of the substrate and generating photocharges from light incident on the first region, a second photodiode located in a second region of the substrate and generating photocharges from light incident on the second region, and an isolation structure defining the first region in which the first photodiode is located and the second region in which the second photodiode is located, and extending between the first photodiode and the second photodiode. An area of the second region is smaller than an area of the first region, a first end of the isolation structure is coplanar with the second surface, and the isolation structure extends in a vertical direction from the second surface of the substrate toward the first surface of the substrate.
Abstract: Provided is a Plasma Induced Damage (PID) test structure and a semiconductor test structure, including: a gate structure, including a gate layer; a covering dielectric layer, located on a surface of the gate layer; a metal layer structure, located on a surface of the covering dielectric layer, the metal layer structure including at least one metal layer; and an extraction electrode, electrically connected with the gate layer via a conductive structure.
Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
Type:
Grant
Filed:
December 22, 2021
Date of Patent:
December 24, 2024
Assignee:
OSRAM Opto Semiconductors GmbH
Inventors:
Andreas Biebersdorf, Laura Kreiner, Stefan Illek, Ines Pietzonka, Petrus Sundgren, Christoph Klemp, Felix Feix, Christian Berger, Ana Kanevce